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git.gir.st - tmk_keyboard.git/blob - tmk_core/tool/mbed/mbed-sdk/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_add_q7.c
1 /* ----------------------------------------------------------------------
2 * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
4 * $Date: 17. January 2013
7 * Project: CMSIS DSP Library
10 * Description: Q7 vector addition.
12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
17 * - Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * - Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
23 * - Neither the name of ARM LIMITED nor the names of its contributors
24 * may be used to endorse or promote products derived from this
25 * software without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 * -------------------------------------------------------------------- */
48 * @addtogroup BasicAdd
53 * @brief Q7 vector addition.
54 * @param[in] *pSrcA points to the first input vector
55 * @param[in] *pSrcB points to the second input vector
56 * @param[out] *pDst points to the output vector
57 * @param[in] blockSize number of samples in each vector
60 * <b>Scaling and Overflow Behavior:</b>
62 * The function uses saturating arithmetic.
63 * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
72 uint32_t blkCnt
; /* loop counter */
74 #ifndef ARM_MATH_CM0_FAMILY
76 /* Run the below code for Cortex-M4 and Cortex-M3 */
80 blkCnt
= blockSize
>> 2u;
82 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
83 ** a second loop below computes the remaining 1 to 3 samples. */
87 /* Add and then store the results in the destination buffer. */
88 *__SIMD32(pDst
)++ = __QADD8(*__SIMD32(pSrcA
)++, *__SIMD32(pSrcB
)++);
90 /* Decrement the loop counter */
94 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
95 ** No loop unrolling is used. */
96 blkCnt
= blockSize
% 0x4u
;
101 /* Add and then store the results in the destination buffer. */
102 *pDst
++ = (q7_t
) __SSAT(*pSrcA
++ + *pSrcB
++, 8);
104 /* Decrement the loop counter */
110 /* Run the below code for Cortex-M0 */
114 /* Initialize blkCnt with number of samples */
120 /* Add and then store the results in the destination buffer. */
121 *pDst
++ = (q7_t
) __SSAT((q15_t
) * pSrcA
++ + *pSrcB
++, 8);
123 /* Decrement the loop counter */
127 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
133 * @} end of BasicAdd group