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git.gir.st - tmk_keyboard.git/blob - tmk_core/tool/mbed/mbed-sdk/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_negate_q15.c
1 /* ----------------------------------------------------------------------
2 * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
4 * $Date: 17. January 2013
7 * Project: CMSIS DSP Library
8 * Title: arm_negate_q15.c
10 * Description: Negates Q15 vectors.
12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
17 * - Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * - Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
23 * - Neither the name of ARM LIMITED nor the names of its contributors
24 * may be used to endorse or promote products derived from this
25 * software without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 * -------------------------------------------------------------------- */
52 * @brief Negates the elements of a Q15 vector.
53 * @param[in] *pSrc points to the input vector
54 * @param[out] *pDst points to the output vector
55 * @param[in] blockSize number of samples in the vector
58 * \par Conditions for optimum performance
59 * Input and output buffers should be aligned by 32-bit
62 * <b>Scaling and Overflow Behavior:</b>
64 * The function uses saturating arithmetic.
65 * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
73 uint32_t blkCnt
; /* loop counter */
76 #ifndef ARM_MATH_CM0_FAMILY
78 /* Run the below code for Cortex-M4 and Cortex-M3 */
80 q31_t in1
, in2
; /* Temporary variables */
84 blkCnt
= blockSize
>> 2u;
86 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
87 ** a second loop below computes the remaining 1 to 3 samples. */
91 /* Read two inputs at a time */
92 in1
= _SIMD32_OFFSET(pSrc
);
93 in2
= _SIMD32_OFFSET(pSrc
+ 2);
95 /* negate two samples at a time */
96 in1
= __QSUB16(0, in1
);
98 /* negate two samples at a time */
99 in2
= __QSUB16(0, in2
);
101 /* store the result to destination 2 samples at a time */
102 _SIMD32_OFFSET(pDst
) = in1
;
103 /* store the result to destination 2 samples at a time */
104 _SIMD32_OFFSET(pDst
+ 2) = in2
;
107 /* update pointers to process next samples */
111 /* Decrement the loop counter */
115 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
116 ** No loop unrolling is used. */
117 blkCnt
= blockSize
% 0x4u
;
121 /* Run the below code for Cortex-M0 */
123 /* Initialize blkCnt with number of samples */
126 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
131 /* Negate and then store the result in the destination buffer. */
133 *pDst
++ = (in
== (q15_t
) 0x8000) ? 0x7fff : -in
;
135 /* Decrement the loop counter */
141 * @} end of negate group