1 ;/*****************************************************************************
2 ; * @file: startup_MK20D5.s
3 ; * @purpose: CMSIS Cortex-M4 Core Device Startup File for the
8 ; * Copyright: 1997 - 2015 Freescale Semiconductor, Inc. All Rights Reserved.
10 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
12 ; *****************************************************************************/
15 __initial_sp EQU 0x20002000 ; Top of RAM
21 ; Vector Table Mapped to Address 0 at Reset
23 AREA RESET, DATA, READONLY
28 __Vectors DCD __initial_sp ; Top of Stack
29 DCD Reset_Handler ; Reset Handler
30 DCD NMI_Handler ; NMI Handler
31 DCD HardFault_Handler ; Hard Fault Handler
32 DCD MemManage_Handler ; MPU Fault Handler
33 DCD BusFault_Handler ; Bus Fault Handler
34 DCD UsageFault_Handler ; Usage Fault Handler
39 DCD SVC_Handler ; SVCall Handler
40 DCD DebugMon_Handler ; Debug Monitor Handler
42 DCD PendSV_Handler ; PendSV Handler
43 DCD SysTick_Handler ; SysTick Handler
46 DCD DMA0_IRQHandler ; DMA channel 0 transfer complete interrupt
47 DCD DMA1_IRQHandler ; DMA channel 1 transfer complete interrupt
48 DCD DMA2_IRQHandler ; DMA channel 2 transfer complete interrupt
49 DCD DMA3_IRQHandler ; DMA channel 3 transfer complete interrupt
50 DCD DMA_Error_IRQHandler ; DMA error interrupt
51 DCD Reserved21_IRQHandler ; Reserved interrupt 21
52 DCD FTFL_IRQHandler ; FTFL interrupt
53 DCD Read_Collision_IRQHandler ; Read collision interrupt
54 DCD LVD_LVW_IRQHandler ; Low Voltage Detect, Low Voltage Warning
55 DCD LLW_IRQHandler ; Low Leakage Wakeup
56 DCD Watchdog_IRQHandler ; WDOG interrupt
57 DCD I2C0_IRQHandler ; I2C0 interrupt
58 DCD SPI0_IRQHandler ; SPI0 interrupt
59 DCD I2S0_Tx_IRQHandler ; I2S0 transmit interrupt
60 DCD I2S0_Rx_IRQHandler ; I2S0 receive interrupt
61 DCD UART0_LON_IRQHandler ; UART0 LON interrupt
62 DCD UART0_RX_TX_IRQHandler ; UART0 receive/transmit interrupt
63 DCD UART0_ERR_IRQHandler ; UART0 error interrupt
64 DCD UART1_RX_TX_IRQHandler ; UART1 receive/transmit interrupt
65 DCD UART1_ERR_IRQHandler ; UART1 error interrupt
66 DCD UART2_RX_TX_IRQHandler ; UART2 receive/transmit interrupt
67 DCD UART2_ERR_IRQHandler ; UART2 error interrupt
68 DCD ADC0_IRQHandler ; ADC0 interrupt
69 DCD CMP0_IRQHandler ; CMP0 interrupt
70 DCD CMP1_IRQHandler ; CMP1 interrupt
71 DCD FTM0_IRQHandler ; FTM0 fault, overflow and channels interrupt
72 DCD FTM1_IRQHandler ; FTM1 fault, overflow and channels interrupt
73 DCD CMT_IRQHandler ; CMT interrupt
74 DCD RTC_IRQHandler ; RTC interrupt
75 DCD RTC_Seconds_IRQHandler ; RTC seconds interrupt
76 DCD PIT0_IRQHandler ; PIT timer channel 0 interrupt
77 DCD PIT1_IRQHandler ; PIT timer channel 1 interrupt
78 DCD PIT2_IRQHandler ; PIT timer channel 2 interrupt
79 DCD PIT3_IRQHandler ; PIT timer channel 3 interrupt
80 DCD PDB0_IRQHandler ; PDB0 interrupt
81 DCD USB0_IRQHandler ; USB0 interrupt
82 DCD USBDCD_IRQHandler ; USBDCD interrupt
83 DCD TSI0_IRQHandler ; TSI0 interrupt
84 DCD MCG_IRQHandler ; MCG interrupt
85 DCD LPTimer_IRQHandler ; LPTimer interrupt
86 DCD PORTA_IRQHandler ; Port A interrupt
87 DCD PORTB_IRQHandler ; Port B interrupt
88 DCD PORTC_IRQHandler ; Port C interrupt
89 DCD PORTD_IRQHandler ; Port D interrupt
90 DCD PORTE_IRQHandler ; Port E interrupt
91 DCD SWI_IRQHandler ; Software interrupt
94 __Vectors_Size EQU __Vectors_End - __Vectors
96 ; <h> Flash Configuration
97 ; <i> 16-byte flash configuration field that stores default protection settings (loaded on reset)
98 ; <i> and security information that allows the MCU to restrict acces to the FTFL module.
99 ; <h> Backdoor Comparison Key
100 ; <o0> Backdoor Key 0 <0x0-0xFF:2>
101 ; <o1> Backdoor Key 1 <0x0-0xFF:2>
102 ; <o2> Backdoor Key 2 <0x0-0xFF:2>
103 ; <o3> Backdoor Key 3 <0x0-0xFF:2>
104 ; <o4> Backdoor Key 4 <0x0-0xFF:2>
105 ; <o5> Backdoor Key 5 <0x0-0xFF:2>
106 ; <o6> Backdoor Key 6 <0x0-0xFF:2>
107 ; <o7> Backdoor Key 7 <0x0-0xFF:2>
117 ; <h> Program flash protection bytes (FPROT)
118 ; <i> Each program flash region can be protected from program and erase operation by setting the associated PROT bit.
119 ; <i> Each bit protects a 1/32 region of the program flash memory.
121 ; <i> Program flash protection bytes
122 ; <i> 1/32 - 8/32 region
132 FPROT0 EQU nFPROT0:EOR:0xFF
135 ; <i> Program Flash Region Protect Register 1
136 ; <i> 9/32 - 16/32 region
146 FPROT1 EQU nFPROT1:EOR:0xFF
149 ; <i> Program Flash Region Protect Register 2
150 ; <i> 17/32 - 24/32 region
160 FPROT2 EQU nFPROT2:EOR:0xFF
163 ; <i> Program Flash Region Protect Register 3
164 ; <i> 25/32 - 32/32 region
174 FPROT3 EQU nFPROT3:EOR:0xFF
177 ; <h> Data flash protection byte (FDPROT)
178 ; <i> Each bit protects a 1/8 region of the data flash memory.
179 ; <i> (Program flash only devices: Reserved)
189 FDPROT EQU nFDPROT:EOR:0xFF
191 ; <h> EEPROM protection byte (FEPROT)
192 ; <i> FlexNVM devices: Each bit protects a 1/8 region of the EEPROM.
193 ; <i> (Program flash only devices: Reserved)
203 FEPROT EQU nFEPROT:EOR:0xFF
205 ; <h> Flash nonvolatile option byte (FOPT)
206 ; <i> Allows the user to customize the operation of the MCU at boot time.
208 ; <0=> Low-power boot
211 ; <0=> EzPort operation is enabled
212 ; <1=> EzPort operation is disabled
215 ; <h> Flash security byte (FSEC)
216 ; <i> WARNING: If SEC field is configured as "MCU security status is secure" and MEEN field is configured as "Mass erase is disabled",
217 ; <i> MCU's security status cannot be set back to unsecure state since Mass erase via the debugger is blocked !!!
219 ; <2=> MCU security status is unsecure
220 ; <3=> MCU security status is secure
222 ; <i> This bits define the security state of the MCU.
224 ; <2=> Freescale factory access denied
225 ; <3=> Freescale factory access granted
226 ; <i> Freescale Failure Analysis Access Code
227 ; <i> This bits define the security state of the MCU.
229 ; <2=> Mass erase is disabled
230 ; <3=> Mass erase is enabled
231 ; <i> Mass Erase Enable Bits
232 ; <i> Enables and disables mass erase capability of the FTFL module
234 ; <2=> Backdoor key access enabled
235 ; <3=> Backdoor key access disabled
236 ; <i> Backdoor key Security Enable
237 ; <i> These bits enable and disable backdoor key access to the FTFL module.
241 IF :LNOT::DEF:RAM_TARGET
242 AREA |.ARM.__at_0x400|, CODE, READONLY
243 DCB BackDoorK0, BackDoorK1, BackDoorK2, BackDoorK3
244 DCB BackDoorK4, BackDoorK5, BackDoorK6, BackDoorK7
245 DCB FPROT0, FPROT1, FPROT2, FPROT3
246 DCB FSEC, FOPT, FEPROT, FDPROT
249 AREA |.text|, CODE, READONLY
255 EXPORT Reset_Handler [WEAK]
265 ; Dummy Exception Handlers (infinite loops which can be modified)
268 EXPORT NMI_Handler [WEAK]
273 EXPORT HardFault_Handler [WEAK]
278 EXPORT MemManage_Handler [WEAK]
283 EXPORT BusFault_Handler [WEAK]
288 EXPORT UsageFault_Handler [WEAK]
292 EXPORT SVC_Handler [WEAK]
297 EXPORT DebugMon_Handler [WEAK]
301 EXPORT PendSV_Handler [WEAK]
305 EXPORT SysTick_Handler [WEAK]
310 EXPORT DMA0_IRQHandler [WEAK]
311 EXPORT DMA1_IRQHandler [WEAK]
312 EXPORT DMA2_IRQHandler [WEAK]
313 EXPORT DMA3_IRQHandler [WEAK]
314 EXPORT DMA_Error_IRQHandler [WEAK]
315 EXPORT Reserved21_IRQHandler [WEAK]
316 EXPORT FTFL_IRQHandler [WEAK]
317 EXPORT Read_Collision_IRQHandler [WEAK]
318 EXPORT LVD_LVW_IRQHandler [WEAK]
319 EXPORT LLW_IRQHandler [WEAK]
320 EXPORT Watchdog_IRQHandler [WEAK]
321 EXPORT I2C0_IRQHandler [WEAK]
322 EXPORT SPI0_IRQHandler [WEAK]
323 EXPORT I2S0_Tx_IRQHandler [WEAK]
324 EXPORT I2S0_Rx_IRQHandler [WEAK]
325 EXPORT UART0_LON_IRQHandler [WEAK]
326 EXPORT UART0_RX_TX_IRQHandler [WEAK]
327 EXPORT UART0_ERR_IRQHandler [WEAK]
328 EXPORT UART1_RX_TX_IRQHandler [WEAK]
329 EXPORT UART1_ERR_IRQHandler [WEAK]
330 EXPORT UART2_RX_TX_IRQHandler [WEAK]
331 EXPORT UART2_ERR_IRQHandler [WEAK]
332 EXPORT ADC0_IRQHandler [WEAK]
333 EXPORT CMP0_IRQHandler [WEAK]
334 EXPORT CMP1_IRQHandler [WEAK]
335 EXPORT FTM0_IRQHandler [WEAK]
336 EXPORT FTM1_IRQHandler [WEAK]
337 EXPORT CMT_IRQHandler [WEAK]
338 EXPORT RTC_IRQHandler [WEAK]
339 EXPORT RTC_Seconds_IRQHandler [WEAK]
340 EXPORT PIT0_IRQHandler [WEAK]
341 EXPORT PIT1_IRQHandler [WEAK]
342 EXPORT PIT2_IRQHandler [WEAK]
343 EXPORT PIT3_IRQHandler [WEAK]
344 EXPORT PDB0_IRQHandler [WEAK]
345 EXPORT USB0_IRQHandler [WEAK]
346 EXPORT USBDCD_IRQHandler [WEAK]
347 EXPORT TSI0_IRQHandler [WEAK]
348 EXPORT MCG_IRQHandler [WEAK]
349 EXPORT LPTimer_IRQHandler [WEAK]
350 EXPORT PORTA_IRQHandler [WEAK]
351 EXPORT PORTB_IRQHandler [WEAK]
352 EXPORT PORTC_IRQHandler [WEAK]
353 EXPORT PORTD_IRQHandler [WEAK]
354 EXPORT PORTE_IRQHandler [WEAK]
355 EXPORT SWI_IRQHandler [WEAK]
356 EXPORT DefaultISR [WEAK]
363 Reserved21_IRQHandler
365 Read_Collision_IRQHandler
374 UART0_RX_TX_IRQHandler
376 UART1_RX_TX_IRQHandler
378 UART2_RX_TX_IRQHandler
387 RTC_Seconds_IRQHandler