1 /**************************************************
3 * Copyright 2012 IAR Systems. All rights reserved.
7 **************************************************/
10 ; The modules in this file are included in the libraries, and may be replaced
11 ; by any user-defined modules that define the PUBLIC symbol _program_start or
12 ; a user defined start symbol.
13 ; To override the cstartup defined in the library, simply add your modified
14 ; version to the workbench project.
16 ; The vector table is normally located at address 0.
17 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
18 ; The name "__vector_table" has special meaning for C-SPY:
19 ; it is where the SP start value is found, and the NVIC vector
20 ; table register (VTOR) is initialized to this address if != 0.
27 ;; Forward declaration of sections.
28 SECTION CSTACK:DATA:NOROOT(3)
30 SECTION .intvec:CODE:ROOT(2)
32 EXTERN __iar_program_start
38 DCD sfe(CSTACK) ; Top of Stack
39 DCD Reset_Handler ; Reset Handler
40 DCD NMI_Handler ; NMI Handler
41 DCD HardFault_Handler ; Hard Fault Handler
42 DCD MemManage_Handler ; MPU Fault Handler
43 DCD BusFault_Handler ; Bus Fault Handler
44 DCD UsageFault_Handler ; Usage Fault Handler
49 DCD SVC_Handler ; SVCall Handler
50 DCD DebugMon_Handler ; Debug Monitor Handler
52 DCD PendSV_Handler ; PendSV Handler
53 DCD SysTick_Handler ; SysTick Handler
55 DCD DMA0_IRQHandler ; DMA Channel 0 Transfer Complete
56 DCD DMA1_IRQHandler ; DMA Channel 1 Transfer Complete
57 DCD DMA2_IRQHandler ; DMA Channel 2 Transfer Complete
58 DCD DMA3_IRQHandler ; DMA Channel 3 Transfer Complete
59 DCD DMA4_IRQHandler ; DMA Channel 4 Transfer Complete
60 DCD DMA5_IRQHandler ; DMA Channel 5 Transfer Complete
61 DCD DMA6_IRQHandler ; DMA Channel 6 Transfer Complete
62 DCD DMA7_IRQHandler ; DMA Channel 7 Transfer Complete
63 DCD DMA8_IRQHandler ; DMA Channel 8 Transfer Complete
64 DCD DMA9_IRQHandler ; DMA Channel 9 Transfer Complete
65 DCD DMA10_IRQHandler ; DMA Channel 10 Transfer Complete
66 DCD DMA11_IRQHandler ; DMA Channel 11 Transfer Complete
67 DCD DMA12_IRQHandler ; DMA Channel 12 Transfer Complete
68 DCD DMA13_IRQHandler ; DMA Channel 13 Transfer Complete
69 DCD DMA14_IRQHandler ; DMA Channel 14 Transfer Complete
70 DCD DMA15_IRQHandler ; DMA Channel 15 Transfer Complete
71 DCD DMA_Error_IRQHandler ; DMA Error Interrupt
72 DCD MCM_IRQHandler ; Normal Interrupt
73 DCD FTFE_IRQHandler ; FTFE Command complete interrupt
74 DCD Read_Collision_IRQHandler ; Read Collision Interrupt
75 DCD LVD_LVW_IRQHandler ; Low Voltage Detect, Low Voltage Warning
76 DCD LLW_IRQHandler ; Low Leakage Wakeup
77 DCD Watchdog_IRQHandler ; WDOG Interrupt
79 DCD I2C0_IRQHandler ; I2C0 interrupt
80 DCD I2C1_IRQHandler ; I2C1 interrupt
81 DCD SPI0_IRQHandler ; SPI0 Interrupt
82 DCD SPI1_IRQHandler ; SPI1 Interrupt
83 DCD I2S0_Tx_IRQHandler ; I2S0 transmit interrupt
84 DCD I2S0_Rx_IRQHandler ; I2S0 receive interrupt
85 DCD UART0_LON_IRQHandler ; UART0 LON interrupt
86 DCD UART0_RX_TX_IRQHandler ; UART0 Receive/Transmit interrupt
87 DCD UART0_ERR_IRQHandler ; UART0 Error interrupt
88 DCD UART1_RX_TX_IRQHandler ; UART1 Receive/Transmit interrupt
89 DCD UART1_ERR_IRQHandler ; UART1 Error interrupt
90 DCD UART2_RX_TX_IRQHandler ; UART2 Receive/Transmit interrupt
91 DCD UART2_ERR_IRQHandler ; UART2 Error interrupt
92 DCD UART3_RX_TX_IRQHandler ; UART3 Receive/Transmit interrupt
93 DCD UART3_ERR_IRQHandler ; UART3 Error interrupt
94 DCD ADC0_IRQHandler ; ADC0 interrupt
95 DCD CMP0_IRQHandler ; CMP0 interrupt
96 DCD CMP1_IRQHandler ; CMP1 interrupt
97 DCD FTM0_IRQHandler ; FTM0 fault, overflow and channels interrupt
98 DCD FTM1_IRQHandler ; FTM1 fault, overflow and channels interrupt
99 DCD FTM2_IRQHandler ; FTM2 fault, overflow and channels interrupt
100 DCD CMT_IRQHandler ; CMT interrupt
101 DCD RTC_IRQHandler ; RTC interrupt
102 DCD RTC_Seconds_IRQHandler ; RTC seconds interrupt
103 DCD PIT0_IRQHandler ; PIT timer channel 0 interrupt
104 DCD PIT1_IRQHandler ; PIT timer channel 1 interrupt
105 DCD PIT2_IRQHandler ; PIT timer channel 2 interrupt
106 DCD PIT3_IRQHandler ; PIT timer channel 3 interrupt
107 DCD PDB0_IRQHandler ; PDB0 Interrupt
108 DCD USB0_IRQHandler ; USB0 interrupt
109 DCD USBDCD_IRQHandler ; USBDCD Interrupt
111 DCD DAC0_IRQHandler ; DAC0 interrupt
112 DCD MCG_IRQHandler ; MCG Interrupt
113 DCD LPTimer_IRQHandler ; LPTimer interrupt
114 DCD PORTA_IRQHandler ; Port A interrupt
115 DCD PORTB_IRQHandler ; Port B interrupt
116 DCD PORTC_IRQHandler ; Port C interrupt
117 DCD PORTD_IRQHandler ; Port D interrupt
118 DCD PORTE_IRQHandler ; Port E interrupt
119 DCD SWI_IRQHandler ; Software interrupt
120 DCD SPI2_IRQHandler ; SPI2 Interrupt
121 DCD UART4_RX_TX_IRQHandler ; UART4 Receive/Transmit interrupt
122 DCD UART4_ERR_IRQHandler ; UART4 Error interrupt
123 DCD UART5_RX_TX_IRQHandler ; UART5 Receive/Transmit interrupt
124 DCD UART5_ERR_IRQHandler ; UART5 Error interrupt
125 DCD CMP2_IRQHandler ; CMP2 interrupt
126 DCD FTM3_IRQHandler ; FTM3 fault, overflow and channels interrupt
127 DCD DAC1_IRQHandler ; DAC1 interrupt
128 DCD ADC1_IRQHandler ; ADC1 interrupt
129 DCD I2C2_IRQHandler ; I2C2 interrupt
130 DCD CAN0_ORed_Message_buffer_IRQHandler ; CAN0 OR'd message buffers interrupt
131 DCD CAN0_Bus_Off_IRQHandler ; CAN0 bus off interrupt
132 DCD CAN0_Error_IRQHandler ; CAN0 error interrupt
133 DCD CAN0_Tx_Warning_IRQHandler ; CAN0 Tx warning interrupt
134 DCD CAN0_Rx_Warning_IRQHandler ; CAN0 Rx warning interrupt
135 DCD CAN0_Wake_Up_IRQHandler ; CAN0 wake up interrupt
136 DCD SDHC_IRQHandler ; SDHC interrupt
137 DCD Default_Handler ; 98
138 DCD Default_Handler ; 99
139 DCD Default_Handler ; 100
140 DCD Default_Handler ; 101
141 DCD Default_Handler ; 102
142 DCD Default_Handler ; 103
143 DCD Default_Handler ; 104
144 DCD Default_Handler ; 105
145 DCD Default_Handler ; 106
146 DCD Default_Handler ; 107
147 DCD Default_Handler ; 108
148 DCD Default_Handler ; 109
149 DCD Default_Handler ; 110
150 DCD Default_Handler ; 111
151 DCD Default_Handler ; 112
152 DCD Default_Handler ; 113
153 DCD Default_Handler ; 114
154 DCD Default_Handler ; 115
155 DCD Default_Handler ; 116
156 DCD Default_Handler ; 117
157 DCD Default_Handler ; 118
158 DCD Default_Handler ; 119
159 DCD Default_Handler ; 120
160 DCD Default_Handler ; 121
161 DCD Default_Handler ; 122
162 DCD Default_Handler ; 123
163 DCD Default_Handler ; 124
164 DCD Default_Handler ; 125
165 DCD Default_Handler ; 126
166 DCD Default_Handler ; 127
167 DCD Default_Handler ; 128
168 DCD Default_Handler ; 129
169 DCD Default_Handler ; 130
170 DCD Default_Handler ; 131
171 DCD Default_Handler ; 132
172 DCD Default_Handler ; 133
173 DCD Default_Handler ; 134
174 DCD Default_Handler ; 135
175 DCD Default_Handler ; 136
176 DCD Default_Handler ; 137
177 DCD Default_Handler ; 138
178 DCD Default_Handler ; 139
179 DCD Default_Handler ; 140
180 DCD Default_Handler ; 141
181 DCD Default_Handler ; 142
182 DCD Default_Handler ; 143
183 DCD Default_Handler ; 144
184 DCD Default_Handler ; 145
185 DCD Default_Handler ; 146
186 DCD Default_Handler ; 147
187 DCD Default_Handler ; 148
188 DCD Default_Handler ; 149
189 DCD Default_Handler ; 150
190 DCD Default_Handler ; 151
191 DCD Default_Handler ; 152
192 DCD Default_Handler ; 153
193 DCD Default_Handler ; 154
194 DCD Default_Handler ; 155
195 DCD Default_Handler ; 156
196 DCD Default_Handler ; 157
197 DCD Default_Handler ; 158
198 DCD Default_Handler ; 159
199 DCD Default_Handler ; 160
200 DCD Default_Handler ; 161
201 DCD Default_Handler ; 162
202 DCD Default_Handler ; 163
203 DCD Default_Handler ; 164
204 DCD Default_Handler ; 165
205 DCD Default_Handler ; 166
206 DCD Default_Handler ; 167
207 DCD Default_Handler ; 168
208 DCD Default_Handler ; 169
209 DCD Default_Handler ; 170
210 DCD Default_Handler ; 171
211 DCD Default_Handler ; 172
212 DCD Default_Handler ; 173
213 DCD Default_Handler ; 174
214 DCD Default_Handler ; 175
215 DCD Default_Handler ; 176
216 DCD Default_Handler ; 177
217 DCD Default_Handler ; 178
218 DCD Default_Handler ; 179
219 DCD Default_Handler ; 180
220 DCD Default_Handler ; 181
221 DCD Default_Handler ; 182
222 DCD Default_Handler ; 183
223 DCD Default_Handler ; 184
224 DCD Default_Handler ; 185
225 DCD Default_Handler ; 186
226 DCD Default_Handler ; 187
227 DCD Default_Handler ; 188
228 DCD Default_Handler ; 189
229 DCD Default_Handler ; 190
230 DCD Default_Handler ; 191
231 DCD Default_Handler ; 192
232 DCD Default_Handler ; 193
233 DCD Default_Handler ; 194
234 DCD Default_Handler ; 195
235 DCD Default_Handler ; 196
236 DCD Default_Handler ; 197
237 DCD Default_Handler ; 198
238 DCD Default_Handler ; 199
239 DCD Default_Handler ; 200
240 DCD Default_Handler ; 201
241 DCD Default_Handler ; 202
242 DCD Default_Handler ; 203
243 DCD Default_Handler ; 204
244 DCD Default_Handler ; 205
245 DCD Default_Handler ; 206
246 DCD Default_Handler ; 207
247 DCD Default_Handler ; 208
248 DCD Default_Handler ; 209
249 DCD Default_Handler ; 210
250 DCD Default_Handler ; 211
251 DCD Default_Handler ; 212
252 DCD Default_Handler ; 213
253 DCD Default_Handler ; 214
254 DCD Default_Handler ; 215
255 DCD Default_Handler ; 216
256 DCD Default_Handler ; 217
257 DCD Default_Handler ; 218
258 DCD Default_Handler ; 219
259 DCD Default_Handler ; 220
260 DCD Default_Handler ; 221
261 DCD Default_Handler ; 222
262 DCD Default_Handler ; 223
263 DCD Default_Handler ; 224
264 DCD Default_Handler ; 225
265 DCD Default_Handler ; 226
266 DCD Default_Handler ; 227
267 DCD Default_Handler ; 228
268 DCD Default_Handler ; 229
269 DCD Default_Handler ; 230
270 DCD Default_Handler ; 231
271 DCD Default_Handler ; 232
272 DCD Default_Handler ; 233
273 DCD Default_Handler ; 234
274 DCD Default_Handler ; 235
275 DCD Default_Handler ; 236
276 DCD Default_Handler ; 237
277 DCD Default_Handler ; 238
278 DCD Default_Handler ; 239
279 DCD Default_Handler ; 240
280 DCD Default_Handler ; 241
281 DCD Default_Handler ; 242
282 DCD Default_Handler ; 243
283 DCD Default_Handler ; 244
284 DCD Default_Handler ; 245
285 DCD Default_Handler ; 246
286 DCD Default_Handler ; 247
287 DCD Default_Handler ; 248
288 DCD Default_Handler ; 249
289 DCD Default_Handler ; 250
290 DCD Default_Handler ; 251
291 DCD Default_Handler ; 252
292 DCD Default_Handler ; 253
293 DCD Default_Handler ; 254
294 DCD Default_Handler ; 255
295 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
296 ;;Flash Configuration
297 ;;16-byte flash configuration field that stores default protection settings (loaded on reset)
298 ;;and security information that allows the MCU to restrict acces to the FTFL module.
310 FPROT0 EQU nFPROT0^0xFF
313 FPROT1 EQU nFPROT1^0xFF
316 FPROT2 EQU nFPROT2^0xFF
319 FPROT3 EQU nFPROT3^0xFF
322 FEPROT EQU nFEPROT^0xFF
325 FDPROT EQU nFDPROT^0xFF
330 SECTION FlashConfig:CONST:REORDER:ROOT(2)
333 DCB BackDoorK0, BackDoorK1, BackDoorK2, BackDoorK3
334 DCB BackDoorK4, BackDoorK5, BackDoorK6, BackDoorK7
335 DCB FPROT0, FPROT1, FPROT2, FPROT3
336 DCB FSEC, FOPT, FEPROT, FDPROT
337 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
339 ;; Default interrupt handlers.
342 PUBWEAK Reset_Handler
343 SECTION .text:CODE:NOROOT:REORDER(2)
348 LDR R0, =__iar_program_start
352 PUBWEAK HardFault_Handler
353 PUBWEAK MemManage_Handler
354 PUBWEAK BusFault_Handler
355 PUBWEAK UsageFault_Handler
357 PUBWEAK DebugMon_Handler
358 PUBWEAK PendSV_Handler
359 PUBWEAK SysTick_Handler
360 PUBWEAK DMA0_IRQHandler
361 PUBWEAK DMA1_IRQHandler
362 PUBWEAK DMA2_IRQHandler
363 PUBWEAK DMA3_IRQHandler
364 PUBWEAK DMA4_IRQHandler
365 PUBWEAK DMA5_IRQHandler
366 PUBWEAK DMA6_IRQHandler
367 PUBWEAK DMA7_IRQHandler
368 PUBWEAK DMA8_IRQHandler
369 PUBWEAK DMA9_IRQHandler
370 PUBWEAK DMA10_IRQHandler
371 PUBWEAK DMA11_IRQHandler
372 PUBWEAK DMA12_IRQHandler
373 PUBWEAK DMA13_IRQHandler
374 PUBWEAK DMA14_IRQHandler
375 PUBWEAK DMA15_IRQHandler
376 PUBWEAK DMA_Error_IRQHandler
377 PUBWEAK MCM_IRQHandler
378 PUBWEAK FTFE_IRQHandler
379 PUBWEAK Read_Collision_IRQHandler
380 PUBWEAK LVD_LVW_IRQHandler
381 PUBWEAK LLW_IRQHandler
382 PUBWEAK Watchdog_IRQHandler
383 PUBWEAK I2C0_IRQHandler
384 PUBWEAK I2C1_IRQHandler
385 PUBWEAK SPI0_IRQHandler
386 PUBWEAK SPI1_IRQHandler
387 PUBWEAK I2S0_Tx_IRQHandler
388 PUBWEAK I2S0_Rx_IRQHandler
389 PUBWEAK UART0_LON_IRQHandler
390 PUBWEAK UART0_RX_TX_IRQHandler
391 PUBWEAK UART0_ERR_IRQHandler
392 PUBWEAK UART1_RX_TX_IRQHandler
393 PUBWEAK UART1_ERR_IRQHandler
394 PUBWEAK UART2_RX_TX_IRQHandler
395 PUBWEAK UART2_ERR_IRQHandler
396 PUBWEAK UART3_RX_TX_IRQHandler
397 PUBWEAK UART3_ERR_IRQHandler
398 PUBWEAK ADC0_IRQHandler
399 PUBWEAK CMP0_IRQHandler
400 PUBWEAK CMP1_IRQHandler
401 PUBWEAK FTM0_IRQHandler
402 PUBWEAK FTM1_IRQHandler
403 PUBWEAK FTM2_IRQHandler
404 PUBWEAK CMT_IRQHandler
405 PUBWEAK RTC_IRQHandler
406 PUBWEAK RTC_Seconds_IRQHandler
407 PUBWEAK PIT0_IRQHandler
408 PUBWEAK PIT1_IRQHandler
409 PUBWEAK PIT2_IRQHandler
410 PUBWEAK PIT3_IRQHandler
411 PUBWEAK PDB0_IRQHandler
412 PUBWEAK USB0_IRQHandler
413 PUBWEAK USBDCD_IRQHandler
414 PUBWEAK DAC0_IRQHandler
415 PUBWEAK MCG_IRQHandler
416 PUBWEAK LPTimer_IRQHandler
417 PUBWEAK PORTA_IRQHandler
418 PUBWEAK PORTB_IRQHandler
419 PUBWEAK PORTC_IRQHandler
420 PUBWEAK PORTD_IRQHandler
421 PUBWEAK PORTE_IRQHandler
422 PUBWEAK SWI_IRQHandler
423 PUBWEAK SPI2_IRQHandler
424 PUBWEAK UART4_RX_TX_IRQHandler
425 PUBWEAK UART4_ERR_IRQHandler
426 PUBWEAK UART5_RX_TX_IRQHandler
427 PUBWEAK UART5_ERR_IRQHandler
428 PUBWEAK CMP2_IRQHandler
429 PUBWEAK FTM3_IRQHandler
430 PUBWEAK DAC1_IRQHandler
431 PUBWEAK ADC1_IRQHandler
432 PUBWEAK I2C2_IRQHandler
433 PUBWEAK CAN0_ORed_Message_buffer_IRQHandler
434 PUBWEAK CAN0_Bus_Off_IRQHandler
435 PUBWEAK CAN0_Error_IRQHandler
436 PUBWEAK CAN0_Tx_Warning_IRQHandler
437 PUBWEAK CAN0_Rx_Warning_IRQHandler
438 PUBWEAK CAN0_Wake_Up_IRQHandler
439 PUBWEAK SDHC_IRQHandler
441 SECTION .text:CODE:REORDER:NOROOT(1)
471 Read_Collision_IRQHandler
482 UART0_RX_TX_IRQHandler
484 UART1_RX_TX_IRQHandler
486 UART2_RX_TX_IRQHandler
488 UART3_RX_TX_IRQHandler
498 RTC_Seconds_IRQHandler
516 UART4_RX_TX_IRQHandler
518 UART5_RX_TX_IRQHandler
525 CAN0_ORed_Message_buffer_IRQHandler
526 CAN0_Bus_Off_IRQHandler
527 CAN0_Error_IRQHandler
528 CAN0_Tx_Warning_IRQHandler
529 CAN0_Rx_Warning_IRQHandler
530 CAN0_Wake_Up_IRQHandler