tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC43XX/TOOLCHAIN_GCC_CR/startup_LPC43xx.cpp

   1 //*****************************************************************************
   2 //   +--+
   3 //   | ++----+
   4 //   +-++    |
   5 //     |     |
   6 //   +-+--+  |
   7 //   | +--+--+
   8 //   +----+    Copyright (c) 2011-12 Code Red Technologies Ltd.
   9 //
  10 // LPC43xx Microcontroller Startup code for use with Red Suite
  11 //
  12 // Version : 120430
  13 //
  14 // Software License Agreement
  15 //
  16 // The software is owned by Code Red Technologies and/or its suppliers, and is
  17 // protected under applicable copyright laws.  All rights are reserved.  Any
  18 // use in violation of the foregoing restrictions may subject the user to criminal
  19 // sanctions under applicable laws, as well as to civil liability for the breach
  20 // of the terms and conditions of this license.
  21 //
  22 // THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
  23 // OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
  24 // MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
  25 // USE OF THIS SOFTWARE FOR COMMERCIAL DEVELOPMENT AND/OR EDUCATION IS SUBJECT
  26 // TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH
  27 // CODE RED TECHNOLOGIES LTD.
  28 //
  29 //*****************************************************************************
  30 #if defined (__cplusplus)
  31 #ifdef __REDLIB__
  32 #error Redlib does not support C++
  33 #else
  34 //*****************************************************************************
  35 //
  36 // The entry point for the C++ library startup
  37 //
  38 //*****************************************************************************
  39 extern "C" {
  40         extern void __libc_init_array(void);
  41 }
  42 #endif
  43 #endif
  44
  45 #define WEAK __attribute__ ((weak))
  46 #define ALIAS(f) __attribute__ ((weak, alias (#f)))
  47
  48 // Code Red - if CMSIS is being used, then SystemInit() routine
  49 // will be called by startup code rather than in application's main()
  50 #if defined (__USE_CMSIS)
  51 #include "LPC43xx.h"
  52 #endif
  53
  54 //*****************************************************************************
  55 #if defined (__cplusplus)
  56 extern "C" {
  57 #endif
  58
  59 //*****************************************************************************
  60 //
  61 // Forward declaration of the default handlers. These are aliased.
  62 // When the application defines a handler (with the same name), this will
  63 // automatically take precedence over these weak definitions
  64 //
  65 //*****************************************************************************
  66      void ResetISR(void);
  67 WEAK void NMI_Handler(void);
  68 WEAK void HardFault_Handler(void);
  69 WEAK void MemManage_Handler(void);
  70 WEAK void BusFault_Handler(void);
  71 WEAK void UsageFault_Handler(void);
  72 WEAK void SVC_Handler(void);
  73 WEAK void DebugMon_Handler(void);
  74 WEAK void PendSV_Handler(void);
  75 WEAK void SysTick_Handler(void);
  76 WEAK void IntDefaultHandler(void);
  77
  78 //*****************************************************************************
  79 //
  80 // Forward declaration of the specific IRQ handlers. These are aliased
  81 // to the IntDefaultHandler, which is a 'forever' loop. When the application
  82 // defines a handler (with the same name), this will automatically take
  83 // precedence over these weak definitions
  84 //
  85 //*****************************************************************************
  86 void DAC_IRQHandler(void) ALIAS(IntDefaultHandler);
  87 void M0CORE_IRQHandler(void) ALIAS(IntDefaultHandler);
  88 void DMA_IRQHandler(void) ALIAS(IntDefaultHandler);
  89 void EZH_IRQHandler(void) ALIAS(IntDefaultHandler);
  90 void FLASH_EEPROM_IRQHandler(void) ALIAS(IntDefaultHandler);
  91 void ETH_IRQHandler(void) ALIAS(IntDefaultHandler);
  92 void SDIO_IRQHandler(void) ALIAS(IntDefaultHandler);
  93 void LCD_IRQHandler(void) ALIAS(IntDefaultHandler);
  94 void USB0_IRQHandler(void) ALIAS(IntDefaultHandler);
  95 void USB1_IRQHandler(void) ALIAS(IntDefaultHandler);
  96 void SCT_IRQHandler(void) ALIAS(IntDefaultHandler);
  97 void RIT_IRQHandler(void) ALIAS(IntDefaultHandler);
  98 void TIMER0_IRQHandler(void) ALIAS(IntDefaultHandler);
  99 void TIMER1_IRQHandler(void) ALIAS(IntDefaultHandler);
 100 void TIMER2_IRQHandler(void) ALIAS(IntDefaultHandler);
 101 void TIMER3_IRQHandler(void) ALIAS(IntDefaultHandler);
 102 void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler);
 103 void ADC0_IRQHandler(void) ALIAS(IntDefaultHandler);
 104 void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler);
 105 void SPI_IRQHandler (void) ALIAS(IntDefaultHandler);
 106 void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler);
 107 void ADC1_IRQHandler(void) ALIAS(IntDefaultHandler);
 108 void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler);
 109 void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler);
 110 void UART0_IRQHandler(void) ALIAS(IntDefaultHandler);
 111 void UART1_IRQHandler(void) ALIAS(IntDefaultHandler);
 112 void UART2_IRQHandler(void) ALIAS(IntDefaultHandler);
 113 void UART3_IRQHandler(void) ALIAS(IntDefaultHandler);
 114 void I2S0_IRQHandler(void) ALIAS(IntDefaultHandler);
 115 void I2S1_IRQHandler(void) ALIAS(IntDefaultHandler);
 116 void SPIFI_IRQHandler(void) ALIAS(IntDefaultHandler);
 117 void SGPIO_IRQHandler(void) ALIAS(IntDefaultHandler);
 118 void GPIO0_IRQHandler(void) ALIAS(IntDefaultHandler);
 119 void GPIO1_IRQHandler(void) ALIAS(IntDefaultHandler);
 120 void GPIO2_IRQHandler(void) ALIAS(IntDefaultHandler);
 121 void GPIO3_IRQHandler(void) ALIAS(IntDefaultHandler);
 122 void GPIO4_IRQHandler(void) ALIAS(IntDefaultHandler);
 123 void GPIO5_IRQHandler(void) ALIAS(IntDefaultHandler);
 124 void GPIO6_IRQHandler(void) ALIAS(IntDefaultHandler);
 125 void GPIO7_IRQHandler(void) ALIAS(IntDefaultHandler);
 126 void GINT0_IRQHandler(void) ALIAS(IntDefaultHandler);
 127 void GINT1_IRQHandler(void) ALIAS(IntDefaultHandler);
 128 void EVRT_IRQHandler(void) ALIAS(IntDefaultHandler);
 129 void CAN1_IRQHandler(void) ALIAS(IntDefaultHandler);
 130 void VADC_IRQHandler(void) ALIAS(IntDefaultHandler);
 131 void ATIMER_IRQHandler(void) ALIAS(IntDefaultHandler);
 132 void RTC_IRQHandler(void) ALIAS(IntDefaultHandler);
 133 void WDT_IRQHandler(void) ALIAS(IntDefaultHandler);
 134 void M0s_IRQHandler(void) ALIAS(IntDefaultHandler);
 135 void CAN0_IRQHandler(void) ALIAS(IntDefaultHandler);
 136 void QEI_IRQHandler(void) ALIAS(IntDefaultHandler);
 137
 138
 139 //*****************************************************************************
 140 //
 141 // The entry point for the application.
 142 // __main() is the entry point for Redlib based applications
 143 // main() is the entry point for Newlib based applications
 144 //
 145 //*****************************************************************************
 146 #if defined (__REDLIB__)
 147 extern void __main(void);
 148 #endif
 149 extern int main(void);
 150 //*****************************************************************************
 151 //
 152 // External declaration for the pointer to the stack top from the Linker Script
 153 //
 154 //*****************************************************************************
 155 extern void _vStackTop(void);
 156
 157 //*****************************************************************************
 158 #if defined (__cplusplus)
 159 } // extern "C"
 160 #endif
 161 //*****************************************************************************
 162 //
 163 // The vector table.
 164 // This relies on the linker script to place at correct location in memory.
 165 //
 166 //*****************************************************************************
 167 extern void (* const g_pfnVectors[])(void);
 168 __attribute__ ((section(".isr_vector")))
 169 void (* const g_pfnVectors[])(void) = {
 170                 // Core Level - CM4
 171                 &_vStackTop, // The initial stack pointer
 172                 ResetISR,                                                               // The reset handler
 173                 NMI_Handler,                                                    // The NMI handler
 174                 HardFault_Handler,                                              // The hard fault handler
 175                 MemManage_Handler,                                              // The MPU fault handler
 176                 BusFault_Handler,                                               // The bus fault handler
 177                 UsageFault_Handler,                                             // The usage fault handler
 178                 0,                                                                              // Reserved
 179                 0,                                                                              // Reserved
 180                 0,                                                                              // Reserved
 181                 0,                                                                              // Reserved
 182                 SVC_Handler,                                                    // SVCall handler
 183                 DebugMon_Handler,                                               // Debug monitor handler
 184                 0,                                                                              // Reserved
 185                 PendSV_Handler,                                                 // The PendSV handler
 186                 SysTick_Handler,                                                // The SysTick handler
 187
 188                 // Chip Level - LPC43
 189                 DAC_IRQHandler,                         // 16
 190                 M0CORE_IRQHandler,                      // 17
 191                 DMA_IRQHandler,                         // 18
 192                 EZH_IRQHandler,                         // 19
 193                 FLASH_EEPROM_IRQHandler,        // 20
 194                 ETH_IRQHandler,                         // 21
 195                 SDIO_IRQHandler,                        // 22
 196                 LCD_IRQHandler,                         // 23
 197                 USB0_IRQHandler,                        // 24
 198                 USB1_IRQHandler,                        // 25
 199                 SCT_IRQHandler,                         // 26
 200                 RIT_IRQHandler,                         // 27
 201                 TIMER0_IRQHandler,                      // 28
 202                 TIMER1_IRQHandler,                      // 29
 203                 TIMER2_IRQHandler,                      // 30
 204                 TIMER3_IRQHandler,                      // 31
 205                 MCPWM_IRQHandler,                       // 32
 206                 ADC0_IRQHandler,                        // 33
 207                 I2C0_IRQHandler,                        // 34
 208                 I2C1_IRQHandler,                        // 35
 209                 SPI_IRQHandler,                         // 36
 210                 ADC1_IRQHandler,                        // 37
 211                 SSP0_IRQHandler,                        // 38
 212                 SSP1_IRQHandler,                        // 39
 213                 UART0_IRQHandler,                       // 40
 214                 UART1_IRQHandler,                       // 41
 215                 UART2_IRQHandler,                       // 42
 216                 UART3_IRQHandler,                       // 43
 217                 I2S0_IRQHandler,                        // 44
 218                 I2S1_IRQHandler,                        // 45
 219                 SPIFI_IRQHandler,                       // 46
 220                 SGPIO_IRQHandler,                       // 47
 221                 GPIO0_IRQHandler,                       // 48
 222                 GPIO1_IRQHandler,                       // 49
 223                 GPIO2_IRQHandler,                       // 50
 224                 GPIO3_IRQHandler,                       // 51
 225                 GPIO4_IRQHandler,                       // 52
 226                 GPIO5_IRQHandler,                       // 53
 227                 GPIO6_IRQHandler,                       // 54
 228                 GPIO7_IRQHandler,                       // 55
 229                 GINT0_IRQHandler,                       // 56
 230                 GINT1_IRQHandler,                       // 57
 231                 EVRT_IRQHandler,                        // 58
 232                 CAN1_IRQHandler,                        // 59
 233                 0,                                                      // 60
 234                 VADC_IRQHandler,                        // 61
 235                 ATIMER_IRQHandler,                      // 62
 236                 RTC_IRQHandler,                         // 63
 237                 0,                                                      // 64
 238                 WDT_IRQHandler,                         // 65
 239                 M0s_IRQHandler,                         // 66
 240                 CAN0_IRQHandler,                        // 67
 241                 QEI_IRQHandler,                         // 68
 242         };
 243
 244 //*****************************************************************************
 245 // Functions to carry out the initialization of RW and BSS data sections. These
 246 // are written as separate functions rather than being inlined within the
 247 // ResetISR() function in order to cope with MCUs with multiple banks of
 248 // memory.
 249 //*****************************************************************************
 250 __attribute__ ((section(".after_vectors")))
 251 void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
 252         unsigned int *pulDest = (unsigned int*) start;
 253         unsigned int *pulSrc = (unsigned int*) romstart;
 254         unsigned int loop;
 255         for (loop = 0; loop < len; loop = loop + 4)
 256                 *pulDest++ = *pulSrc++;
 257 }
 258
 259 __attribute__ ((section(".after_vectors")))
 260 void bss_init(unsigned int start, unsigned int len) {
 261         unsigned int *pulDest = (unsigned int*) start;
 262         unsigned int loop;
 263         for (loop = 0; loop < len; loop = loop + 4)
 264                 *pulDest++ = 0;
 265 }
 266
 267 //*****************************************************************************
 268 // The following symbols are constructs generated by the linker, indicating
 269 // the location of various points in the "Global Section Table". This table is
 270 // created by the linker via the Code Red managed linker script mechanism. It
 271 // contains the load address, execution address and length of each RW data
 272 // section and the execution and length of each BSS (zero initialized) section.
 273 //*****************************************************************************
 274 extern unsigned int __data_section_table;
 275 extern unsigned int __data_section_table_end;
 276 extern unsigned int __bss_section_table;
 277 extern unsigned int __bss_section_table_end;
 278
 279 //*****************************************************************************
 280 // Reset entry point for your code.
 281 // Sets up a simple runtime environment and initializes the C/C++
 282 // library.
 283 //
 284 //*****************************************************************************
 285 void
 286 ResetISR(void) {
 287
 288 // *************************************************************
 289 // The following conditional block of code manually resets as
 290 // much of the peripheral set of the LPC43 as possible. This is
 291 // done because the LPC43 does not provide a means of triggering
 292 // a full system reset under debugger control, which can cause
 293 // problems in certain circumstances when debugging.
 294 //
 295 // You can prevent this code block being included if you require
 296 // (for example when creating a final executable which you will
 297 // not debug) by setting the define 'DONT_RESET_ON_RESTART'.
 298 //
 299 #ifndef DONT_RESET_ON_RESTART
 300
 301         // Disable interrupts
 302         __asm volatile ("cpsid i");
 303         // equivalent to CMSIS '__disable_irq()' function
 304
 305         unsigned int *RESET_CONTROL = (unsigned int *) 0x40053100;
 306         // LPC_RGU->RESET_CTRL0 @ 0x40053100
 307         // LPC_RGU->RESET_CTRL1 @ 0x40053104
 308         // Note that we do not use the CMSIS register access mechanism,
 309         // as there is no guarantee that the project has been configured
 310         // to use CMSIS.
 311
 312         // Write to LPC_RGU->RESET_CTRL0
 313         *(RESET_CONTROL+0) = 0x10DF0000;
 314         // GPIO_RST|AES_RST|ETHERNET_RST|SDIO_RST|DMA_RST|
 315         // USB1_RST|USB0_RST|LCD_RST
 316
 317         // Write to LPC_RGU->RESET_CTRL1
 318         *(RESET_CONTROL+1) = 0x01DFF7FF;
 319         // M0APP_RST|CAN0_RST|CAN1_RST|I2S_RST|SSP1_RST|SSP0_RST|
 320         // I2C1_RST|I2C0_RST|UART3_RST|UART1_RST|UART1_RST|UART0_RST|
 321         // DAC_RST|ADC1_RST|ADC0_RST|QEI_RST|MOTOCONPWM_RST|SCT_RST|
 322         // RITIMER_RST|TIMER3_RST|TIMER2_RST|TIMER1_RST|TIMER0_RST
 323
 324         // Clear all pending interrupts in the NVIC
 325         volatile unsigned int *NVIC_ICPR = (unsigned int *) 0xE000E280;
 326         unsigned int irqpendloop;
 327         for (irqpendloop = 0; irqpendloop < 8; irqpendloop++) {
 328                 *(NVIC_ICPR+irqpendloop)= 0xFFFFFFFF;
 329         }
 330
 331         // Reenable interrupts
 332         __asm volatile ("cpsie i");
 333         // equivalent to CMSIS '__enable_irq()' function
 334
 335 #endif  // ifndef DONT_RESET_ON_RESTART
 336 // *************************************************************
 337
 338
 339     //
 340     // Copy the data sections from flash to SRAM.
 341     //
 342         unsigned int LoadAddr, ExeAddr, SectionLen;
 343         unsigned int *SectionTableAddr;
 344
 345         // Load base address of Global Section Table
 346         SectionTableAddr = &__data_section_table;
 347
 348     // Copy the data sections from flash to SRAM.
 349         while (SectionTableAddr < &__data_section_table_end) {
 350                 LoadAddr = *SectionTableAddr++;
 351                 ExeAddr = *SectionTableAddr++;
 352                 SectionLen = *SectionTableAddr++;
 353                 data_init(LoadAddr, ExeAddr, SectionLen);
 354         }
 355         // At this point, SectionTableAddr = &__bss_section_table;
 356         // Zero fill the bss segment
 357         while (SectionTableAddr < &__bss_section_table_end) {
 358                 ExeAddr = *SectionTableAddr++;
 359                 SectionLen = *SectionTableAddr++;
 360                 bss_init(ExeAddr, SectionLen);
 361         }
 362
 363 #if defined (__VFP_FP__) && !defined (__SOFTFP__)
 364 /*
 365  * Code to enable the Cortex-M4 FPU only included
 366  * if appropriate build options have been selected.
 367  * Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C)
 368  */
 369           // CPACR is located at address 0xE000ED88
 370         asm("LDR.W R0, =0xE000ED88");
 371           // Read CPACR
 372         asm("LDR R1, [R0]");
 373           // Set bits 20-23 to enable CP10 and CP11 coprocessors
 374         asm(" ORR R1, R1, #(0xF << 20)");
 375           // Write back the modified value to the CPACR
 376         asm("STR R1, [R0]");
 377 #endif // (__VFP_FP__) && !(__SOFTFP__)
 378
 379         // ******************************
 380         // Check to see if we are running the code from a non-zero
 381     // address (eg RAM, external flash), in which case we need
 382     // to modify the VTOR register to tell the CPU that the
 383     // vector table is located at a non-0x0 address.
 384
 385         // Note that we do not use the CMSIS register access mechanism,
 386         // as there is no guarantee that the project has been configured
 387         // to use CMSIS.
 388         unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
 389         if ((unsigned int *)g_pfnVectors!=(unsigned int *) 0x00000000) {
 390                 // CMSIS : SCB->VTOR = <address of vector table>
 391                 *pSCB_VTOR = (unsigned int)g_pfnVectors;
 392         }
 393
 394 #ifdef __USE_CMSIS
 395         SystemInit();
 396 #endif
 397
 398 #if defined (__cplusplus)
 399         //
 400         // Call C++ library initialisation
 401         //
 402         __libc_init_array();
 403 #endif
 404
 405 #if defined (__REDLIB__)
 406         // Call the Redlib library, which in turn calls main()
 407         __main() ;
 408 #else
 409         main();
 410 #endif
 411
 412         //
 413         // main() shouldn't return, but if it does, we'll just enter an infinite loop
 414         //
 415         while (1) {
 416                 ;
 417         }
 418 }
 419
 420 //*****************************************************************************
 421 // Default exception handlers. Override the ones here by defining your own
 422 // handler routines in your application code.
 423 //*****************************************************************************
 424 __attribute__ ((section(".after_vectors")))
 425 void NMI_Handler(void)
 426 {
 427     while(1)
 428     {
 429     }
 430 }
 431 __attribute__ ((section(".after_vectors")))
 432 void HardFault_Handler(void)
 433 {
 434     while(1)
 435     {
 436     }
 437 }
 438 __attribute__ ((section(".after_vectors")))
 439 void MemManage_Handler(void)
 440 {
 441     while(1)
 442     {
 443     }
 444 }
 445 __attribute__ ((section(".after_vectors")))
 446 void BusFault_Handler(void)
 447 {
 448     while(1)
 449     {
 450     }
 451 }
 452 __attribute__ ((section(".after_vectors")))
 453 void UsageFault_Handler(void)
 454 {
 455     while(1)
 456     {
 457     }
 458 }
 459 __attribute__ ((section(".after_vectors")))
 460 void SVC_Handler(void)
 461 {
 462     while(1)
 463     {
 464     }
 465 }
 466 __attribute__ ((section(".after_vectors")))
 467 void DebugMon_Handler(void)
 468 {
 469     while(1)
 470     {
 471     }
 472 }
 473 __attribute__ ((section(".after_vectors")))
 474 void PendSV_Handler(void)
 475 {
 476     while(1)
 477     {
 478     }
 479 }
 480 __attribute__ ((section(".after_vectors")))
 481 void SysTick_Handler(void)
 482 {
 483     while(1)
 484     {
 485     }
 486 }
 487
 488 //*****************************************************************************
 489 //
 490 // Processor ends up here if an unexpected interrupt occurs or a specific
 491 // handler is not present in the application code.
 492 //
 493 //*****************************************************************************
 494 __attribute__ ((section(".after_vectors")))
 495 void IntDefaultHandler(void)
 496 {
 497     while(1)
 498     {
 499     }
 500 }