tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/TOOLCHAIN_ARM_MICRO/startup_LPC8xx.s

   1 ;/*****************************************************************************
   2 ; * @file:    startup_LPC8xx.s
   3 ; * @purpose: CMSIS Cortex-M0+ Core Device Startup File
   4 ; *           for the NXP LPC8xx Device Series
   5 ; * @version: V1.0
   6 ; * @date:    16. Aug. 2012
   7 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
   8 ; *
   9 ; * Copyright (C) 2012 ARM Limited. All rights reserved.
  10 ; * ARM Limited (ARM) is supplying this software for use with Cortex-M0+
  11 ; * processor based microcontrollers.  This file can be freely distributed
  12 ; * within development tools that are supporting such ARM based processors.
  13 ; *
  14 ; * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
  15 ; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
  16 ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
  17 ; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
  18 ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
  19 ; *
  20 ; *****************************************************************************/
  21
  22
  23 ; <h> Stack Configuration
  24 ;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  25 ; </h>
  26
  27 Stack_Size      EQU     0x00000200
  28
  29                 AREA    STACK, NOINIT, READWRITE, ALIGN=3
  30                 EXPORT  __initial_sp
  31
  32 Stack_Mem       SPACE   Stack_Size
  33 __initial_sp            EQU     0x10001000
  34
  35
  36 ; <h> Heap Configuration
  37 ;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  38 ; </h>
  39
  40 Heap_Size       EQU     0x00000000
  41
  42                 AREA    HEAP, NOINIT, READWRITE, ALIGN=3
  43                 EXPORT  __heap_base
  44                 EXPORT  __heap_limit
  45
  46 __heap_base
  47 Heap_Mem        SPACE   Heap_Size
  48 __heap_limit
  49
  50                 PRESERVE8
  51                 THUMB
  52
  53
  54 ; Vector Table Mapped to Address 0 at Reset
  55
  56                 AREA    RESET, DATA, READONLY
  57                 EXPORT  __Vectors
  58
  59 __Vectors       DCD     __initial_sp              ; Top of Stack
  60                 DCD     Reset_Handler             ; Reset Handler
  61                 DCD     NMI_Handler               ; NMI Handler
  62                 DCD     HardFault_Handler         ; Hard Fault Handler
  63                 DCD     0                         ; Reserved
  64                 DCD     0                         ; Reserved
  65                 DCD     0                         ; Reserved
  66                 DCD     0                         ; Reserved
  67                 DCD     0                         ; Reserved
  68                 DCD     0                         ; Reserved
  69                 DCD     0                         ; Reserved
  70                 DCD     SVC_Handler               ; SVCall Handler
  71                 DCD     0                         ; Reserved
  72                 DCD     0                         ; Reserved
  73                 DCD     PendSV_Handler            ; PendSV Handler
  74                 DCD     SysTick_Handler           ; SysTick Handler
  75
  76                 ; External Interrupts
  77                 DCD     SPI0_IRQHandler             ; SPI0 controller
  78                 DCD     SPI1_IRQHandler             ; SPI1 controller
  79                 DCD     0                           ; Reserved
  80                 DCD     UART0_IRQHandler            ; UART0
  81                 DCD     UART1_IRQHandler            ; UART1
  82                 DCD     UART2_IRQHandler            ; UART2
  83                 DCD     0                           ; Reserved
  84                 DCD     0                           ; Reserved
  85                 DCD     I2C_IRQHandler              ; I2C controller
  86                 DCD     SCT_IRQHandler              ; Smart Counter Timer
  87                 DCD     MRT_IRQHandler              ; Multi-Rate Timer
  88                 DCD     CMP_IRQHandler              ; Comparator
  89                 DCD     WDT_IRQHandler              ; PIO1 (0:11)
  90                 DCD     BOD_IRQHandler              ; Brown Out Detect
  91                 DCD     0                           ; Reserved
  92                 DCD     WKT_IRQHandler              ; Wakeup timer
  93                 DCD     0                           ; Reserved
  94                 DCD     0                           ; Reserved
  95                 DCD     0                           ; Reserved
  96                 DCD     0                           ; Reserved
  97                 DCD     0                           ; Reserved
  98                 DCD     0                           ; Reserved
  99                 DCD     0                           ; Reserved
 100                 DCD     0                           ; Reserved
 101                 DCD     PININT0_IRQHandler          ; PIO INT0
 102                 DCD     PININT1_IRQHandler         ; PIO INT1
 103                 DCD     PININT2_IRQHandler         ; PIO INT2
 104                 DCD     PININT3_IRQHandler         ; PIO INT3
 105                 DCD     PININT4_IRQHandler         ; PIO INT4
 106                 DCD     PININT5_IRQHandler         ; PIO INT5
 107                 DCD     PININT6_IRQHandler         ; PIO INT6
 108                 DCD     PININT7_IRQHandler         ; PIO INT7
 109
 110
 111                 IF      :LNOT::DEF:NO_CRP
 112                 AREA    |.ARM.__at_0x02FC|, CODE, READONLY
 113 CRP_Key         DCD     0xFFFFFFFF
 114                 ENDIF
 115
 116
 117                 AREA    |.text|, CODE, READONLY
 118
 119
 120 ; Reset Handler
 121
 122 Reset_Handler   PROC
 123                 EXPORT  Reset_Handler             [WEAK]
 124                 IMPORT  SystemInit
 125                 IMPORT  __main
 126                 LDR     R0, =SystemInit
 127                 BLX     R0
 128                 LDR     R0, =__main
 129                 BX      R0
 130                 ENDP
 131
 132
 133 ; Dummy Exception Handlers (infinite loops which can be modified)
 134 ; now, under COMMON lpc8xx_nmi.c and lpc8xx_nmi.h, a real NMI handler is created if NMI is enabled
 135 ; for particular peripheral.
 136 ;NMI_Handler     PROC
 137 ;                EXPORT  NMI_Handler               [WEAK]
 138 ;                B       .
 139 ;                ENDP
 140 HardFault_Handler\
 141                 PROC
 142                 EXPORT  HardFault_Handler         [WEAK]
 143                 B       .
 144                 ENDP
 145 SVC_Handler     PROC
 146                 EXPORT  SVC_Handler               [WEAK]
 147                 B       .
 148                 ENDP
 149 PendSV_Handler  PROC
 150                 EXPORT  PendSV_Handler            [WEAK]
 151                 B       .
 152                 ENDP
 153 SysTick_Handler PROC
 154                 EXPORT  SysTick_Handler           [WEAK]
 155                 B       .
 156                 ENDP
 157
 158 Default_Handler PROC
 159
 160                 EXPORT  NMI_Handler               [WEAK]
 161                 EXPORT  SPI0_IRQHandler           [WEAK]
 162                 EXPORT  SPI1_IRQHandler           [WEAK]
 163                 EXPORT  UART0_IRQHandler          [WEAK]
 164                 EXPORT  UART1_IRQHandler          [WEAK]
 165                 EXPORT  UART2_IRQHandler          [WEAK]
 166                 EXPORT  I2C_IRQHandler            [WEAK]
 167                 EXPORT  SCT_IRQHandler            [WEAK]
 168                 EXPORT  MRT_IRQHandler            [WEAK]
 169                 EXPORT  CMP_IRQHandler            [WEAK]
 170                 EXPORT  WDT_IRQHandler            [WEAK]
 171                 EXPORT  BOD_IRQHandler            [WEAK]
 172
 173                 EXPORT  WKT_IRQHandler            [WEAK]
 174
 175                 EXPORT  PININT0_IRQHandler      [WEAK]
 176                 EXPORT  PININT1_IRQHandler      [WEAK]
 177                 EXPORT  PININT2_IRQHandler      [WEAK]
 178                 EXPORT  PININT3_IRQHandler      [WEAK]
 179                 EXPORT  PININT4_IRQHandler      [WEAK]
 180                 EXPORT  PININT5_IRQHandler      [WEAK]
 181                 EXPORT  PININT6_IRQHandler      [WEAK]
 182                 EXPORT  PININT7_IRQHandler      [WEAK]
 183
 184 NMI_Handler
 185 SPI0_IRQHandler
 186 SPI1_IRQHandler
 187 UART0_IRQHandler
 188 UART1_IRQHandler
 189 UART2_IRQHandler
 190 I2C_IRQHandler
 191 SCT_IRQHandler
 192 MRT_IRQHandler
 193 CMP_IRQHandler
 194 WDT_IRQHandler
 195 BOD_IRQHandler
 196 WKT_IRQHandler
 197 PININT0_IRQHandler
 198 PININT1_IRQHandler
 199 PININT2_IRQHandler
 200 PININT3_IRQHandler
 201 PININT4_IRQHandler
 202 PININT5_IRQHandler
 203 PININT6_IRQHandler
 204 PININT7_IRQHandler
 205
 206                 B       .
 207
 208                 ENDP
 209
 210                 ALIGN
 211                 END