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[tmk_keyboard.git] / tool / mbed / mbed-sdk / libraries / mbed / targets / cmsis / TARGET_RENESAS / TARGET_RZ_A1H / inc / iobitmasks / usb_iobitmask.h
1 /*******************************************************************************
2 * DISCLAIMER
3 * This software is supplied by Renesas Electronics Corporation and is only
4 * intended for use with Renesas products. No other uses are authorized. This
5 * software is owned by Renesas Electronics Corporation and is protected under
6 * all applicable laws, including copyright laws.
7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
16 * Renesas reserves the right, without notice, to make changes to this software
17 * and to discontinue the availability of this software. By using this software,
18 * you agree to the additional terms and conditions found by accessing the
19 * following link:
20 * http://www.renesas.com/disclaimer
21 * Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
22 *******************************************************************************/
23 /*******************************************************************************
24 * File Name : usb_iobitmask.h
25 * $Rev: 1116 $
26 * $Date:: 2014-07-09 16:29:19 +0900#$
27 * Description : USB register define header
28 *******************************************************************************/
29 #ifndef USB_IOBITMASK_H
30 #define USB_IOBITMASK_H
31
32 /*==============================================*/
33 /* SYSCFG */
34 /*==============================================*/
35 #define USB_SYSCFG_USBE (0x0001u)
36 #define USB_SYSCFG_UPLLE (0x0002u)
37 #define USB_SYSCFG_UCKSEL (0x0004u)
38 /* #define USB_SYSCFG_RESERVED1 (0x0008u) */
39 #define USB_SYSCFG_DPRPU (0x0010u)
40 #define USB_SYSCFG_DRPD (0x0020u)
41 #define USB_SYSCFG_DCFM (0x0040u)
42 #define USB_SYSCFG_HSE (0x0080u)
43 /* #define USB_SYSCFG_RESERVED2 (0xFF00u) */
44
45 #define USB_SYSCFG_USBE_SHIFT (0)
46 #define USB_SYSCFG_UPLLE_SHIFT (1)
47 #define USB_SYSCFG_UCKSEL_SHIFT (2)
48 /* #define USB_SYSCFG_RESERVED1_SHIFT (3) */
49 #define USB_SYSCFG_DPRPU_SHIFT (4)
50 #define USB_SYSCFG_DRPD_SHIFT (5)
51 #define USB_SYSCFG_DCFM_SHIFT (6)
52 #define USB_SYSCFG_HSE_SHIFT (7)
53 /* #define USB_SYSCFG_RESERVED2_SHIFT (8) */
54
55 /*==============================================*/
56 /* BUSWAIT */
57 /*==============================================*/
58 #define USB_BUSWAIT_BWAIT (0x003Fu)
59
60 #define USB_BUSWAIT_BWAIT_SHIFT (0)
61
62 /*==============================================*/
63 /* SYSSTS0 */
64 /*==============================================*/
65 #define USB_SYSSTS0_LNST (0x0003u)
66 #define USB_SYSSTS0_SOFEA (0x0020u)
67 #define USB_SYSSTS0_HTACT (0x0040u)
68
69 #define USB_SYSSTS0_LNST_SHIFT (0)
70 #define USB_SYSSTS0_SOFEA_SHIFT (5)
71 #define USB_SYSSTS0_HTACT_SHIFT (6)
72
73 /*==============================================*/
74 /* DVSTCTR0 */
75 /*==============================================*/
76 #define USB_DVSTCTR0_RHST (0x0007u)
77 /* #define USB_DVSTCTR0_RESERVED (0x0008u) */
78 #define USB_DVSTCTR0_UACT (0x0010u)
79 #define USB_DVSTCTR0_RESUME (0x0020u)
80 #define USB_DVSTCTR0_USBRST (0x0040u)
81 #define USB_DVSTCTR0_RWUPE (0x0080u)
82 #define USB_DVSTCTR0_WKUP (0x0100u)
83
84 #define USB_DVSTCTR0_RHST_SHIFT (0)
85 /* #define USB_DVSTCTR0_RESERVED_SHIFT (3) */
86 #define USB_DVSTCTR0_UACT_SHIFT (4)
87 #define USB_DVSTCTR0_RESUME_SHIFT (5)
88 #define USB_DVSTCTR0_USBRST_SHIFT (6)
89 #define USB_DVSTCTR0_RWUPE_SHIFT (7)
90 #define USB_DVSTCTR0_WKUP_SHIFT (8)
91
92 /*==============================================*/
93 /* TESTMODE */
94 /*==============================================*/
95 #define USB_TESTMODE_UTST (0x000Fu)
96 /* #define USB_TESTMODE_RESERVED (0xFFF0u) */
97
98 #define USB_TESTMODE_UTST_SHIFT (0)
99 /* #define USB_TESTMODE_RESERVED_SHIFT (4) */
100
101 /*==============================================*/
102 /* DnFBCFG */
103 /*==============================================*/
104 /* #define USB_DnFBCFG_RESERVED1 (0x000Fu) */
105 #define USB_DnFBCFG_TENDE (0x0010u)
106 /* #define USB_DnFBCFG_RESERVED2 (0x0FE0u) */
107 #define USB_DnFBCFG_DFACC (0x3000u)
108 /* #define USB_DnFBCFG_RESERVED3 (0xC000u) */
109
110 /* #define USB_DnFBCFG_RESERVED1_SHIFT (0) */
111 #define USB_DnFBCFG_TENDE_SHIFT (4)
112 /* #define USB_DnFBCFG_RESERVED2_SHIFT (5) */
113 #define USB_DnFBCFG_DFACC_SHIFT (12)
114 /* #define USB_DnFBCFG_RESERVED3_SHIFT (14) */
115
116 /*==============================================*/
117 /* CFIFO */
118 /*==============================================*/
119 #define USB_CFIFO_FIFOPORT (0xFFFFFFFFuL)
120
121 #define USB_CFIFO_FIFOPORT_SHIFT (0)
122
123 /*==============================================*/
124 /* DnFIFO */
125 /*==============================================*/
126 #define USB_DnFIFO_FIFOPORT (0xFFFFFFFFuL)
127
128 #define USB_DnFIFO_FIFOPORT_SHIFT (0)
129
130 /*==============================================*/
131 /* CFIFOSEL */
132 /*==============================================*/
133 #define USB_CFIFOSEL_CURPIPE (0x000Fu)
134 /* #define USB_CFIFOSEL_RESERVED1 (0x0010u) */
135 #define USB_CFIFOSEL_ISEL_ (0x0020u)
136 /* #define USB_CFIFOSEL_RESERVED2 (0x00C0u) */
137 #define USB_CFIFOSEL_BIGEND (0x0100u)
138 /* #define USB_CFIFOSEL_RESERVED3 (0x0200u) */
139 #define USB_CFIFOSEL_MBW (0x0C00u)
140 /* #define USB_CFIFOSEL_RESERVED4 (0x3000u) */
141 #define USB_CFIFOSEL_REW (0x4000u)
142 #define USB_CFIFOSEL_RCNT (0x8000u)
143
144 #define USB_CFIFOSEL_CURPIPE_SHIFT (0)
145 /* #define USB_CFIFOSEL_RESERVED1_SHIFT (4) */
146 #define USB_CFIFOSEL_ISEL_SHIFT_ (5)
147 /* #define USB_CFIFOSEL_RESERVED2_SHIFT (6) */
148 #define USB_CFIFOSEL_BIGEND_SHIFT (8)
149 /* #define USB_CFIFOSEL_RESERVED3_SHIFT (9) */
150 #define USB_CFIFOSEL_MBW_SHIFT (10)
151 /* #define USB_CFIFOSEL_RESERVED4_SHIFT (12) */
152 #define USB_CFIFOSEL_REW_SHIFT (14)
153 #define USB_CFIFOSEL_RCNT_SHIFT (15)
154
155 /*==============================================*/
156 /* DnFIFOSEL */
157 /*==============================================*/
158 #define USB_DnFIFOSEL_CURPIPE (0x000Fu)
159 /* #define USB_DnFIFOSEL_RESERVED1 (0x00F0u) */
160 #define USB_DnFIFOSEL_BIGEND (0x0100u)
161 /* #define USB_DnFIFOSEL_RESERVED2 (0x0200u) */
162 #define USB_DnFIFOSEL_MBW (0x0C00u)
163 #define USB_DnFIFOSEL_DREQE (0x1000u)
164 #define USB_DnFIFOSEL_DCLRM (0x2000u)
165 #define USB_DnFIFOSEL_REW (0x4000u)
166 #define USB_DnFIFOSEL_RCNT (0x8000u)
167
168 #define USB_DnFIFOSEL_CURPIPE_SHIFT (0)
169 /* #define USB_DnFIFOSEL_RESERVED1_SHIFT (4) */
170 #define USB_DnFIFOSEL_BIGEND_SHIFT (8)
171 /* #define USB_DnFIFOSEL_RESERVED2_SHIFT (9) */
172 #define USB_DnFIFOSEL_MBW_SHIFT (10)
173 #define USB_DnFIFOSEL_DREQE_SHIFT (12)
174 #define USB_DnFIFOSEL_DCLRM_SHIFT (13)
175 #define USB_DnFIFOSEL_REW_SHIFT (14)
176 #define USB_DnFIFOSEL_RCNT_SHIFT (15)
177
178 /*==============================================*/
179 /* CFIFOCTR */
180 /*==============================================*/
181 #define USB_CFIFOCTR_DTLN (0x0FFFu)
182 /* #define USB_CFIFOCTR_RESERVED (0x1000u) */
183 #define USB_CFIFOCTR_FRDY (0x2000u)
184 #define USB_CFIFOCTR_BCLR (0x4000u)
185 #define USB_CFIFOCTR_BVAL (0x8000u)
186
187 #define USB_CFIFOCTR_DTLN_SHIFT (0)
188 /* #define USB_CFIFOCTR_RESERVED_SHIFT (12) */
189 #define USB_CFIFOCTR_FRDY_SHIFT (13)
190 #define USB_CFIFOCTR_BCLR_SHIFT (14)
191 #define USB_CFIFOCTR_BVAL_SHIFT (15)
192
193 /*==============================================*/
194 /* DnFIFOCTR */
195 /*==============================================*/
196 #define USB_DnFIFOCTR_DTLN (0x0FFFu)
197 /* #define USB_DnFIFOCTR_RESERVED (0x1000u) */
198 #define USB_DnFIFOCTR_FRDY (0x2000u)
199 #define USB_DnFIFOCTR_BCLR (0x4000u)
200 #define USB_DnFIFOCTR_BVAL (0x8000u)
201
202 #define USB_DnFIFOCTR_DTLN_SHIFT (0)
203 /* #define USB_DnFIFOCTR_RESERVED_SHIFT (12) */
204 #define USB_DnFIFOCTR_FRDY_SHIFT (13)
205 #define USB_DnFIFOCTR_BCLR_SHIFT (14)
206 #define USB_DnFIFOCTR_BVAL_SHIFT (15)
207
208 /*==============================================*/
209 /* INTENB0 */
210 /*==============================================*/
211 /* #define USB_INTENB0_RESERVED (0x00FFu) */
212 #define USB_INTENB0_BRDYE (0x0100u)
213 #define USB_INTENB0_NRDYE (0x0200u)
214 #define USB_INTENB0_BEMPE (0x0400u)
215 #define USB_INTENB0_CTRE (0x0800u)
216 #define USB_INTENB0_DVSE (0x1000u)
217 #define USB_INTENB0_SOFE (0x2000u)
218 #define USB_INTENB0_RSME (0x4000u)
219 #define USB_INTENB0_VBSE (0x8000u)
220
221 /* #define USB_INTENB0_RESERVED_SHIFT (0) */
222 #define USB_INTENB0_BRDYE_SHIFT (8)
223 #define USB_INTENB0_NRDYE_SHIFT (9)
224 #define USB_INTENB0_BEMPE_SHIFT (10)
225 #define USB_INTENB0_CTRE_SHIFT (11)
226 #define USB_INTENB0_DVSE_SHIFT (12)
227 #define USB_INTENB0_SOFE_SHIFT (13)
228 #define USB_INTENB0_RSME_SHIFT (14)
229 #define USB_INTENB0_VBSE_SHIFT (15)
230
231 /*==============================================*/
232 /* INTENB1 */
233 /*==============================================*/
234 /* #define USB_INTENB1_RESERVED1 (0x000Fu) */
235 #define USB_INTENB1_SACKE (0x0010u)
236 #define USB_INTENB1_SIGNE (0x0020u)
237 #define USB_INTENB1_EOFERRE (0x0040u)
238 /* #define USB_INTENB1_RESERVED2 (0x0780u) */
239 #define USB_INTENB1_ATTCHE (0x0800u)
240 #define USB_INTENB1_DTCHE (0x1000u)
241 /* #define USB_INTENB1_RESERVED3 (0x2000u) */
242 #define USB_INTENB1_BCHGE (0x4000u)
243 /* #define USB_INTENB1_RESERVED4 (0x8000u) */
244
245 /* #define USB_INTENB1_RESERVED1_SHIFT (0) */
246 #define USB_INTENB1_SACKE_SHIFT (4)
247 #define USB_INTENB1_SIGNE_SHIFT (5)
248 #define USB_INTENB1_EOFERRE_SHIFT (6)
249 /* #define USB_INTENB1_RESERVED2_SHIFT (7) */
250 #define USB_INTENB1_ATTCHE_SHIFT (11)
251 #define USB_INTENB1_DTCHE_SHIFT (12)
252 /* #define USB_INTENB1_RESERVED3_SHIFT (13) */
253 #define USB_INTENB1_BCHGE_SHIFT (14)
254 /* #define USB_INTENB1_RESERVED4_SHIFT (15) */
255
256 /*==============================================*/
257 /* BRDYENB */
258 /*==============================================*/
259 #define USB_BRDYENB (0xFFFFu)
260
261 #define USB_BRDYENB_SHIFT (0)
262
263 /*==============================================*/
264 /* NRDYENB */
265 /*==============================================*/
266 #define USB_NRDYENB (0xFFFFu)
267
268 #define USB_NRDYENB_SHIFT (0)
269
270 /*==============================================*/
271 /* BEMPENB */
272 /*==============================================*/
273 #define USB_BEMPENB (0xFFFFu)
274
275 #define USB_BEMPENB_SHIFT (0)
276
277 /*==============================================*/
278 /* SOFCFG */
279 /*==============================================*/
280 /* #define USB_SOFCFG_RESERVED1 (0x003Fu) */
281 #define USB_SOFCFG_BRDYM (0x0040u)
282 /* #define USB_SOFCFG_RESERVED2 (0x0080u) */
283 #define USB_SOFCFG_TRNENSEL (0x0100u)
284 /* #define USB_SOFCFG_RESERVED3 (0xFE00u) */
285
286 /* #define USB_SOFCFG_RESERVED1_SHIFT (0) */
287 #define USB_SOFCFG_BRDYM_SHIFT (6)
288 /* #define USB_SOFCFG_RESERVED2_SHIFT (7) */
289 #define USB_SOFCFG_TRNENSEL_SHIFT (8)
290 /* #define USB_SOFCFG_RESERVED3_SHIFT (9) */
291
292 /*==============================================*/
293 /* INTSTS0 */
294 /*==============================================*/
295 #define USB_INTSTS0_CTSQ (0x0007u)
296 #define USB_INTSTS0_VALID (0x0008u)
297 #define USB_INTSTS0_DVSQ (0x0070u)
298 #define USB_INTSTS0_VBSTS (0x0080u)
299 #define USB_INTSTS0_BRDY (0x0100u)
300 #define USB_INTSTS0_NRDY (0x0200u)
301 #define USB_INTSTS0_BEMP (0x0400u)
302 #define USB_INTSTS0_CTRT (0x0800u)
303 #define USB_INTSTS0_DVST (0x1000u)
304 #define USB_INTSTS0_SOFR (0x2000u)
305 #define USB_INTSTS0_RESM (0x4000u)
306 #define USB_INTSTS0_VBINT (0x8000u)
307
308 #define USB_INTSTS0_CTSQ_SHIFT (0)
309 #define USB_INTSTS0_VALID_SHIFT (3)
310 #define USB_INTSTS0_DVSQ_SHIFT (4)
311 #define USB_INTSTS0_VBSTS_SHIFT (7)
312 #define USB_INTSTS0_BRDY_SHIFT (8)
313 #define USB_INTSTS0_NRDY_SHIFT (9)
314 #define USB_INTSTS0_BEMP_SHIFT (10)
315 #define USB_INTSTS0_CTRT_SHIFT (11)
316 #define USB_INTSTS0_DVST_SHIFT (12)
317 #define USB_INTSTS0_SOFR_SHIFT (13)
318 #define USB_INTSTS0_RESM_SHIFT (14)
319 #define USB_INTSTS0_VBINT_SHIFT (15)
320
321 /*==============================================*/
322 /* INTSTS1 */
323 /*==============================================*/
324 /* #define USB_INTSTS1_RESERVED1 (0x000Fu) */
325 #define USB_INTSTS1_SACK (0x0010u)
326 #define USB_INTSTS1_SIGN (0x0020u)
327 #define USB_INTSTS1_EOFERR (0x0040u)
328 /* #define USB_INTSTS1_RESERVED2 (0x0780u) */
329 #define USB_INTSTS1_ATTCH (0x0800u)
330 #define USB_INTSTS1_DTCH (0x1000u)
331 /* #define USB_INTSTS1_RESERVED3 (0x2000u) */
332 #define USB_INTSTS1_BCHG (0x4000u)
333 /* #define USB_INTSTS1_RESERVED4 (0x8000u) */
334
335 /* #define USB_INTSTS1_RESERVED1_SHIFT (0) */
336 #define USB_INTSTS1_SACK_SHIFT (4)
337 #define USB_INTSTS1_SIGN_SHIFT (5)
338 #define USB_INTSTS1_EOFERR_SHIFT (6)
339 /* #define USB_INTSTS1_RESERVED2_SHIFT (7) */
340 #define USB_INTSTS1_ATTCH_SHIFT (11)
341 #define USB_INTSTS1_DTCH_SHIFT (12)
342 /* #define USB_INTSTS1_RESERVED3_SHIFT (13) */
343 #define USB_INTSTS1_BCHG_SHIFT (14)
344 /* #define USB_INTSTS1_RESERVED4_SHIFT (15) */
345
346 /*==============================================*/
347 /* BRDYSTS */
348 /*==============================================*/
349 #define USB_BRDYSTS (0xFFFFu)
350
351 #define USB_BRDYSTS_SHIFT (0)
352
353 /*==============================================*/
354 /* NRDYSTS */
355 /*==============================================*/
356 #define USB_NRDYSTS (0xFFFFu)
357
358 #define USB_NRDYSTS_SHIFT (0)
359
360 /*==============================================*/
361 /* BEMPSTS */
362 /*==============================================*/
363 #define USB_BEMPSTS (0xFFFFu)
364
365 #define USB_BEMPSTS_SHIFT (0)
366
367 /*==============================================*/
368 /* FRMNUM */
369 /*==============================================*/
370 #define USB_FRMNUM_FRNM (0x07FFu)
371 /* #define USB_FRMNUM_RESERVED (0x3800u) */
372 #define USB_FRMNUM_CRCE (0x4000u)
373 #define USB_FRMNUM_OVRN (0x8000u)
374
375 #define USB_FRMNUM_FRNM_SHIFT (0)
376 /* #define USB_FRMNUM_RESERVED_SHIFT (11) */
377 #define USB_FRMNUM_CRCE_SHIFT (14)
378 #define USB_FRMNUM_OVRN_SHIFT (15)
379
380 /*==============================================*/
381 /* UFRMNUM */
382 /*==============================================*/
383 #define USB_UFRMNUM_UFRNM (0x0007u)
384 /* #define USB_UFRMNUM_RESERVED (0xFFF8u) */
385
386 #define USB_UFRMNUM_UFRNM_SHIFT (0)
387 /* #define USB_UFRMNUM_RESERVED_SHIFT (3) */
388
389 /*==============================================*/
390 /* USBADDR */
391 /*==============================================*/
392 #define USB_USBADDR_USBADDR (0x007Fu)
393 /* #define USB_USBADDR_RESERVED (0xFF80u) */
394
395 #define USB_USBADDR_USBADDR_SHIFT (0)
396 /* #define USB_USBADDR_RESERVED_SHIFT (7) */
397
398 /*==============================================*/
399 /* USBREQ */
400 /*==============================================*/
401 #define USB_USBREQ_BMREQUESTTYPE (0x00FFu)
402 #define USB_USBREQ_BREQUEST (0xFF00u)
403
404 #define USB_USBREQ_BMREQUESTTYPE_SHIFT (0)
405 #define USB_USBREQ_BREQUEST_SHIFT (8)
406
407 /*==============================================*/
408 /* USBVAL */
409 /*==============================================*/
410 #define USB_USBVAL (0xFFFFu)
411
412 #define USB_USBVAL_SHIFT (0)
413
414 /*==============================================*/
415 /* USBINDX */
416 /*==============================================*/
417 #define USB_USBINDX (0xFFFFu)
418
419 #define USB_USBINDX_SHIFT (0)
420
421 /*==============================================*/
422 /* USBLENG */
423 /*==============================================*/
424 #define USB_USBLENG (0xFFFFu)
425
426 #define USB_USBLENG_SHIFT (0)
427
428 /*==============================================*/
429 /* DCPCFG */
430 /*==============================================*/
431 /* #define USB_DCPCFG_RESERVED1 (0x000Fu) */
432 #define USB_DCPCFG_DIR (0x0010u)
433 /* #define USB_DCPCFG_RESERVED2 (0x0060u) */
434 #define USB_DCPCFG_SHTNAK (0x0080u)
435 #define USB_DCPCFG_CNTMD (0x0100u)
436 /* #define USB_DCPCFG_RESERVED3 (0xFE00u) */
437
438 /* #define USB_DCPCFG_RESERVED1_SHIFT (0) */
439 #define USB_DCPCFG_DIR_SHIFT (4)
440 /* #define USB_DCPCFG_RESERVED2_SHIFT (5) */
441 #define USB_DCPCFG_SHTNK_SHIFT (7)
442 #define USB_DCPCFG_CNTMD_SHIFT (8)
443 /* #define USB_DCPCFG_RESERVED3 (9) */
444
445 /*==============================================*/
446 /* DCPMAXP */
447 /*==============================================*/
448 #define USB_DCPMAXP_MXPS (0x007Fu)
449 /* #define USB_DCPMAXP_RESERVED (0x0F80u) */
450 #define USB_DCPMAXP_DEVSEL (0xF000u)
451
452 #define USB_DCPMAXP_MXPS_SHIFT (0)
453 /* #define USB_DCPMAXP_RESERVED_SHIFT (7) */
454 #define USB_DCPMAXP_DEVSEL_SHIFT (12)
455
456 /*==============================================*/
457 /* DCPCTR */
458 /*==============================================*/
459 #define USB_DCPCTR_PID (0x0003u)
460 #define USB_DCPCTR_CCPL (0x0004u)
461 /* #define USB_DCPCTR_RESERVED1 (0x0008u) */
462 #define USB_DCPCTR_PINGE (0x0010u)
463 #define USB_DCPCTR_PBUSY (0x0020u)
464 #define USB_DCPCTR_SQMON (0x0040u)
465 #define USB_DCPCTR_SQSET (0x0080u)
466 #define USB_DCPCTR_SQCLR (0x0100u)
467 /* #define USB_DCPCTR_RESERVED2 (0x0600u) */
468 #define USB_DCPCTR_SUREQCLR (0x0800u)
469 #define USB_DCPCTR_CSSTS (0x1000u)
470 #define USB_DCPCTR_CSCLR (0x2000u)
471 #define USB_DCPCTR_SUREQ (0x4000u)
472 #define USB_DCPCTR_BSTS (0x8000u)
473
474 #define USB_DCPCTR_PID_SHIFT (0)
475 #define USB_DCPCTR_CCPL_SHIFT (2)
476 /* #define USB_DCPCTR_RESERVED1_SHIFT (3) */
477 #define USB_DCPCTR_PINGE_SHIFT (4)
478 #define USB_DCPCTR_PBUSY_SHIFT (5)
479 #define USB_DCPCTR_SQMON_SHIFT (6)
480 #define USB_DCPCTR_SQSET_SHIFT (7)
481 #define USB_DCPCTR_SQCLR_SHIFT (8)
482 /* #define USB_DCPCTR_RESERVED2_SHIFT (9) */
483 #define USB_DCPCTR_SUREQCLR_SHIFT (11)
484 #define USB_DCPCTR_CSSTS_SHIFT (12)
485 #define USB_DCPCTR_CSCLR_SHIFT (13)
486 #define USB_DCPCTR_SUREQ_SHIFT (14)
487 #define USB_DCPCTR_BSTS_SHIFT (15)
488
489 /*==============================================*/
490 /* PIPESEL */
491 /*==============================================*/
492 #define USB_PIPESEL_PIPESEL (0x000Fu)
493 /* #define USB_PIPESEL_RESERVED (0xFFF0u) */
494
495 #define USB_PIPESEL_PIPESEL_SHIFT (0)
496 /* #define USB_PIPESEL_RESERVED_SHIFT (4) */
497
498 /*==============================================*/
499 /* PIPECFG */
500 /*==============================================*/
501 #define USB_PIPECFG_EPNUM (0x000Fu)
502 #define USB_PIPECFG_DIR (0x0010u)
503 /* #define USB_PIPECFG_RESERVED1 (0x0060u) */
504 #define USB_PIPECFG_SHTNAK (0x0080u)
505 #define USB_PIPECFG_CNTMD (0x0100u)
506 #define USB_PIPECFG_DBLB (0x0200u)
507 #define USB_PIPECFG_BFRE (0x0400u)
508 /* #define USB_PIPECFG_RESERVED2 (0x3800u) */
509 #define USB_PIPECFG_TYPE (0xC000u)
510
511 #define USB_PIPECFG_EPNUM_SHIFT (0)
512 #define USB_PIPECFG_DIR_SHIFT (4)
513 /* #define USB_PIPECFG_RESERVED1_SHIFT (5) */
514 #define USB_PIPECFG_SHTNAK_SHIFT (7)
515 #define USB_PIPECFG_CNTMD_SHIFT (8)
516 #define USB_PIPECFG_DBLB_SHIFT (9)
517 #define USB_PIPECFG_BFRE_SHIFT (10)
518 /* #define USB_PIPECFG_RESERVED2_SHIFT (11) */
519 #define USB_PIPECFG_TYPE_SHIFT (14)
520
521 /*==============================================*/
522 /* PIPEBUF */
523 /*==============================================*/
524 #define USB_PIPEBUF_BUFNMB (0x00FFu)
525 /* #define USB_PIPEBUF_RESERVED1 (0x0300u) */
526 #define USB_PIPEBUF_BUFSIZE (0x7C00u)
527 /* #define USB_PIPEBUF_RESERVED2 (0x8000u) */
528
529 #define USB_PIPEBUF_BUFNMB_SHIFT (0)
530 /* #define USB_PIPEBUF_RESERVED1_SHIFT (8) */
531 #define USB_PIPEBUF_BUFSIZE_SHIFT (10)
532 /* #define USB_PIPEBUF_RESERVED2_SHIFT (15) */
533
534 /*==============================================*/
535 /* PIPEMAXP */
536 /*==============================================*/
537 #define USB_PIPEMAXP_MXPS (0x07FFu)
538 /* #define USB_PIPEMAXP_RESERVED (0x0800u) */
539 #define USB_PIPEMAXP_DEVSEL (0xF000u)
540
541 #define USB_PIPEMAXP_MXPS_SHIFT (0)
542 /* #define USB_PIPEMAXP_RESERVED_SHIFT (11) */
543 #define USB_PIPEMAXP_DEVSEL_SHIFT (12)
544
545 /*==============================================*/
546 /* PIPEPERI */
547 /*==============================================*/
548 #define USB_PIPEPERI_IITV (0x0007u)
549 /* #define USB_PIPEPERI_RESERVED1 (0x0FF8u) */
550 #define USB_PIPEPERI_IFIS (0x1000u)
551 /* #define USB_PIPEPERI_RESERVED2 (0xE000u) */
552
553 #define USB_PIPEPERI_IITV_SHIFT (0)
554 /* #define USB_PIPEPERI_RESERVED1_SHIFT (3) */
555 #define USB_PIPEPERI_IFIS_SHIFT (12)
556 /* #define USB_PIPEPERI_RESERVED2_SHIFT (13) */
557
558 /*==============================================*/
559 /* PIPEnCTR_1_5 */
560 /*==============================================*/
561 #define USB_PIPEnCTR_1_5_PID (0x0003u)
562 /* #define USB_PIPEnCTR_1_5_RESERVED1 (0x001Cu) */
563 #define USB_PIPEnCTR_1_5_PBUSY (0x0020u)
564 #define USB_PIPEnCTR_1_5_SQMON (0x0040u)
565 #define USB_PIPEnCTR_1_5_SQSET (0x0080u)
566 #define USB_PIPEnCTR_1_5_SQCLR (0x0100u)
567 #define USB_PIPEnCTR_1_5_ACLRM (0x0200u)
568 #define USB_PIPEnCTR_1_5_ATREPM (0x0400u)
569 /* #define USB_PIPEnCTR_1_5_RESERVED2 (0x0800u) */
570 #define USB_PIPEnCTR_1_5_CSSTS (0x1000u)
571 #define USB_PIPEnCTR_1_5_CSCLR (0x2000u)
572 #define USB_PIPEnCTR_1_5_INBUFM (0x4000u)
573 #define USB_PIPEnCTR_1_5_BSTS (0x8000u)
574
575 #define USB_PIPEnCTR_1_5_PID_SHIFT (0)
576 /* #define USB_PIPEnCTR_1_5_RESERVED1_SHIFT (2) */
577 #define USB_PIPEnCTR_1_5_PBUSY_SHIFT (5)
578 #define USB_PIPEnCTR_1_5_SQMON_SHIFT (6)
579 #define USB_PIPEnCTR_1_5_SQSET_SHIFT (7)
580 #define USB_PIPEnCTR_1_5_SQCLR_SHIFT (8)
581 #define USB_PIPEnCTR_1_5_ACLRM_SHIFT (9)
582 #define USB_PIPEnCTR_1_5_ATREPM_SHIFT (10)
583 /* #define USB_PIPEnCTR_1_5_RESERVED2_SHIFT (11) */
584 #define USB_PIPEnCTR_1_5_CSSTS_SHIFT (12)
585 #define USB_PIPEnCTR_1_5_CSCLR_SHIFT (13)
586 #define USB_PIPEnCTR_1_5_INBUFM_SHIFT (14)
587 #define USB_PIPEnCTR_1_5_BSTS_SHIFT (15)
588
589 /*==============================================*/
590 /* PIPEnCTR_6_8 */
591 /*==============================================*/
592 #define USB_PIPEnCTR_6_8_PID (0x0003u)
593 /* #define USB_PIPEnCTR_6_8_RESERVED1 (0x001Cu) */
594 #define USB_PIPEnCTR_6_8_PBUSY (0x0020u)
595 #define USB_PIPEnCTR_6_8_SQMON (0x0040u)
596 #define USB_PIPEnCTR_6_8_SQSET (0x0080u)
597 #define USB_PIPEnCTR_6_8_SQCLR (0x0100u)
598 #define USB_PIPEnCTR_6_8_ACLRM (0x0200u)
599 /* #define USB_PIPEnCTR_6_8_RESERVED2 (0x0C00u) */
600 #define USB_PIPEnCTR_6_8_CSSTS (0x1000u)
601 #define USB_PIPEnCTR_6_8_CSCLR (0x2000u)
602 /* #define USB_PIPEnCTR_6_8_RESERVED3 (0x4000u) */
603 #define USB_PIPEnCTR_6_8_BSTS (0x8000u)
604
605 #define USB_PIPEnCTR_6_8_PID_SHIFT (0)
606 /* #define USB_PIPEnCTR_6_8_RESERVED1_SHIFT (2) */
607 #define USB_PIPEnCTR_6_8_PBUSY_SHIFT (5)
608 #define USB_PIPEnCTR_6_8_SQMON_SHIFT (6)
609 #define USB_PIPEnCTR_6_8_SQSET_SHIFT (7)
610 #define USB_PIPEnCTR_6_8_SQCLR_SHIFT (8)
611 #define USB_PIPEnCTR_6_8_ACLRM_SHIFT (9)
612 /* #define USB_PIPEnCTR_6_8_RESERVED2_SHIFT (10) */
613 #define USB_PIPEnCTR_6_8_CSSTS_SHIFT (12)
614 #define USB_PIPEnCTR_6_8_CSCLR_SHIFT (13)
615 /* #define USB_PIPEnCTR_6_8_RESERVED3_SHIFT (14) */
616 #define USB_PIPEnCTR_6_8_BSTS_SHIFT (15)
617
618 /*==============================================*/
619 /* PIPEnCTR_9 */
620 /*==============================================*/
621 #define USB_PIPEnCTR_9_PID (0x0003u)
622 /* #define USB_PIPEnCTR_9_RESERVED1 (0x001Cu) */
623 #define USB_PIPEnCTR_9_PBUSY (0x0020u)
624 #define USB_PIPEnCTR_9_SQMON (0x0040u)
625 #define USB_PIPEnCTR_9_SQSET (0x0080u)
626 #define USB_PIPEnCTR_9_SQCLR (0x0100u)
627 #define USB_PIPEnCTR_9_ACLRM (0x0200u)
628 #define USB_PIPEnCTR_9_ATREPM (0x0400u)
629 /* #define USB_PIPEnCTR_9_RESERVED2 (0x0800u) */
630 #define USB_PIPEnCTR_9_CSSTS (0x1000u)
631 #define USB_PIPEnCTR_9_CSCLR (0x2000u)
632 #define USB_PIPEnCTR_9_INBUFM (0x4000u)
633 #define USB_PIPEnCTR_9_BSTS (0x8000u)
634
635 #define USB_PIPEnCTR_9_PID_SHIFT (0)
636 /* #define USB_PIPEnCTR_9_RESERVED1_SHIFT (2) */
637 #define USB_PIPEnCTR_9_PBUSY_SHIFT (5)
638 #define USB_PIPEnCTR_9_SQMON_SHIFT (6)
639 #define USB_PIPEnCTR_9_SQSET_SHIFT (7)
640 #define USB_PIPEnCTR_9_SQCLR_SHIFT (8)
641 #define USB_PIPEnCTR_9_ACLRM_SHIFT (9)
642 #define USB_PIPEnCTR_9_ATREPM_SHIFT (10)
643 /* #define USB_PIPEnCTR_9_RESERVED2_SHIFT (11) */
644 #define USB_PIPEnCTR_9_CSSTS_SHIFT (12)
645 #define USB_PIPEnCTR_9_CSCLR_SHIFT (13)
646 #define USB_PIPEnCTR_9_INBUFM_SHIFT (14)
647 #define USB_PIPEnCTR_9_BSTS_SHIFT (15)
648
649 /*==============================================*/
650 /* PIPEnCTR_A_F */
651 /*==============================================*/
652 #define USB_PIPEnCTR_A_F_PID (0x0003u)
653 /* #define USB_PIPEnCTR_A_F_RESERVED1 (0x001Cu) */
654 #define USB_PIPEnCTR_A_F_PBUSY (0x0020u)
655 #define USB_PIPEnCTR_A_F_SQMON (0x0040u)
656 #define USB_PIPEnCTR_A_F_SQSET (0x0080u)
657 #define USB_PIPEnCTR_A_F_SQCLR (0x0100u)
658 #define USB_PIPEnCTR_A_F_ACLRM (0x0200u)
659 #define USB_PIPEnCTR_A_F_ATREPM (0x0400u)
660 /* #define USB_PIPEnCTR_A_F_RESERVED2 (0x3800u) */
661 #define USB_PIPEnCTR_A_F_INBUFM (0x4000u)
662 #define USB_PIPEnCTR_A_F_BSTS (0x8000u)
663
664 #define USB_PIPEnCTR_A_F_PID_SHIFT (0)
665 /* #define USB_PIPEnCTR_A_F_RESERVED1_SHIFT (2) */
666 #define USB_PIPEnCTR_A_F_PBUSY_SHIFT (5)
667 #define USB_PIPEnCTR_A_F_SQMON_SHIFT (6)
668 #define USB_PIPEnCTR_A_F_SQSET_SHIFT (7)
669 #define USB_PIPEnCTR_A_F_SQCLR_SHIFT (8)
670 #define USB_PIPEnCTR_A_F_ACLRM_SHIFT (9)
671 #define USB_PIPEnCTR_A_F_ATREPM_SHIFT (10)
672 /* #define USB_PIPEnCTR_A_F_RESERVED2_SHIFT (11) */
673 #define USB_PIPEnCTR_A_F_INBUFM_SHIFT (14)
674 #define USB_PIPEnCTR_A_F_BSTS_SHIFT (15)
675
676 /*==============================================*/
677 /* PIPEnTRE */
678 /*==============================================*/
679 /* #define USB_PIPEnTRE_RESERVED1 (0x00FFu) */
680 #define USB_PIPEnTRE_TRCLR (0x0100u)
681 #define USB_PIPEnTRE_TRENB (0x0200u)
682 /* #define USB_PIPEnTRE_RESERVED2 (0xFC00u) */
683
684 /* #define USB_PIPEnTRE_RESERVED1_SHIFT (0) */
685 #define USB_PIPEnTRE_TRCLR_SHIFT (8)
686 #define USB_PIPEnTRE_TRENB_SHIFT (9)
687 /* #define USB_PIPEnTRE_RESERVED2_SHIFT (10) */
688
689 /*==============================================*/
690 /* PIPEnTRN */
691 /*==============================================*/
692 #define USB_PIPEnTRN (0xFFFFu)
693
694 #define USB_PIPEnTRN_SHIFT (0)
695
696 /*==============================================*/
697 /* DEVADDn */
698 /*==============================================*/
699 /* #define USB_DEVADDn_RESERVED1 (0x003Fu) */
700 #define USB_DEVADDn_USBSPD (0x00C0u)
701 #define USB_DEVADDn_HUBPORT (0x0700u)
702 #define USB_DEVADDn_UPPHUB (0x7800u)
703 /* #define USB_DEVADDn_RESERVED2 (0x8000u) */
704
705 /* #define USB_DEVADDn_RESERVED1_SHIFT (0) */
706 #define USB_DEVADDn_USBSPD_SHIFT (6)
707 #define USB_DEVADDn_HUBPORT_SHIFT (8)
708 #define USB_DEVADDn_UPPHUB_SHIFT (11)
709 /* #define USB_DEVADDn_RESERVED2_SHIFT (15) */
710
711 /*==============================================*/
712 /* SUSPMODE */
713 /*==============================================*/
714 /* #define USB_SUSPMODE_RESERVED1 (0x3FFFu) */
715 #define USB_SUSPMODE_SUSPM (0x4000u)
716 /* #define USB_SUSPMODE_RESERVED2 (0x8000u) */
717
718 /* #define USB_SUSPMODE_RESERVED1_SHIFT (0) */
719 #define USB_SUSPMODE_SUSPM_SHIFT (14)
720 /* #define USB_SUSPMODE_RESERVED2_SHIFT (15) */
721
722 /*==============================================*/
723 /* DnFIFOBm */
724 /*==============================================*/
725 #define USB_DnFIFOBm (0xFFFFu)
726
727 #define USB_DnFIFOBm_SHIFT (0)
728
729 #endif /* USB_IOBITMASK_H */
730
731 /* End of File */
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