]>
git.gir.st - tmk_keyboard.git/blob - tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/inc/iodefines/gpio_iodefine.h
1 /*******************************************************************************
3 * This software is supplied by Renesas Electronics Corporation and is only
4 * intended for use with Renesas products. No other uses are authorized. This
5 * software is owned by Renesas Electronics Corporation and is protected under
6 * all applicable laws, including copyright laws.
7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
16 * Renesas reserves the right, without notice, to make changes to this software
17 * and to discontinue the availability of this software. By using this software,
18 * you agree to the additional terms and conditions found by accessing the
20 * http://www.renesas.com/disclaimer*
21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
22 *******************************************************************************/
23 /*******************************************************************************
24 * File Name : gpio_iodefine.h
27 * Description : Definition of I/O Register (V1.00a)
28 ******************************************************************************/
29 #ifndef GPIO_IODEFINE_H
30 #define GPIO_IODEFINE_H
31 /* ->QAC 0639 : Over 127 members (C90) */
32 /* ->SEC M1.10.1 : Not magic number */
36 /* start of struct st_gpio_from_p1 */
37 volatile uint16_t P1
; /* P1 */
38 volatile uint8_t dummy348
[2]; /* */
39 /* end of struct st_gpio_from_p1 */
40 /* start of struct st_gpio_from_p1 */
41 volatile uint16_t P2
; /* P2 */
42 volatile uint8_t dummy349
[2]; /* */
43 /* end of struct st_gpio_from_p1 */
44 /* start of struct st_gpio_from_p1 */
45 volatile uint16_t P3
; /* P3 */
46 volatile uint8_t dummy350
[2]; /* */
47 /* end of struct st_gpio_from_p1 */
48 /* start of struct st_gpio_from_p1 */
49 volatile uint16_t P4
; /* P4 */
50 volatile uint8_t dummy351
[2]; /* */
51 /* end of struct st_gpio_from_p1 */
52 /* start of struct st_gpio_from_p1 */
53 volatile uint16_t P5
; /* P5 */
54 volatile uint8_t dummy352
[2]; /* */
55 /* end of struct st_gpio_from_p1 */
56 /* start of struct st_gpio_from_p1 */
57 volatile uint16_t P6
; /* P6 */
58 volatile uint8_t dummy353
[2]; /* */
59 /* end of struct st_gpio_from_p1 */
60 /* start of struct st_gpio_from_p1 */
61 volatile uint16_t P7
; /* P7 */
62 volatile uint8_t dummy354
[2]; /* */
63 /* end of struct st_gpio_from_p1 */
64 /* start of struct st_gpio_from_p1 */
65 volatile uint16_t P8
; /* P8 */
66 volatile uint8_t dummy355
[2]; /* */
67 /* end of struct st_gpio_from_p1 */
68 /* start of struct st_gpio_from_p1 */
69 volatile uint16_t P9
; /* P9 */
70 volatile uint8_t dummy356
[2]; /* */
71 /* end of struct st_gpio_from_p1 */
72 /* start of struct st_gpio_from_p1 */
73 volatile uint16_t P10
; /* P10 */
74 volatile uint8_t dummy357
[2]; /* */
75 /* end of struct st_gpio_from_p1 */
76 /* start of struct st_gpio_from_p1 */
77 volatile uint16_t P11
; /* P11 */
78 volatile uint8_t dummy3580
[2]; /* */
79 /* end of struct st_gpio_from_p1 */
80 volatile uint8_t dummy3581
[212]; /* */
81 #define GPIO_PSRn_COUNT 11
82 volatile uint32_t PSR1
; /* PSR1 */
83 volatile uint32_t PSR2
; /* PSR2 */
84 volatile uint32_t PSR3
; /* PSR3 */
85 volatile uint32_t PSR4
; /* PSR4 */
86 volatile uint32_t PSR5
; /* PSR5 */
87 volatile uint32_t PSR6
; /* PSR6 */
88 volatile uint32_t PSR7
; /* PSR7 */
89 volatile uint32_t PSR8
; /* PSR8 */
90 volatile uint32_t PSR9
; /* PSR9 */
91 volatile uint32_t PSR10
; /* PSR10 */
92 volatile uint32_t PSR11
; /* PSR11 */
93 volatile uint8_t dummy359
[208]; /* */
94 /* start of struct st_gpio_from_ppr0 */
95 volatile uint16_t PPR0
; /* PPR0 */
96 volatile uint8_t dummy360
[2]; /* */
97 /* end of struct st_gpio_from_ppr0 */
98 /* start of struct st_gpio_from_ppr0 */
99 volatile uint16_t PPR1
; /* PPR1 */
100 volatile uint8_t dummy361
[2]; /* */
101 /* end of struct st_gpio_from_ppr0 */
102 /* start of struct st_gpio_from_ppr0 */
103 volatile uint16_t PPR2
; /* PPR2 */
104 volatile uint8_t dummy362
[2]; /* */
105 /* end of struct st_gpio_from_ppr0 */
106 /* start of struct st_gpio_from_ppr0 */
107 volatile uint16_t PPR3
; /* PPR3 */
108 volatile uint8_t dummy363
[2]; /* */
109 /* end of struct st_gpio_from_ppr0 */
110 /* start of struct st_gpio_from_ppr0 */
111 volatile uint16_t PPR4
; /* PPR4 */
112 volatile uint8_t dummy364
[2]; /* */
113 /* end of struct st_gpio_from_ppr0 */
114 /* start of struct st_gpio_from_ppr0 */
115 volatile uint16_t PPR5
; /* PPR5 */
116 volatile uint8_t dummy365
[2]; /* */
117 /* end of struct st_gpio_from_ppr0 */
118 /* start of struct st_gpio_from_ppr0 */
119 volatile uint16_t PPR6
; /* PPR6 */
120 volatile uint8_t dummy366
[2]; /* */
121 /* end of struct st_gpio_from_ppr0 */
122 /* start of struct st_gpio_from_ppr0 */
123 volatile uint16_t PPR7
; /* PPR7 */
124 volatile uint8_t dummy367
[2]; /* */
125 /* end of struct st_gpio_from_ppr0 */
126 /* start of struct st_gpio_from_ppr0 */
127 volatile uint16_t PPR8
; /* PPR8 */
128 volatile uint8_t dummy368
[2]; /* */
129 /* end of struct st_gpio_from_ppr0 */
130 /* start of struct st_gpio_from_ppr0 */
131 volatile uint16_t PPR9
; /* PPR9 */
132 volatile uint8_t dummy369
[2]; /* */
133 /* end of struct st_gpio_from_ppr0 */
134 /* start of struct st_gpio_from_ppr0 */
135 volatile uint16_t PPR10
; /* PPR10 */
136 volatile uint8_t dummy370
[2]; /* */
137 /* end of struct st_gpio_from_ppr0 */
138 /* start of struct st_gpio_from_ppr0 */
139 volatile uint16_t PPR11
; /* PPR11 */
140 volatile uint8_t dummy3710
[2]; /* */
141 /* end of struct st_gpio_from_ppr0 */
142 volatile uint8_t dummy3711
[212]; /* */
143 /* start of struct st_gpio_from_pm1 */
144 volatile uint16_t PM1
; /* PM1 */
145 volatile uint8_t dummy372
[2]; /* */
146 /* end of struct st_gpio_from_pm1 */
147 /* start of struct st_gpio_from_pm1 */
148 volatile uint16_t PM2
; /* PM2 */
149 volatile uint8_t dummy373
[2]; /* */
150 /* end of struct st_gpio_from_pm1 */
151 /* start of struct st_gpio_from_pm1 */
152 volatile uint16_t PM3
; /* PM3 */
153 volatile uint8_t dummy374
[2]; /* */
154 /* end of struct st_gpio_from_pm1 */
155 /* start of struct st_gpio_from_pm1 */
156 volatile uint16_t PM4
; /* PM4 */
157 volatile uint8_t dummy375
[2]; /* */
158 /* end of struct st_gpio_from_pm1 */
159 /* start of struct st_gpio_from_pm1 */
160 volatile uint16_t PM5
; /* PM5 */
161 volatile uint8_t dummy376
[2]; /* */
162 /* end of struct st_gpio_from_pm1 */
163 /* start of struct st_gpio_from_pm1 */
164 volatile uint16_t PM6
; /* PM6 */
165 volatile uint8_t dummy377
[2]; /* */
166 /* end of struct st_gpio_from_pm1 */
167 /* start of struct st_gpio_from_pm1 */
168 volatile uint16_t PM7
; /* PM7 */
169 volatile uint8_t dummy378
[2]; /* */
170 /* end of struct st_gpio_from_pm1 */
171 /* start of struct st_gpio_from_pm1 */
172 volatile uint16_t PM8
; /* PM8 */
173 volatile uint8_t dummy379
[2]; /* */
174 /* end of struct st_gpio_from_pm1 */
175 /* start of struct st_gpio_from_pm1 */
176 volatile uint16_t PM9
; /* PM9 */
177 volatile uint8_t dummy380
[2]; /* */
178 /* end of struct st_gpio_from_pm1 */
179 /* start of struct st_gpio_from_pm1 */
180 volatile uint16_t PM10
; /* PM10 */
181 volatile uint8_t dummy381
[2]; /* */
182 /* end of struct st_gpio_from_pm1 */
183 /* start of struct st_gpio_from_pm1 */
184 volatile uint16_t PM11
; /* PM11 */
185 volatile uint8_t dummy3820
[2]; /* */
186 /* end of struct st_gpio_from_pm1 */
187 volatile uint8_t dummy3821
[208]; /* */
188 /* start of struct st_gpio_from_pmc0 */
189 volatile uint16_t PMC0
; /* PMC0 */
190 volatile uint8_t dummy383
[2]; /* */
191 /* end of struct st_gpio_from_pmc0 */
192 /* start of struct st_gpio_from_pmc0 */
193 volatile uint16_t PMC1
; /* PMC1 */
194 volatile uint8_t dummy384
[2]; /* */
195 /* end of struct st_gpio_from_pmc0 */
196 /* start of struct st_gpio_from_pmc0 */
197 volatile uint16_t PMC2
; /* PMC2 */
198 volatile uint8_t dummy385
[2]; /* */
199 /* end of struct st_gpio_from_pmc0 */
200 /* start of struct st_gpio_from_pmc0 */
201 volatile uint16_t PMC3
; /* PMC3 */
202 volatile uint8_t dummy386
[2]; /* */
203 /* end of struct st_gpio_from_pmc0 */
204 /* start of struct st_gpio_from_pmc0 */
205 volatile uint16_t PMC4
; /* PMC4 */
206 volatile uint8_t dummy387
[2]; /* */
207 /* end of struct st_gpio_from_pmc0 */
208 /* start of struct st_gpio_from_pmc0 */
209 volatile uint16_t PMC5
; /* PMC5 */
210 volatile uint8_t dummy388
[2]; /* */
211 /* end of struct st_gpio_from_pmc0 */
212 /* start of struct st_gpio_from_pmc0 */
213 volatile uint16_t PMC6
; /* PMC6 */
214 volatile uint8_t dummy389
[2]; /* */
215 /* end of struct st_gpio_from_pmc0 */
216 /* start of struct st_gpio_from_pmc0 */
217 volatile uint16_t PMC7
; /* PMC7 */
218 volatile uint8_t dummy390
[2]; /* */
219 /* end of struct st_gpio_from_pmc0 */
220 /* start of struct st_gpio_from_pmc0 */
221 volatile uint16_t PMC8
; /* PMC8 */
222 volatile uint8_t dummy391
[2]; /* */
223 /* end of struct st_gpio_from_pmc0 */
224 /* start of struct st_gpio_from_pmc0 */
225 volatile uint16_t PMC9
; /* PMC9 */
226 volatile uint8_t dummy392
[2]; /* */
227 /* end of struct st_gpio_from_pmc0 */
228 /* start of struct st_gpio_from_pmc0 */
229 volatile uint16_t PMC10
; /* PMC10 */
230 volatile uint8_t dummy393
[2]; /* */
231 /* end of struct st_gpio_from_pmc0 */
232 /* start of struct st_gpio_from_pmc0 */
233 volatile uint16_t PMC11
; /* PMC11 */
234 volatile uint8_t dummy3940
[2]; /* */
235 /* end of struct st_gpio_from_pmc0 */
236 volatile uint8_t dummy3941
[212]; /* */
237 /* start of struct st_gpio_from_pfc1 */
238 volatile uint16_t PFC1
; /* PFC1 */
239 volatile uint8_t dummy395
[2]; /* */
240 /* end of struct st_gpio_from_pfc1 */
241 /* start of struct st_gpio_from_pfc1 */
242 volatile uint16_t PFC2
; /* PFC2 */
243 volatile uint8_t dummy396
[2]; /* */
244 /* end of struct st_gpio_from_pfc1 */
245 /* start of struct st_gpio_from_pfc1 */
246 volatile uint16_t PFC3
; /* PFC3 */
247 volatile uint8_t dummy397
[2]; /* */
248 /* end of struct st_gpio_from_pfc1 */
249 /* start of struct st_gpio_from_pfc1 */
250 volatile uint16_t PFC4
; /* PFC4 */
251 volatile uint8_t dummy398
[2]; /* */
252 /* end of struct st_gpio_from_pfc1 */
253 /* start of struct st_gpio_from_pfc1 */
254 volatile uint16_t PFC5
; /* PFC5 */
255 volatile uint8_t dummy399
[2]; /* */
256 /* end of struct st_gpio_from_pfc1 */
257 /* start of struct st_gpio_from_pfc1 */
258 volatile uint16_t PFC6
; /* PFC6 */
259 volatile uint8_t dummy400
[2]; /* */
260 /* end of struct st_gpio_from_pfc1 */
261 /* start of struct st_gpio_from_pfc1 */
262 volatile uint16_t PFC7
; /* PFC7 */
263 volatile uint8_t dummy401
[2]; /* */
264 /* end of struct st_gpio_from_pfc1 */
265 /* start of struct st_gpio_from_pfc1 */
266 volatile uint16_t PFC8
; /* PFC8 */
267 volatile uint8_t dummy402
[2]; /* */
268 /* end of struct st_gpio_from_pfc1 */
269 /* start of struct st_gpio_from_pfc1 */
270 volatile uint16_t PFC9
; /* PFC9 */
271 volatile uint8_t dummy403
[2]; /* */
272 /* end of struct st_gpio_from_pfc1 */
273 /* start of struct st_gpio_from_pfc1 */
274 volatile uint16_t PFC10
; /* PFC10 */
275 volatile uint8_t dummy404
[2]; /* */
276 /* end of struct st_gpio_from_pfc1 */
277 /* start of struct st_gpio_from_pfc1 */
278 volatile uint16_t PFC11
; /* PFC11 */
279 volatile uint8_t dummy4050
[2]; /* */
280 /* end of struct st_gpio_from_pfc1 */
281 volatile uint8_t dummy4051
[212]; /* */
282 /* start of struct st_gpio_from_pfce1 */
283 volatile uint16_t PFCE1
; /* PFCE1 */
284 volatile uint8_t dummy406
[2]; /* */
285 /* end of struct st_gpio_from_pfce1 */
286 /* start of struct st_gpio_from_pfce1 */
287 volatile uint16_t PFCE2
; /* PFCE2 */
288 volatile uint8_t dummy407
[2]; /* */
289 /* end of struct st_gpio_from_pfce1 */
290 /* start of struct st_gpio_from_pfce1 */
291 volatile uint16_t PFCE3
; /* PFCE3 */
292 volatile uint8_t dummy408
[2]; /* */
293 /* end of struct st_gpio_from_pfce1 */
294 /* start of struct st_gpio_from_pfce1 */
295 volatile uint16_t PFCE4
; /* PFCE4 */
296 volatile uint8_t dummy409
[2]; /* */
297 /* end of struct st_gpio_from_pfce1 */
298 /* start of struct st_gpio_from_pfce1 */
299 volatile uint16_t PFCE5
; /* PFCE5 */
300 volatile uint8_t dummy410
[2]; /* */
301 /* end of struct st_gpio_from_pfce1 */
302 /* start of struct st_gpio_from_pfce1 */
303 volatile uint16_t PFCE6
; /* PFCE6 */
304 volatile uint8_t dummy411
[2]; /* */
305 /* end of struct st_gpio_from_pfce1 */
306 /* start of struct st_gpio_from_pfce1 */
307 volatile uint16_t PFCE7
; /* PFCE7 */
308 volatile uint8_t dummy412
[2]; /* */
309 /* end of struct st_gpio_from_pfce1 */
310 /* start of struct st_gpio_from_pfce1 */
311 volatile uint16_t PFCE8
; /* PFCE8 */
312 volatile uint8_t dummy413
[2]; /* */
313 /* end of struct st_gpio_from_pfce1 */
314 /* start of struct st_gpio_from_pfce1 */
315 volatile uint16_t PFCE9
; /* PFCE9 */
316 volatile uint8_t dummy414
[2]; /* */
317 /* end of struct st_gpio_from_pfce1 */
318 /* start of struct st_gpio_from_pfce1 */
319 volatile uint16_t PFCE10
; /* PFCE10 */
320 volatile uint8_t dummy415
[2]; /* */
321 /* end of struct st_gpio_from_pfce1 */
322 /* start of struct st_gpio_from_pfce1 */
323 volatile uint16_t PFCE11
; /* PFCE11 */
324 volatile uint8_t dummy4160
[2]; /* */
325 /* end of struct st_gpio_from_pfce1 */
326 volatile uint8_t dummy4161
[212]; /* */
327 /* start of struct st_gpio_from_pnot1 */
328 volatile uint16_t PNOT1
; /* PNOT1 */
329 volatile uint8_t dummy417
[2]; /* */
330 /* end of struct st_gpio_from_pnot1 */
331 /* start of struct st_gpio_from_pnot1 */
332 volatile uint16_t PNOT2
; /* PNOT2 */
333 volatile uint8_t dummy418
[2]; /* */
334 /* end of struct st_gpio_from_pnot1 */
335 /* start of struct st_gpio_from_pnot1 */
336 volatile uint16_t PNOT3
; /* PNOT3 */
337 volatile uint8_t dummy419
[2]; /* */
338 /* end of struct st_gpio_from_pnot1 */
339 /* start of struct st_gpio_from_pnot1 */
340 volatile uint16_t PNOT4
; /* PNOT4 */
341 volatile uint8_t dummy420
[2]; /* */
342 /* end of struct st_gpio_from_pnot1 */
343 /* start of struct st_gpio_from_pnot1 */
344 volatile uint16_t PNOT5
; /* PNOT5 */
345 volatile uint8_t dummy421
[2]; /* */
346 /* end of struct st_gpio_from_pnot1 */
347 /* start of struct st_gpio_from_pnot1 */
348 volatile uint16_t PNOT6
; /* PNOT6 */
349 volatile uint8_t dummy422
[2]; /* */
350 /* end of struct st_gpio_from_pnot1 */
351 /* start of struct st_gpio_from_pnot1 */
352 volatile uint16_t PNOT7
; /* PNOT7 */
353 volatile uint8_t dummy423
[2]; /* */
354 /* end of struct st_gpio_from_pnot1 */
355 /* start of struct st_gpio_from_pnot1 */
356 volatile uint16_t PNOT8
; /* PNOT8 */
357 volatile uint8_t dummy424
[2]; /* */
358 /* end of struct st_gpio_from_pnot1 */
359 /* start of struct st_gpio_from_pnot1 */
360 volatile uint16_t PNOT9
; /* PNOT9 */
361 volatile uint8_t dummy425
[2]; /* */
362 /* end of struct st_gpio_from_pnot1 */
363 /* start of struct st_gpio_from_pnot1 */
364 volatile uint16_t PNOT10
; /* PNOT10 */
365 volatile uint8_t dummy426
[2]; /* */
366 /* end of struct st_gpio_from_pnot1 */
367 /* start of struct st_gpio_from_pnot1 */
368 volatile uint16_t PNOT11
; /* PNOT11 */
369 volatile uint8_t dummy4270
[2]; /* */
370 /* end of struct st_gpio_from_pnot1 */
371 volatile uint8_t dummy4271
[212]; /* */
372 #define GPIO_PMSRn_COUNT 11
373 volatile uint32_t PMSR1
; /* PMSR1 */
374 volatile uint32_t PMSR2
; /* PMSR2 */
375 volatile uint32_t PMSR3
; /* PMSR3 */
376 volatile uint32_t PMSR4
; /* PMSR4 */
377 volatile uint32_t PMSR5
; /* PMSR5 */
378 volatile uint32_t PMSR6
; /* PMSR6 */
379 volatile uint32_t PMSR7
; /* PMSR7 */
380 volatile uint32_t PMSR8
; /* PMSR8 */
381 volatile uint32_t PMSR9
; /* PMSR9 */
382 volatile uint32_t PMSR10
; /* PMSR10 */
383 volatile uint32_t PMSR11
; /* PMSR11 */
384 volatile uint8_t dummy428
[208]; /* */
385 #define GPIO_PMCSRn_COUNT 12
386 volatile uint32_t PMCSR0
; /* PMCSR0 */
387 volatile uint32_t PMCSR1
; /* PMCSR1 */
388 volatile uint32_t PMCSR2
; /* PMCSR2 */
389 volatile uint32_t PMCSR3
; /* PMCSR3 */
390 volatile uint32_t PMCSR4
; /* PMCSR4 */
391 volatile uint32_t PMCSR5
; /* PMCSR5 */
392 volatile uint32_t PMCSR6
; /* PMCSR6 */
393 volatile uint32_t PMCSR7
; /* PMCSR7 */
394 volatile uint32_t PMCSR8
; /* PMCSR8 */
395 volatile uint32_t PMCSR9
; /* PMCSR9 */
396 volatile uint32_t PMCSR10
; /* PMCSR10 */
397 volatile uint32_t PMCSR11
; /* PMCSR11 */
398 volatile uint8_t dummy429
[212]; /* */
399 /* start of struct st_gpio_from_pfcae1 */
400 volatile uint16_t PFCAE1
; /* PFCAE1 */
401 volatile uint8_t dummy430
[2]; /* */
402 /* end of struct st_gpio_from_pfcae1 */
403 /* start of struct st_gpio_from_pfcae1 */
404 volatile uint16_t PFCAE2
; /* PFCAE2 */
405 volatile uint8_t dummy431
[2]; /* */
406 /* end of struct st_gpio_from_pfcae1 */
407 /* start of struct st_gpio_from_pfcae1 */
408 volatile uint16_t PFCAE3
; /* PFCAE3 */
409 volatile uint8_t dummy432
[2]; /* */
410 /* end of struct st_gpio_from_pfcae1 */
411 /* start of struct st_gpio_from_pfcae1 */
412 volatile uint16_t PFCAE4
; /* PFCAE4 */
413 volatile uint8_t dummy433
[2]; /* */
414 /* end of struct st_gpio_from_pfcae1 */
415 /* start of struct st_gpio_from_pfcae1 */
416 volatile uint16_t PFCAE5
; /* PFCAE5 */
417 volatile uint8_t dummy434
[2]; /* */
418 /* end of struct st_gpio_from_pfcae1 */
419 /* start of struct st_gpio_from_pfcae1 */
420 volatile uint16_t PFCAE6
; /* PFCAE6 */
421 volatile uint8_t dummy435
[2]; /* */
422 /* end of struct st_gpio_from_pfcae1 */
423 /* start of struct st_gpio_from_pfcae1 */
424 volatile uint16_t PFCAE7
; /* PFCAE7 */
425 volatile uint8_t dummy436
[2]; /* */
426 /* end of struct st_gpio_from_pfcae1 */
427 /* start of struct st_gpio_from_pfcae1 */
428 volatile uint16_t PFCAE8
; /* PFCAE8 */
429 volatile uint8_t dummy437
[2]; /* */
430 /* end of struct st_gpio_from_pfcae1 */
431 /* start of struct st_gpio_from_pfcae1 */
432 volatile uint16_t PFCAE9
; /* PFCAE9 */
433 volatile uint8_t dummy438
[2]; /* */
434 /* end of struct st_gpio_from_pfcae1 */
435 /* start of struct st_gpio_from_pfcae1 */
436 volatile uint16_t PFCAE10
; /* PFCAE10 */
437 volatile uint8_t dummy439
[2]; /* */
438 /* end of struct st_gpio_from_pfcae1 */
439 /* start of struct st_gpio_from_pfcae1 */
440 volatile uint16_t PFCAE11
; /* PFCAE11 */
441 volatile uint8_t dummy4400
[2]; /* */
442 /* end of struct st_gpio_from_pfcae1 */
443 volatile uint8_t dummy4401
[464]; /* */
444 volatile uint32_t SNCR
; /* SNCR */
445 volatile uint8_t dummy441
[13308]; /* */
446 volatile uint16_t PIBC0
; /* PIBC0 */
447 volatile uint8_t dummy442
[2]; /* */
448 /* start of struct st_gpio_from_pibc1 */
449 volatile uint16_t PIBC1
; /* PIBC1 */
450 volatile uint8_t dummy443
[2]; /* */
451 /* end of struct st_gpio_from_pibc1 */
452 /* start of struct st_gpio_from_pibc1 */
453 volatile uint16_t PIBC2
; /* PIBC2 */
454 volatile uint8_t dummy444
[2]; /* */
455 /* end of struct st_gpio_from_pibc1 */
456 /* start of struct st_gpio_from_pibc1 */
457 volatile uint16_t PIBC3
; /* PIBC3 */
458 volatile uint8_t dummy445
[2]; /* */
459 /* end of struct st_gpio_from_pibc1 */
460 /* start of struct st_gpio_from_pibc1 */
461 volatile uint16_t PIBC4
; /* PIBC4 */
462 volatile uint8_t dummy446
[2]; /* */
463 /* end of struct st_gpio_from_pibc1 */
464 /* start of struct st_gpio_from_pibc1 */
465 volatile uint16_t PIBC5
; /* PIBC5 */
466 volatile uint8_t dummy447
[2]; /* */
467 /* end of struct st_gpio_from_pibc1 */
468 /* start of struct st_gpio_from_pibc1 */
469 volatile uint16_t PIBC6
; /* PIBC6 */
470 volatile uint8_t dummy448
[2]; /* */
471 /* end of struct st_gpio_from_pibc1 */
472 /* start of struct st_gpio_from_pibc1 */
473 volatile uint16_t PIBC7
; /* PIBC7 */
474 volatile uint8_t dummy449
[2]; /* */
475 /* end of struct st_gpio_from_pibc1 */
476 /* start of struct st_gpio_from_pibc1 */
477 volatile uint16_t PIBC8
; /* PIBC8 */
478 volatile uint8_t dummy450
[2]; /* */
479 /* end of struct st_gpio_from_pibc1 */
480 /* start of struct st_gpio_from_pibc1 */
481 volatile uint16_t PIBC9
; /* PIBC9 */
482 volatile uint8_t dummy451
[2]; /* */
483 /* end of struct st_gpio_from_pibc1 */
484 /* start of struct st_gpio_from_pibc1 */
485 volatile uint16_t PIBC10
; /* PIBC10 */
486 volatile uint8_t dummy452
[2]; /* */
487 /* end of struct st_gpio_from_pibc1 */
488 /* start of struct st_gpio_from_pibc1 */
489 volatile uint16_t PIBC11
; /* PIBC11 */
490 volatile uint8_t dummy4530
[2]; /* */
491 /* end of struct st_gpio_from_pibc1 */
492 volatile uint8_t dummy4531
[212]; /* */
493 /* start of struct st_gpio_from_pbdc1 */
494 volatile uint16_t PBDC1
; /* PBDC1 */
495 volatile uint8_t dummy454
[2]; /* */
496 /* end of struct st_gpio_from_pbdc1 */
497 /* start of struct st_gpio_from_pbdc1 */
498 volatile uint16_t PBDC2
; /* PBDC2 */
499 volatile uint8_t dummy455
[2]; /* */
500 /* end of struct st_gpio_from_pbdc1 */
501 /* start of struct st_gpio_from_pbdc1 */
502 volatile uint16_t PBDC3
; /* PBDC3 */
503 volatile uint8_t dummy456
[2]; /* */
504 /* end of struct st_gpio_from_pbdc1 */
505 /* start of struct st_gpio_from_pbdc1 */
506 volatile uint16_t PBDC4
; /* PBDC4 */
507 volatile uint8_t dummy457
[2]; /* */
508 /* end of struct st_gpio_from_pbdc1 */
509 /* start of struct st_gpio_from_pbdc1 */
510 volatile uint16_t PBDC5
; /* PBDC5 */
511 volatile uint8_t dummy458
[2]; /* */
512 /* end of struct st_gpio_from_pbdc1 */
513 /* start of struct st_gpio_from_pbdc1 */
514 volatile uint16_t PBDC6
; /* PBDC6 */
515 volatile uint8_t dummy459
[2]; /* */
516 /* end of struct st_gpio_from_pbdc1 */
517 /* start of struct st_gpio_from_pbdc1 */
518 volatile uint16_t PBDC7
; /* PBDC7 */
519 volatile uint8_t dummy460
[2]; /* */
520 /* end of struct st_gpio_from_pbdc1 */
521 /* start of struct st_gpio_from_pbdc1 */
522 volatile uint16_t PBDC8
; /* PBDC8 */
523 volatile uint8_t dummy461
[2]; /* */
524 /* end of struct st_gpio_from_pbdc1 */
525 /* start of struct st_gpio_from_pbdc1 */
526 volatile uint16_t PBDC9
; /* PBDC9 */
527 volatile uint8_t dummy462
[2]; /* */
528 /* end of struct st_gpio_from_pbdc1 */
529 /* start of struct st_gpio_from_pbdc1 */
530 volatile uint16_t PBDC10
; /* PBDC10 */
531 volatile uint8_t dummy463
[2]; /* */
532 /* end of struct st_gpio_from_pbdc1 */
533 /* start of struct st_gpio_from_pbdc1 */
534 volatile uint16_t PBDC11
; /* PBDC11 */
535 volatile uint8_t dummy4640
[2]; /* */
536 /* end of struct st_gpio_from_pbdc1 */
537 volatile uint8_t dummy4641
[212]; /* */
538 /* start of struct st_gpio_from_pipc1 */
539 volatile uint16_t PIPC1
; /* PIPC1 */
540 volatile uint8_t dummy465
[2]; /* */
541 /* end of struct st_gpio_from_pipc1 */
542 /* start of struct st_gpio_from_pipc1 */
543 volatile uint16_t PIPC2
; /* PIPC2 */
544 volatile uint8_t dummy466
[2]; /* */
545 /* end of struct st_gpio_from_pipc1 */
546 /* start of struct st_gpio_from_pipc1 */
547 volatile uint16_t PIPC3
; /* PIPC3 */
548 volatile uint8_t dummy467
[2]; /* */
549 /* end of struct st_gpio_from_pipc1 */
550 /* start of struct st_gpio_from_pipc1 */
551 volatile uint16_t PIPC4
; /* PIPC4 */
552 volatile uint8_t dummy468
[2]; /* */
553 /* end of struct st_gpio_from_pipc1 */
554 /* start of struct st_gpio_from_pipc1 */
555 volatile uint16_t PIPC5
; /* PIPC5 */
556 volatile uint8_t dummy469
[2]; /* */
557 /* end of struct st_gpio_from_pipc1 */
558 /* start of struct st_gpio_from_pipc1 */
559 volatile uint16_t PIPC6
; /* PIPC6 */
560 volatile uint8_t dummy470
[2]; /* */
561 /* end of struct st_gpio_from_pipc1 */
562 /* start of struct st_gpio_from_pipc1 */
563 volatile uint16_t PIPC7
; /* PIPC7 */
564 volatile uint8_t dummy471
[2]; /* */
565 /* end of struct st_gpio_from_pipc1 */
566 /* start of struct st_gpio_from_pipc1 */
567 volatile uint16_t PIPC8
; /* PIPC8 */
568 volatile uint8_t dummy472
[2]; /* */
569 /* end of struct st_gpio_from_pipc1 */
570 /* start of struct st_gpio_from_pipc1 */
571 volatile uint16_t PIPC9
; /* PIPC9 */
572 volatile uint8_t dummy473
[2]; /* */
573 /* end of struct st_gpio_from_pipc1 */
574 /* start of struct st_gpio_from_pipc1 */
575 volatile uint16_t PIPC10
; /* PIPC10 */
576 volatile uint8_t dummy474
[2]; /* */
577 /* end of struct st_gpio_from_pipc1 */
578 /* start of struct st_gpio_from_pipc1 */
579 volatile uint16_t PIPC11
; /* PIPC11 */
580 volatile uint8_t dummy4750
[2]; /* */
581 /* end of struct st_gpio_from_pipc1 */
582 volatile uint8_t dummy4751
[2288]; /* */
583 volatile uint16_t JPPR0
; /* JPPR0 */
584 volatile uint8_t dummy476
[30]; /* */
585 volatile uint16_t JPMC0
; /* JPMC0 */
586 volatile uint8_t dummy477
[78]; /* */
587 volatile uint32_t JPMCSR0
; /* JPMCSR0 */
588 volatile uint8_t dummy478
[876]; /* */
589 volatile uint16_t JPIBC0
; /* JPIBC0 */
593 struct st_gpio_from_p1
595 volatile uint16_t P1
; /* P1 */
596 volatile uint8_t dummy1
[3]; /* */
600 struct st_gpio_from_ppr0
602 volatile uint16_t PPR0
; /* PPR0 */
603 volatile uint8_t dummy1
[2]; /* */
607 struct st_gpio_from_pm1
609 volatile uint16_t PM1
; /* PM1 */
610 volatile uint8_t dummy1
[2]; /* */
614 struct st_gpio_from_pmc0
616 volatile uint16_t PMC0
; /* PMC0 */
617 volatile uint8_t dummy1
[2]; /* */
621 struct st_gpio_from_pfc1
623 volatile uint16_t PFC1
; /* PFC1 */
624 volatile uint8_t dummy1
[2]; /* */
628 struct st_gpio_from_pfce1
630 volatile uint16_t PFCE1
; /* PFCE1 */
631 volatile uint8_t dummy1
[2]; /* */
635 struct st_gpio_from_pnot1
637 volatile uint16_t PNOT1
; /* PNOT1 */
638 volatile uint8_t dummy1
[2]; /* */
642 struct st_gpio_from_pfcae1
644 volatile uint16_t PFCAE1
; /* PFCAE1 */
645 volatile uint8_t dummy1
[2]; /* */
649 struct st_gpio_from_pibc1
651 volatile uint16_t PIBC1
; /* PIBC1 */
652 volatile uint8_t dummy1
[2]; /* */
656 struct st_gpio_from_pbdc1
658 volatile uint16_t PBDC1
; /* PBDC1 */
659 volatile uint8_t dummy1
[2]; /* */
663 struct st_gpio_from_pipc1
665 volatile uint16_t PIPC1
; /* PIPC1 */
666 volatile uint8_t dummy1
[2]; /* */
670 #define GPIO (*(struct st_gpio *)0xFCFE3004uL) /* GPIO */
672 /* Start of channnel array defines of GPIO */
674 /* Channnel array defines of GPIO_FROM_PIPC1_ARRAY */
675 /*(Sample) value = GPIO_FROM_PIPC1_ARRAY[ channel ]->PIPC1; */
676 #define GPIO_FROM_PIPC1_ARRAY_COUNT 11
677 #define GPIO_FROM_PIPC1_ARRAY_ADDRESS_LIST \
678 { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
679 &GPIO_FROM_PIPC1, &GPIO_FROM_PIPC2, &GPIO_FROM_PIPC3, &GPIO_FROM_PIPC4, &GPIO_FROM_PIPC5, &GPIO_FROM_PIPC6, &GPIO_FROM_PIPC7, &GPIO_FROM_PIPC8, \
680 &GPIO_FROM_PIPC9, &GPIO_FROM_PIPC10, &GPIO_FROM_PIPC11 \
681 } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
682 #define GPIO_FROM_PIPC1 (*(struct st_gpio_from_pipc1 *)&GPIO.PIPC1) /* GPIO_FROM_PIPC1 */
683 #define GPIO_FROM_PIPC2 (*(struct st_gpio_from_pipc1 *)&GPIO.PIPC2) /* GPIO_FROM_PIPC2 */
684 #define GPIO_FROM_PIPC3 (*(struct st_gpio_from_pipc1 *)&GPIO.PIPC3) /* GPIO_FROM_PIPC3 */
685 #define GPIO_FROM_PIPC4 (*(struct st_gpio_from_pipc1 *)&GPIO.PIPC4) /* GPIO_FROM_PIPC4 */
686 #define GPIO_FROM_PIPC5 (*(struct st_gpio_from_pipc1 *)&GPIO.PIPC5) /* GPIO_FROM_PIPC5 */
687 #define GPIO_FROM_PIPC6 (*(struct st_gpio_from_pipc1 *)&GPIO.PIPC6) /* GPIO_FROM_PIPC6 */
688 #define GPIO_FROM_PIPC7 (*(struct st_gpio_from_pipc1 *)&GPIO.PIPC7) /* GPIO_FROM_PIPC7 */
689 #define GPIO_FROM_PIPC8 (*(struct st_gpio_from_pipc1 *)&GPIO.PIPC8) /* GPIO_FROM_PIPC8 */
690 #define GPIO_FROM_PIPC9 (*(struct st_gpio_from_pipc1 *)&GPIO.PIPC9) /* GPIO_FROM_PIPC9 */
691 #define GPIO_FROM_PIPC10 (*(struct st_gpio_from_pipc1 *)&GPIO.PIPC10) /* GPIO_FROM_PIPC10 */
692 #define GPIO_FROM_PIPC11 (*(struct st_gpio_from_pipc1 *)&GPIO.PIPC11) /* GPIO_FROM_PIPC11 */
695 /* Channnel array defines of GPIO_FROM_PBDC1_ARRAY */
696 /*(Sample) value = GPIO_FROM_PBDC1_ARRAY[ channel ]->PBDC1; */
697 #define GPIO_FROM_PBDC1_ARRAY_COUNT 11
698 #define GPIO_FROM_PBDC1_ARRAY_ADDRESS_LIST \
699 { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
700 &GPIO_FROM_PBDC1, &GPIO_FROM_PBDC2, &GPIO_FROM_PBDC3, &GPIO_FROM_PBDC4, &GPIO_FROM_PBDC5, &GPIO_FROM_PBDC6, &GPIO_FROM_PBDC7, &GPIO_FROM_PBDC8, \
701 &GPIO_FROM_PBDC9, &GPIO_FROM_PBDC10, &GPIO_FROM_PBDC11 \
702 } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
703 #define GPIO_FROM_PBDC1 (*(struct st_gpio_from_pbdc1 *)&GPIO.PBDC1) /* GPIO_FROM_PBDC1 */
704 #define GPIO_FROM_PBDC2 (*(struct st_gpio_from_pbdc1 *)&GPIO.PBDC2) /* GPIO_FROM_PBDC2 */
705 #define GPIO_FROM_PBDC3 (*(struct st_gpio_from_pbdc1 *)&GPIO.PBDC3) /* GPIO_FROM_PBDC3 */
706 #define GPIO_FROM_PBDC4 (*(struct st_gpio_from_pbdc1 *)&GPIO.PBDC4) /* GPIO_FROM_PBDC4 */
707 #define GPIO_FROM_PBDC5 (*(struct st_gpio_from_pbdc1 *)&GPIO.PBDC5) /* GPIO_FROM_PBDC5 */
708 #define GPIO_FROM_PBDC6 (*(struct st_gpio_from_pbdc1 *)&GPIO.PBDC6) /* GPIO_FROM_PBDC6 */
709 #define GPIO_FROM_PBDC7 (*(struct st_gpio_from_pbdc1 *)&GPIO.PBDC7) /* GPIO_FROM_PBDC7 */
710 #define GPIO_FROM_PBDC8 (*(struct st_gpio_from_pbdc1 *)&GPIO.PBDC8) /* GPIO_FROM_PBDC8 */
711 #define GPIO_FROM_PBDC9 (*(struct st_gpio_from_pbdc1 *)&GPIO.PBDC9) /* GPIO_FROM_PBDC9 */
712 #define GPIO_FROM_PBDC10 (*(struct st_gpio_from_pbdc1 *)&GPIO.PBDC10) /* GPIO_FROM_PBDC10 */
713 #define GPIO_FROM_PBDC11 (*(struct st_gpio_from_pbdc1 *)&GPIO.PBDC11) /* GPIO_FROM_PBDC11 */
716 /* Channnel array defines of GPIO_FROM_PIBC1_ARRAY */
717 /*(Sample) value = GPIO_FROM_PIBC1_ARRAY[ channel ]->PIBC1; */
718 #define GPIO_FROM_PIBC1_ARRAY_COUNT 11
719 #define GPIO_FROM_PIBC1_ARRAY_ADDRESS_LIST \
720 { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
721 &GPIO_FROM_PIBC1, &GPIO_FROM_PIBC2, &GPIO_FROM_PIBC3, &GPIO_FROM_PIBC4, &GPIO_FROM_PIBC5, &GPIO_FROM_PIBC6, &GPIO_FROM_PIBC7, &GPIO_FROM_PIBC8, \
722 &GPIO_FROM_PIBC9, &GPIO_FROM_PIBC10, &GPIO_FROM_PIBC11 \
723 } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
724 #define GPIO_FROM_PIBC1 (*(struct st_gpio_from_pibc1 *)&GPIO.PIBC1) /* GPIO_FROM_PIBC1 */
725 #define GPIO_FROM_PIBC2 (*(struct st_gpio_from_pibc1 *)&GPIO.PIBC2) /* GPIO_FROM_PIBC2 */
726 #define GPIO_FROM_PIBC3 (*(struct st_gpio_from_pibc1 *)&GPIO.PIBC3) /* GPIO_FROM_PIBC3 */
727 #define GPIO_FROM_PIBC4 (*(struct st_gpio_from_pibc1 *)&GPIO.PIBC4) /* GPIO_FROM_PIBC4 */
728 #define GPIO_FROM_PIBC5 (*(struct st_gpio_from_pibc1 *)&GPIO.PIBC5) /* GPIO_FROM_PIBC5 */
729 #define GPIO_FROM_PIBC6 (*(struct st_gpio_from_pibc1 *)&GPIO.PIBC6) /* GPIO_FROM_PIBC6 */
730 #define GPIO_FROM_PIBC7 (*(struct st_gpio_from_pibc1 *)&GPIO.PIBC7) /* GPIO_FROM_PIBC7 */
731 #define GPIO_FROM_PIBC8 (*(struct st_gpio_from_pibc1 *)&GPIO.PIBC8) /* GPIO_FROM_PIBC8 */
732 #define GPIO_FROM_PIBC9 (*(struct st_gpio_from_pibc1 *)&GPIO.PIBC9) /* GPIO_FROM_PIBC9 */
733 #define GPIO_FROM_PIBC10 (*(struct st_gpio_from_pibc1 *)&GPIO.PIBC10) /* GPIO_FROM_PIBC10 */
734 #define GPIO_FROM_PIBC11 (*(struct st_gpio_from_pibc1 *)&GPIO.PIBC11) /* GPIO_FROM_PIBC11 */
737 /* Channnel array defines of GPIO_FROM_PFCAE1_ARRAY */
738 /*(Sample) value = GPIO_FROM_PFCAE1_ARRAY[ channel ]->PFCAE1; */
739 #define GPIO_FROM_PFCAE1_ARRAY_COUNT 11
740 #define GPIO_FROM_PFCAE1_ARRAY_ADDRESS_LIST \
741 { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
742 &GPIO_FROM_PFCAE1, &GPIO_FROM_PFCAE2, &GPIO_FROM_PFCAE3, &GPIO_FROM_PFCAE4, &GPIO_FROM_PFCAE5, &GPIO_FROM_PFCAE6, &GPIO_FROM_PFCAE7, &GPIO_FROM_PFCAE8, \
743 &GPIO_FROM_PFCAE9, &GPIO_FROM_PFCAE10, &GPIO_FROM_PFCAE11 \
744 } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
745 #define GPIO_FROM_PFCAE1 (*(struct st_gpio_from_pfcae1 *)&GPIO.PFCAE1) /* GPIO_FROM_PFCAE1 */
746 #define GPIO_FROM_PFCAE2 (*(struct st_gpio_from_pfcae1 *)&GPIO.PFCAE2) /* GPIO_FROM_PFCAE2 */
747 #define GPIO_FROM_PFCAE3 (*(struct st_gpio_from_pfcae1 *)&GPIO.PFCAE3) /* GPIO_FROM_PFCAE3 */
748 #define GPIO_FROM_PFCAE4 (*(struct st_gpio_from_pfcae1 *)&GPIO.PFCAE4) /* GPIO_FROM_PFCAE4 */
749 #define GPIO_FROM_PFCAE5 (*(struct st_gpio_from_pfcae1 *)&GPIO.PFCAE5) /* GPIO_FROM_PFCAE5 */
750 #define GPIO_FROM_PFCAE6 (*(struct st_gpio_from_pfcae1 *)&GPIO.PFCAE6) /* GPIO_FROM_PFCAE6 */
751 #define GPIO_FROM_PFCAE7 (*(struct st_gpio_from_pfcae1 *)&GPIO.PFCAE7) /* GPIO_FROM_PFCAE7 */
752 #define GPIO_FROM_PFCAE8 (*(struct st_gpio_from_pfcae1 *)&GPIO.PFCAE8) /* GPIO_FROM_PFCAE8 */
753 #define GPIO_FROM_PFCAE9 (*(struct st_gpio_from_pfcae1 *)&GPIO.PFCAE9) /* GPIO_FROM_PFCAE9 */
754 #define GPIO_FROM_PFCAE10 (*(struct st_gpio_from_pfcae1 *)&GPIO.PFCAE10) /* GPIO_FROM_PFCAE10 */
755 #define GPIO_FROM_PFCAE11 (*(struct st_gpio_from_pfcae1 *)&GPIO.PFCAE11) /* GPIO_FROM_PFCAE11 */
758 /* Channnel array defines of GPIO_FROM_PNOT1_ARRAY */
759 /*(Sample) value = GPIO_FROM_PNOT1_ARRAY[ channel ]->PNOT1; */
760 #define GPIO_FROM_PNOT1_ARRAY_COUNT 11
761 #define GPIO_FROM_PNOT1_ARRAY_ADDRESS_LIST \
762 { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
763 &GPIO_FROM_PNOT1, &GPIO_FROM_PNOT2, &GPIO_FROM_PNOT3, &GPIO_FROM_PNOT4, &GPIO_FROM_PNOT5, &GPIO_FROM_PNOT6, &GPIO_FROM_PNOT7, &GPIO_FROM_PNOT8, \
764 &GPIO_FROM_PNOT9, &GPIO_FROM_PNOT10, &GPIO_FROM_PNOT11 \
765 } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
766 #define GPIO_FROM_PNOT1 (*(struct st_gpio_from_pnot1 *)&GPIO.PNOT1) /* GPIO_FROM_PNOT1 */
767 #define GPIO_FROM_PNOT2 (*(struct st_gpio_from_pnot1 *)&GPIO.PNOT2) /* GPIO_FROM_PNOT2 */
768 #define GPIO_FROM_PNOT3 (*(struct st_gpio_from_pnot1 *)&GPIO.PNOT3) /* GPIO_FROM_PNOT3 */
769 #define GPIO_FROM_PNOT4 (*(struct st_gpio_from_pnot1 *)&GPIO.PNOT4) /* GPIO_FROM_PNOT4 */
770 #define GPIO_FROM_PNOT5 (*(struct st_gpio_from_pnot1 *)&GPIO.PNOT5) /* GPIO_FROM_PNOT5 */
771 #define GPIO_FROM_PNOT6 (*(struct st_gpio_from_pnot1 *)&GPIO.PNOT6) /* GPIO_FROM_PNOT6 */
772 #define GPIO_FROM_PNOT7 (*(struct st_gpio_from_pnot1 *)&GPIO.PNOT7) /* GPIO_FROM_PNOT7 */
773 #define GPIO_FROM_PNOT8 (*(struct st_gpio_from_pnot1 *)&GPIO.PNOT8) /* GPIO_FROM_PNOT8 */
774 #define GPIO_FROM_PNOT9 (*(struct st_gpio_from_pnot1 *)&GPIO.PNOT9) /* GPIO_FROM_PNOT9 */
775 #define GPIO_FROM_PNOT10 (*(struct st_gpio_from_pnot1 *)&GPIO.PNOT10) /* GPIO_FROM_PNOT10 */
776 #define GPIO_FROM_PNOT11 (*(struct st_gpio_from_pnot1 *)&GPIO.PNOT11) /* GPIO_FROM_PNOT11 */
779 /* Channnel array defines of GPIO_FROM_PFCE1_ARRAY */
780 /*(Sample) value = GPIO_FROM_PFCE1_ARRAY[ channel ]->PFCE1; */
781 #define GPIO_FROM_PFCE1_ARRAY_COUNT 11
782 #define GPIO_FROM_PFCE1_ARRAY_ADDRESS_LIST \
783 { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
784 &GPIO_FROM_PFCE1, &GPIO_FROM_PFCE2, &GPIO_FROM_PFCE3, &GPIO_FROM_PFCE4, &GPIO_FROM_PFCE5, &GPIO_FROM_PFCE6, &GPIO_FROM_PFCE7, &GPIO_FROM_PFCE8, \
785 &GPIO_FROM_PFCE9, &GPIO_FROM_PFCE10, &GPIO_FROM_PFCE11 \
786 } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
787 #define GPIO_FROM_PFCE1 (*(struct st_gpio_from_pfce1 *)&GPIO.PFCE1) /* GPIO_FROM_PFCE1 */
788 #define GPIO_FROM_PFCE2 (*(struct st_gpio_from_pfce1 *)&GPIO.PFCE2) /* GPIO_FROM_PFCE2 */
789 #define GPIO_FROM_PFCE3 (*(struct st_gpio_from_pfce1 *)&GPIO.PFCE3) /* GPIO_FROM_PFCE3 */
790 #define GPIO_FROM_PFCE4 (*(struct st_gpio_from_pfce1 *)&GPIO.PFCE4) /* GPIO_FROM_PFCE4 */
791 #define GPIO_FROM_PFCE5 (*(struct st_gpio_from_pfce1 *)&GPIO.PFCE5) /* GPIO_FROM_PFCE5 */
792 #define GPIO_FROM_PFCE6 (*(struct st_gpio_from_pfce1 *)&GPIO.PFCE6) /* GPIO_FROM_PFCE6 */
793 #define GPIO_FROM_PFCE7 (*(struct st_gpio_from_pfce1 *)&GPIO.PFCE7) /* GPIO_FROM_PFCE7 */
794 #define GPIO_FROM_PFCE8 (*(struct st_gpio_from_pfce1 *)&GPIO.PFCE8) /* GPIO_FROM_PFCE8 */
795 #define GPIO_FROM_PFCE9 (*(struct st_gpio_from_pfce1 *)&GPIO.PFCE9) /* GPIO_FROM_PFCE9 */
796 #define GPIO_FROM_PFCE10 (*(struct st_gpio_from_pfce1 *)&GPIO.PFCE10) /* GPIO_FROM_PFCE10 */
797 #define GPIO_FROM_PFCE11 (*(struct st_gpio_from_pfce1 *)&GPIO.PFCE11) /* GPIO_FROM_PFCE11 */
800 /* Channnel array defines of GPIO_FROM_PFC1_ARRAY */
801 /*(Sample) value = GPIO_FROM_PFC1_ARRAY[ channel ]->PFC1; */
802 #define GPIO_FROM_PFC1_ARRAY_COUNT 11
803 #define GPIO_FROM_PFC1_ARRAY_ADDRESS_LIST \
804 { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
805 &GPIO_FROM_PFC1, &GPIO_FROM_PFC2, &GPIO_FROM_PFC3, &GPIO_FROM_PFC4, &GPIO_FROM_PFC5, &GPIO_FROM_PFC6, &GPIO_FROM_PFC7, &GPIO_FROM_PFC8, \
806 &GPIO_FROM_PFC9, &GPIO_FROM_PFC10, &GPIO_FROM_PFC11 \
807 } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
808 #define GPIO_FROM_PFC1 (*(struct st_gpio_from_pfc1 *)&GPIO.PFC1) /* GPIO_FROM_PFC1 */
809 #define GPIO_FROM_PFC2 (*(struct st_gpio_from_pfc1 *)&GPIO.PFC2) /* GPIO_FROM_PFC2 */
810 #define GPIO_FROM_PFC3 (*(struct st_gpio_from_pfc1 *)&GPIO.PFC3) /* GPIO_FROM_PFC3 */
811 #define GPIO_FROM_PFC4 (*(struct st_gpio_from_pfc1 *)&GPIO.PFC4) /* GPIO_FROM_PFC4 */
812 #define GPIO_FROM_PFC5 (*(struct st_gpio_from_pfc1 *)&GPIO.PFC5) /* GPIO_FROM_PFC5 */
813 #define GPIO_FROM_PFC6 (*(struct st_gpio_from_pfc1 *)&GPIO.PFC6) /* GPIO_FROM_PFC6 */
814 #define GPIO_FROM_PFC7 (*(struct st_gpio_from_pfc1 *)&GPIO.PFC7) /* GPIO_FROM_PFC7 */
815 #define GPIO_FROM_PFC8 (*(struct st_gpio_from_pfc1 *)&GPIO.PFC8) /* GPIO_FROM_PFC8 */
816 #define GPIO_FROM_PFC9 (*(struct st_gpio_from_pfc1 *)&GPIO.PFC9) /* GPIO_FROM_PFC9 */
817 #define GPIO_FROM_PFC10 (*(struct st_gpio_from_pfc1 *)&GPIO.PFC10) /* GPIO_FROM_PFC10 */
818 #define GPIO_FROM_PFC11 (*(struct st_gpio_from_pfc1 *)&GPIO.PFC11) /* GPIO_FROM_PFC11 */
821 /* Channnel array defines of GPIO_FROM_PMC0_ARRAY */
822 /*(Sample) value = GPIO_FROM_PMC0_ARRAY[ channel ]->PMC0; */
823 #define GPIO_FROM_PMC0_ARRAY_COUNT 12
824 #define GPIO_FROM_PMC0_ARRAY_ADDRESS_LIST \
825 { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
826 &GPIO_FROM_PMC0, &GPIO_FROM_PMC1, &GPIO_FROM_PMC2, &GPIO_FROM_PMC3, &GPIO_FROM_PMC4, &GPIO_FROM_PMC5, &GPIO_FROM_PMC6, &GPIO_FROM_PMC7, \
827 &GPIO_FROM_PMC8, &GPIO_FROM_PMC9, &GPIO_FROM_PMC10, &GPIO_FROM_PMC11 \
828 } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
829 #define GPIO_FROM_PMC0 (*(struct st_gpio_from_pmc0 *)&GPIO.PMC0) /* GPIO_FROM_PMC0 */
830 #define GPIO_FROM_PMC1 (*(struct st_gpio_from_pmc0 *)&GPIO.PMC1) /* GPIO_FROM_PMC1 */
831 #define GPIO_FROM_PMC2 (*(struct st_gpio_from_pmc0 *)&GPIO.PMC2) /* GPIO_FROM_PMC2 */
832 #define GPIO_FROM_PMC3 (*(struct st_gpio_from_pmc0 *)&GPIO.PMC3) /* GPIO_FROM_PMC3 */
833 #define GPIO_FROM_PMC4 (*(struct st_gpio_from_pmc0 *)&GPIO.PMC4) /* GPIO_FROM_PMC4 */
834 #define GPIO_FROM_PMC5 (*(struct st_gpio_from_pmc0 *)&GPIO.PMC5) /* GPIO_FROM_PMC5 */
835 #define GPIO_FROM_PMC6 (*(struct st_gpio_from_pmc0 *)&GPIO.PMC6) /* GPIO_FROM_PMC6 */
836 #define GPIO_FROM_PMC7 (*(struct st_gpio_from_pmc0 *)&GPIO.PMC7) /* GPIO_FROM_PMC7 */
837 #define GPIO_FROM_PMC8 (*(struct st_gpio_from_pmc0 *)&GPIO.PMC8) /* GPIO_FROM_PMC8 */
838 #define GPIO_FROM_PMC9 (*(struct st_gpio_from_pmc0 *)&GPIO.PMC9) /* GPIO_FROM_PMC9 */
839 #define GPIO_FROM_PMC10 (*(struct st_gpio_from_pmc0 *)&GPIO.PMC10) /* GPIO_FROM_PMC10 */
840 #define GPIO_FROM_PMC11 (*(struct st_gpio_from_pmc0 *)&GPIO.PMC11) /* GPIO_FROM_PMC11 */
843 /* Channnel array defines of GPIO_FROM_PM1_ARRAY */
844 /*(Sample) value = GPIO_FROM_PM1_ARRAY[ channel ]->PM1; */
845 #define GPIO_FROM_PM1_ARRAY_COUNT 11
846 #define GPIO_FROM_PM1_ARRAY_ADDRESS_LIST \
847 { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
848 &GPIO_FROM_PM1, &GPIO_FROM_PM2, &GPIO_FROM_PM3, &GPIO_FROM_PM4, &GPIO_FROM_PM5, &GPIO_FROM_PM6, &GPIO_FROM_PM7, &GPIO_FROM_PM8, \
849 &GPIO_FROM_PM9, &GPIO_FROM_PM10, &GPIO_FROM_PM11 \
850 } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
851 #define GPIO_FROM_PM1 (*(struct st_gpio_from_pm1 *)&GPIO.PM1) /* GPIO_FROM_PM1 */
852 #define GPIO_FROM_PM2 (*(struct st_gpio_from_pm1 *)&GPIO.PM2) /* GPIO_FROM_PM2 */
853 #define GPIO_FROM_PM3 (*(struct st_gpio_from_pm1 *)&GPIO.PM3) /* GPIO_FROM_PM3 */
854 #define GPIO_FROM_PM4 (*(struct st_gpio_from_pm1 *)&GPIO.PM4) /* GPIO_FROM_PM4 */
855 #define GPIO_FROM_PM5 (*(struct st_gpio_from_pm1 *)&GPIO.PM5) /* GPIO_FROM_PM5 */
856 #define GPIO_FROM_PM6 (*(struct st_gpio_from_pm1 *)&GPIO.PM6) /* GPIO_FROM_PM6 */
857 #define GPIO_FROM_PM7 (*(struct st_gpio_from_pm1 *)&GPIO.PM7) /* GPIO_FROM_PM7 */
858 #define GPIO_FROM_PM8 (*(struct st_gpio_from_pm1 *)&GPIO.PM8) /* GPIO_FROM_PM8 */
859 #define GPIO_FROM_PM9 (*(struct st_gpio_from_pm1 *)&GPIO.PM9) /* GPIO_FROM_PM9 */
860 #define GPIO_FROM_PM10 (*(struct st_gpio_from_pm1 *)&GPIO.PM10) /* GPIO_FROM_PM10 */
861 #define GPIO_FROM_PM11 (*(struct st_gpio_from_pm1 *)&GPIO.PM11) /* GPIO_FROM_PM11 */
864 /* Channnel array defines of GPIO_FROM_PPR0_ARRAY */
865 /*(Sample) value = GPIO_FROM_PPR0_ARRAY[ channel ]->PPR0; */
866 #define GPIO_FROM_PPR0_ARRAY_COUNT 12
867 #define GPIO_FROM_PPR0_ARRAY_ADDRESS_LIST \
868 { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
869 &GPIO_FROM_PPR0, &GPIO_FROM_PPR1, &GPIO_FROM_PPR2, &GPIO_FROM_PPR3, &GPIO_FROM_PPR4, &GPIO_FROM_PPR5, &GPIO_FROM_PPR6, &GPIO_FROM_PPR7, \
870 &GPIO_FROM_PPR8, &GPIO_FROM_PPR9, &GPIO_FROM_PPR10, &GPIO_FROM_PPR11 \
871 } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
872 #define GPIO_FROM_PPR0 (*(struct st_gpio_from_ppr0 *)&GPIO.PPR0) /* GPIO_FROM_PPR0 */
873 #define GPIO_FROM_PPR1 (*(struct st_gpio_from_ppr0 *)&GPIO.PPR1) /* GPIO_FROM_PPR1 */
874 #define GPIO_FROM_PPR2 (*(struct st_gpio_from_ppr0 *)&GPIO.PPR2) /* GPIO_FROM_PPR2 */
875 #define GPIO_FROM_PPR3 (*(struct st_gpio_from_ppr0 *)&GPIO.PPR3) /* GPIO_FROM_PPR3 */
876 #define GPIO_FROM_PPR4 (*(struct st_gpio_from_ppr0 *)&GPIO.PPR4) /* GPIO_FROM_PPR4 */
877 #define GPIO_FROM_PPR5 (*(struct st_gpio_from_ppr0 *)&GPIO.PPR5) /* GPIO_FROM_PPR5 */
878 #define GPIO_FROM_PPR6 (*(struct st_gpio_from_ppr0 *)&GPIO.PPR6) /* GPIO_FROM_PPR6 */
879 #define GPIO_FROM_PPR7 (*(struct st_gpio_from_ppr0 *)&GPIO.PPR7) /* GPIO_FROM_PPR7 */
880 #define GPIO_FROM_PPR8 (*(struct st_gpio_from_ppr0 *)&GPIO.PPR8) /* GPIO_FROM_PPR8 */
881 #define GPIO_FROM_PPR9 (*(struct st_gpio_from_ppr0 *)&GPIO.PPR9) /* GPIO_FROM_PPR9 */
882 #define GPIO_FROM_PPR10 (*(struct st_gpio_from_ppr0 *)&GPIO.PPR10) /* GPIO_FROM_PPR10 */
883 #define GPIO_FROM_PPR11 (*(struct st_gpio_from_ppr0 *)&GPIO.PPR11) /* GPIO_FROM_PPR11 */
886 /* Channnel array defines of GPIO_FROM_P1_ARRAY */
887 /*(Sample) value = GPIO_FROM_P1_ARRAY[ channel ]->P1; */
888 #define GPIO_FROM_P1_ARRAY_COUNT 11
889 #define GPIO_FROM_P1_ARRAY_ADDRESS_LIST \
890 { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
891 &GPIO_FROM_P1, &GPIO_FROM_P2, &GPIO_FROM_P3, &GPIO_FROM_P4, &GPIO_FROM_P5, &GPIO_FROM_P6, &GPIO_FROM_P7, &GPIO_FROM_P8, \
892 &GPIO_FROM_P9, &GPIO_FROM_P10, &GPIO_FROM_P11 \
893 } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
894 #define GPIO_FROM_P1 (*(struct st_gpio_from_p1 *)&GPIO.P1) /* GPIO_FROM_P1 */
895 #define GPIO_FROM_P2 (*(struct st_gpio_from_p1 *)&GPIO.P2) /* GPIO_FROM_P2 */
896 #define GPIO_FROM_P3 (*(struct st_gpio_from_p1 *)&GPIO.P3) /* GPIO_FROM_P3 */
897 #define GPIO_FROM_P4 (*(struct st_gpio_from_p1 *)&GPIO.P4) /* GPIO_FROM_P4 */
898 #define GPIO_FROM_P5 (*(struct st_gpio_from_p1 *)&GPIO.P5) /* GPIO_FROM_P5 */
899 #define GPIO_FROM_P6 (*(struct st_gpio_from_p1 *)&GPIO.P6) /* GPIO_FROM_P6 */
900 #define GPIO_FROM_P7 (*(struct st_gpio_from_p1 *)&GPIO.P7) /* GPIO_FROM_P7 */
901 #define GPIO_FROM_P8 (*(struct st_gpio_from_p1 *)&GPIO.P8) /* GPIO_FROM_P8 */
902 #define GPIO_FROM_P9 (*(struct st_gpio_from_p1 *)&GPIO.P9) /* GPIO_FROM_P9 */
903 #define GPIO_FROM_P10 (*(struct st_gpio_from_p1 *)&GPIO.P10) /* GPIO_FROM_P10 */
904 #define GPIO_FROM_P11 (*(struct st_gpio_from_p1 *)&GPIO.P11) /* GPIO_FROM_P11 */
906 /* End of channnel array defines of GPIO */
909 #define GPIOP1 GPIO.P1
910 #define GPIOP2 GPIO.P2
911 #define GPIOP3 GPIO.P3
912 #define GPIOP4 GPIO.P4
913 #define GPIOP5 GPIO.P5
914 #define GPIOP6 GPIO.P6
915 #define GPIOP7 GPIO.P7
916 #define GPIOP8 GPIO.P8
917 #define GPIOP9 GPIO.P9
918 #define GPIOP10 GPIO.P10
919 #define GPIOP11 GPIO.P11
920 #define GPIOPSR1 GPIO.PSR1
921 #define GPIOPSR2 GPIO.PSR2
922 #define GPIOPSR3 GPIO.PSR3
923 #define GPIOPSR4 GPIO.PSR4
924 #define GPIOPSR5 GPIO.PSR5
925 #define GPIOPSR6 GPIO.PSR6
926 #define GPIOPSR7 GPIO.PSR7
927 #define GPIOPSR8 GPIO.PSR8
928 #define GPIOPSR9 GPIO.PSR9
929 #define GPIOPSR10 GPIO.PSR10
930 #define GPIOPSR11 GPIO.PSR11
931 #define GPIOPPR0 GPIO.PPR0
932 #define GPIOPPR1 GPIO.PPR1
933 #define GPIOPPR2 GPIO.PPR2
934 #define GPIOPPR3 GPIO.PPR3
935 #define GPIOPPR4 GPIO.PPR4
936 #define GPIOPPR5 GPIO.PPR5
937 #define GPIOPPR6 GPIO.PPR6
938 #define GPIOPPR7 GPIO.PPR7
939 #define GPIOPPR8 GPIO.PPR8
940 #define GPIOPPR9 GPIO.PPR9
941 #define GPIOPPR10 GPIO.PPR10
942 #define GPIOPPR11 GPIO.PPR11
943 #define GPIOPM1 GPIO.PM1
944 #define GPIOPM2 GPIO.PM2
945 #define GPIOPM3 GPIO.PM3
946 #define GPIOPM4 GPIO.PM4
947 #define GPIOPM5 GPIO.PM5
948 #define GPIOPM6 GPIO.PM6
949 #define GPIOPM7 GPIO.PM7
950 #define GPIOPM8 GPIO.PM8
951 #define GPIOPM9 GPIO.PM9
952 #define GPIOPM10 GPIO.PM10
953 #define GPIOPM11 GPIO.PM11
954 #define GPIOPMC0 GPIO.PMC0
955 #define GPIOPMC1 GPIO.PMC1
956 #define GPIOPMC2 GPIO.PMC2
957 #define GPIOPMC3 GPIO.PMC3
958 #define GPIOPMC4 GPIO.PMC4
959 #define GPIOPMC5 GPIO.PMC5
960 #define GPIOPMC6 GPIO.PMC6
961 #define GPIOPMC7 GPIO.PMC7
962 #define GPIOPMC8 GPIO.PMC8
963 #define GPIOPMC9 GPIO.PMC9
964 #define GPIOPMC10 GPIO.PMC10
965 #define GPIOPMC11 GPIO.PMC11
966 #define GPIOPFC1 GPIO.PFC1
967 #define GPIOPFC2 GPIO.PFC2
968 #define GPIOPFC3 GPIO.PFC3
969 #define GPIOPFC4 GPIO.PFC4
970 #define GPIOPFC5 GPIO.PFC5
971 #define GPIOPFC6 GPIO.PFC6
972 #define GPIOPFC7 GPIO.PFC7
973 #define GPIOPFC8 GPIO.PFC8
974 #define GPIOPFC9 GPIO.PFC9
975 #define GPIOPFC10 GPIO.PFC10
976 #define GPIOPFC11 GPIO.PFC11
977 #define GPIOPFCE1 GPIO.PFCE1
978 #define GPIOPFCE2 GPIO.PFCE2
979 #define GPIOPFCE3 GPIO.PFCE3
980 #define GPIOPFCE4 GPIO.PFCE4
981 #define GPIOPFCE5 GPIO.PFCE5
982 #define GPIOPFCE6 GPIO.PFCE6
983 #define GPIOPFCE7 GPIO.PFCE7
984 #define GPIOPFCE8 GPIO.PFCE8
985 #define GPIOPFCE9 GPIO.PFCE9
986 #define GPIOPFCE10 GPIO.PFCE10
987 #define GPIOPFCE11 GPIO.PFCE11
988 #define GPIOPNOT1 GPIO.PNOT1
989 #define GPIOPNOT2 GPIO.PNOT2
990 #define GPIOPNOT3 GPIO.PNOT3
991 #define GPIOPNOT4 GPIO.PNOT4
992 #define GPIOPNOT5 GPIO.PNOT5
993 #define GPIOPNOT6 GPIO.PNOT6
994 #define GPIOPNOT7 GPIO.PNOT7
995 #define GPIOPNOT8 GPIO.PNOT8
996 #define GPIOPNOT9 GPIO.PNOT9
997 #define GPIOPNOT10 GPIO.PNOT10
998 #define GPIOPNOT11 GPIO.PNOT11
999 #define GPIOPMSR1 GPIO.PMSR1
1000 #define GPIOPMSR2 GPIO.PMSR2
1001 #define GPIOPMSR3 GPIO.PMSR3
1002 #define GPIOPMSR4 GPIO.PMSR4
1003 #define GPIOPMSR5 GPIO.PMSR5
1004 #define GPIOPMSR6 GPIO.PMSR6
1005 #define GPIOPMSR7 GPIO.PMSR7
1006 #define GPIOPMSR8 GPIO.PMSR8
1007 #define GPIOPMSR9 GPIO.PMSR9
1008 #define GPIOPMSR10 GPIO.PMSR10
1009 #define GPIOPMSR11 GPIO.PMSR11
1010 #define GPIOPMCSR0 GPIO.PMCSR0
1011 #define GPIOPMCSR1 GPIO.PMCSR1
1012 #define GPIOPMCSR2 GPIO.PMCSR2
1013 #define GPIOPMCSR3 GPIO.PMCSR3
1014 #define GPIOPMCSR4 GPIO.PMCSR4
1015 #define GPIOPMCSR5 GPIO.PMCSR5
1016 #define GPIOPMCSR6 GPIO.PMCSR6
1017 #define GPIOPMCSR7 GPIO.PMCSR7
1018 #define GPIOPMCSR8 GPIO.PMCSR8
1019 #define GPIOPMCSR9 GPIO.PMCSR9
1020 #define GPIOPMCSR10 GPIO.PMCSR10
1021 #define GPIOPMCSR11 GPIO.PMCSR11
1022 #define GPIOPFCAE1 GPIO.PFCAE1
1023 #define GPIOPFCAE2 GPIO.PFCAE2
1024 #define GPIOPFCAE3 GPIO.PFCAE3
1025 #define GPIOPFCAE4 GPIO.PFCAE4
1026 #define GPIOPFCAE5 GPIO.PFCAE5
1027 #define GPIOPFCAE6 GPIO.PFCAE6
1028 #define GPIOPFCAE7 GPIO.PFCAE7
1029 #define GPIOPFCAE8 GPIO.PFCAE8
1030 #define GPIOPFCAE9 GPIO.PFCAE9
1031 #define GPIOPFCAE10 GPIO.PFCAE10
1032 #define GPIOPFCAE11 GPIO.PFCAE11
1033 #define GPIOSNCR GPIO.SNCR
1034 #define GPIOPIBC0 GPIO.PIBC0
1035 #define GPIOPIBC1 GPIO.PIBC1
1036 #define GPIOPIBC2 GPIO.PIBC2
1037 #define GPIOPIBC3 GPIO.PIBC3
1038 #define GPIOPIBC4 GPIO.PIBC4
1039 #define GPIOPIBC5 GPIO.PIBC5
1040 #define GPIOPIBC6 GPIO.PIBC6
1041 #define GPIOPIBC7 GPIO.PIBC7
1042 #define GPIOPIBC8 GPIO.PIBC8
1043 #define GPIOPIBC9 GPIO.PIBC9
1044 #define GPIOPIBC10 GPIO.PIBC10
1045 #define GPIOPIBC11 GPIO.PIBC11
1046 #define GPIOPBDC1 GPIO.PBDC1
1047 #define GPIOPBDC2 GPIO.PBDC2
1048 #define GPIOPBDC3 GPIO.PBDC3
1049 #define GPIOPBDC4 GPIO.PBDC4
1050 #define GPIOPBDC5 GPIO.PBDC5
1051 #define GPIOPBDC6 GPIO.PBDC6
1052 #define GPIOPBDC7 GPIO.PBDC7
1053 #define GPIOPBDC8 GPIO.PBDC8
1054 #define GPIOPBDC9 GPIO.PBDC9
1055 #define GPIOPBDC10 GPIO.PBDC10
1056 #define GPIOPBDC11 GPIO.PBDC11
1057 #define GPIOPIPC1 GPIO.PIPC1
1058 #define GPIOPIPC2 GPIO.PIPC2
1059 #define GPIOPIPC3 GPIO.PIPC3
1060 #define GPIOPIPC4 GPIO.PIPC4
1061 #define GPIOPIPC5 GPIO.PIPC5
1062 #define GPIOPIPC6 GPIO.PIPC6
1063 #define GPIOPIPC7 GPIO.PIPC7
1064 #define GPIOPIPC8 GPIO.PIPC8
1065 #define GPIOPIPC9 GPIO.PIPC9
1066 #define GPIOPIPC10 GPIO.PIPC10
1067 #define GPIOPIPC11 GPIO.PIPC11
1068 #define GPIOJPPR0 GPIO.JPPR0
1069 #define GPIOJPMC0 GPIO.JPMC0
1070 #define GPIOJPMCSR0 GPIO.JPMCSR0
1071 #define GPIOJPIBC0 GPIO.JPIBC0
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