tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/inc/iodefines/scim_iodefine.h

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  23 /*******************************************************************************
  24 * File Name : scim_iodefine.h
  25 * $Rev: $
  26 * $Date::                           $
  27 * Description : Definition of I/O Register (V1.00a)
  28 ******************************************************************************/
  29 #ifndef SCIM_IODEFINE_H
  30 #define SCIM_IODEFINE_H
  31 /* ->SEC M1.10.1 : Not magic number */
  32
  33 struct st_scim
  34 {                                                          /* SCIM             */
  35     volatile uint8_t   SMR;                                    /*  SMR             */
  36     volatile uint8_t   BRR;                                    /*  BRR             */
  37     volatile uint8_t   SCR;                                    /*  SCR             */
  38     volatile uint8_t   TDR;                                    /*  TDR             */
  39     volatile uint8_t   SSR;                                    /*  SSR             */
  40     volatile uint8_t   RDR;                                    /*  RDR             */
  41     volatile uint8_t   SCMR;                                   /*  SCMR            */
  42     volatile uint8_t   SEMR;                                   /*  SEMR            */
  43     volatile uint8_t   SNFR;                                   /*  SNFR            */
  44     volatile uint8_t   dummy1[4];                              /*                  */
  45     volatile uint8_t   SECR;                                   /*  SECR            */
  46 };
  47
  48
  49 #define SCIM0   (*(struct st_scim    *)0xE800B000uL) /* SCIM0 */
  50 #define SCIM1   (*(struct st_scim    *)0xE800B800uL) /* SCIM1 */
  51
  52
  53 /* Start of channnel array defines of SCIM */
  54
  55 /* Channnel array defines of SCIM */
  56 /*(Sample) value = SCIM[ channel ]->SMR; */
  57 #define SCIM_COUNT  2
  58 #define SCIM_ADDRESS_LIST \
  59 {   /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
  60     &SCIM0, &SCIM1 \
  61 }   /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
  62
  63 /* End of channnel array defines of SCIM */
  64
  65
  66 #define SMR0 SCIM0.SMR
  67 #define BRR0 SCIM0.BRR
  68 #define SCR0 SCIM0.SCR
  69 #define TDR0 SCIM0.TDR
  70 #define SSR0 SCIM0.SSR
  71 #define RDR0 SCIM0.RDR
  72 #define SCMR0 SCIM0.SCMR
  73 #define SEMR0 SCIM0.SEMR
  74 #define SNFR0 SCIM0.SNFR
  75 #define SECR0 SCIM0.SECR
  76 #define SMR1 SCIM1.SMR
  77 #define BRR1 SCIM1.BRR
  78 #define SCR1 SCIM1.SCR
  79 #define TDR1 SCIM1.TDR
  80 #define SSR1 SCIM1.SSR
  81 #define RDR1 SCIM1.RDR
  82 #define SCMR1 SCIM1.SCMR
  83 #define SEMR1 SCIM1.SEMR
  84 #define SNFR1 SCIM1.SNFR
  85 #define SECR1 SCIM1.SECR
  86 /* <-SEC M1.10.1 */
  87 #endif