tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/startup_stm32f030x8.s

   1 ; STM32F030x8 devices vector table for MDK ARM_STD toolchain
   2 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
   3 ; Copyright (c) 2014, STMicroelectronics
   4 ; All rights reserved.
   5 ;
   6 ; Redistribution and use in source and binary forms, with or without
   7 ; modification, are permitted provided that the following conditions are met:
   8 ;
   9 ; 1. Redistributions of source code must retain the above copyright notice,
  10 ;     this list of conditions and the following disclaimer.
  11 ; 2. Redistributions in binary form must reproduce the above copyright notice,
  12 ;    this list of conditions and the following disclaimer in the documentation
  13 ;    and/or other materials provided with the distribution.
  14 ; 3. Neither the name of STMicroelectronics nor the names of its contributors
  15 ;    may be used to endorse or promote products derived from this software
  16 ;    without specific prior written permission.
  17 ;
  18 ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  19 ; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  20 ; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  21 ; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  22 ; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  23 ; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  24 ; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  25 ; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  26 ; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  27 ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  29
  30 __initial_sp    EQU     0x20002000 ; Top of RAM (8 KB for STM32F030R8)
  31
  32                 PRESERVE8
  33                 THUMB
  34
  35
  36 ; Vector Table Mapped to Address 0 at Reset
  37                 AREA    RESET, DATA, READONLY
  38                 EXPORT  __Vectors
  39                 EXPORT  __Vectors_End
  40                 EXPORT  __Vectors_Size
  41
  42 __Vectors       DCD     __initial_sp                   ; Top of Stack
  43                 DCD     Reset_Handler                  ; Reset Handler
  44                 DCD     NMI_Handler                    ; NMI Handler
  45                 DCD     HardFault_Handler              ; Hard Fault Handler
  46                 DCD     0                              ; Reserved
  47                 DCD     0                              ; Reserved
  48                 DCD     0                              ; Reserved
  49                 DCD     0                              ; Reserved
  50                 DCD     0                              ; Reserved
  51                 DCD     0                              ; Reserved
  52                 DCD     0                              ; Reserved
  53                 DCD     SVC_Handler                    ; SVCall Handler
  54                 DCD     0                              ; Reserved
  55                 DCD     0                              ; Reserved
  56                 DCD     PendSV_Handler                 ; PendSV Handler
  57                 DCD     SysTick_Handler                ; SysTick Handler
  58
  59                 ; External Interrupts
  60                 DCD     WWDG_IRQHandler                ; Window Watchdog
  61                 DCD     0                              ; Reserved
  62                 DCD     RTC_IRQHandler                 ; RTC through EXTI Line
  63                 DCD     FLASH_IRQHandler               ; FLASH
  64                 DCD     RCC_IRQHandler                 ; RCC
  65                 DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
  66                 DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
  67                 DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
  68                 DCD     0                              ; Reserved
  69                 DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
  70                 DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
  71                 DCD     DMA1_Channel4_5_IRQHandler     ; DMA1 Channel 4 and Channel 5
  72                 DCD     ADC1_IRQHandler                ; ADC1
  73                 DCD     TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
  74                 DCD     TIM1_CC_IRQHandler             ; TIM1 Capture Compare
  75                 DCD     0                              ; Reserved
  76                 DCD     TIM3_IRQHandler                ; TIM3
  77                 DCD     0                              ; Reserved
  78                 DCD     0                              ; Reserved
  79                 DCD     TIM14_IRQHandler               ; TIM14
  80                 DCD     TIM15_IRQHandler               ; TIM15
  81                 DCD     TIM16_IRQHandler               ; TIM16
  82                 DCD     TIM17_IRQHandler               ; TIM17
  83                 DCD     I2C1_IRQHandler                ; I2C1
  84                 DCD     I2C2_IRQHandler                ; I2C2
  85                 DCD     SPI1_IRQHandler                ; SPI1
  86                 DCD     SPI2_IRQHandler                ; SPI2
  87                 DCD     USART1_IRQHandler              ; USART1
  88                 DCD     USART2_IRQHandler              ; USART2
  89
  90 __Vectors_End
  91
  92 __Vectors_Size  EQU  __Vectors_End - __Vectors
  93
  94                 AREA    |.text|, CODE, READONLY
  95
  96 ; Reset handler
  97 Reset_Handler    PROC
  98                  EXPORT  Reset_Handler                 [WEAK]
  99         IMPORT  __main
 100         IMPORT  SystemInit
 101                  LDR     R0, =SystemInit
 102                  BLX     R0
 103                  LDR     R0, =__main
 104                  BX      R0
 105                  ENDP
 106
 107 ; Dummy Exception Handlers (infinite loops which can be modified)
 108
 109 NMI_Handler     PROC
 110                 EXPORT  NMI_Handler                    [WEAK]
 111                 B       .
 112                 ENDP
 113 HardFault_Handler\
 114                 PROC
 115                 EXPORT  HardFault_Handler              [WEAK]
 116                 B       .
 117                 ENDP
 118 SVC_Handler     PROC
 119                 EXPORT  SVC_Handler                    [WEAK]
 120                 B       .
 121                 ENDP
 122 PendSV_Handler  PROC
 123                 EXPORT  PendSV_Handler                 [WEAK]
 124                 B       .
 125                 ENDP
 126 SysTick_Handler PROC
 127                 EXPORT  SysTick_Handler                [WEAK]
 128                 B       .
 129                 ENDP
 130
 131 Default_Handler PROC
 132
 133                 EXPORT  WWDG_IRQHandler                [WEAK]
 134                 EXPORT  RTC_IRQHandler                 [WEAK]
 135                 EXPORT  FLASH_IRQHandler               [WEAK]
 136                 EXPORT  RCC_IRQHandler                 [WEAK]
 137                 EXPORT  EXTI0_1_IRQHandler             [WEAK]
 138                 EXPORT  EXTI2_3_IRQHandler             [WEAK]
 139                 EXPORT  EXTI4_15_IRQHandler            [WEAK]
 140                 EXPORT  DMA1_Channel1_IRQHandler       [WEAK]
 141                 EXPORT  DMA1_Channel2_3_IRQHandler     [WEAK]
 142                 EXPORT  DMA1_Channel4_5_IRQHandler     [WEAK]
 143                 EXPORT  ADC1_IRQHandler                [WEAK]
 144                 EXPORT  TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK]
 145                 EXPORT  TIM1_CC_IRQHandler             [WEAK]
 146                 EXPORT  TIM3_IRQHandler                [WEAK]
 147                 EXPORT  TIM14_IRQHandler               [WEAK]
 148                 EXPORT  TIM15_IRQHandler               [WEAK]
 149                 EXPORT  TIM16_IRQHandler               [WEAK]
 150                 EXPORT  TIM17_IRQHandler               [WEAK]
 151                 EXPORT  I2C1_IRQHandler                [WEAK]
 152                 EXPORT  I2C2_IRQHandler                [WEAK]
 153                 EXPORT  SPI1_IRQHandler                [WEAK]
 154                 EXPORT  SPI2_IRQHandler                [WEAK]
 155                 EXPORT  USART1_IRQHandler              [WEAK]
 156                 EXPORT  USART2_IRQHandler              [WEAK]
 157
 158
 159 WWDG_IRQHandler
 160 RTC_IRQHandler
 161 FLASH_IRQHandler
 162 RCC_IRQHandler
 163 EXTI0_1_IRQHandler
 164 EXTI2_3_IRQHandler
 165 EXTI4_15_IRQHandler
 166 DMA1_Channel1_IRQHandler
 167 DMA1_Channel2_3_IRQHandler
 168 DMA1_Channel4_5_IRQHandler
 169 ADC1_IRQHandler
 170 TIM1_BRK_UP_TRG_COM_IRQHandler
 171 TIM1_CC_IRQHandler
 172 TIM3_IRQHandler
 173 TIM14_IRQHandler
 174 TIM15_IRQHandler
 175 TIM16_IRQHandler
 176 TIM17_IRQHandler
 177 I2C1_IRQHandler
 178 I2C2_IRQHandler
 179 SPI1_IRQHandler
 180 SPI2_IRQHandler
 181 USART1_IRQHandler
 182 USART2_IRQHandler
 183
 184                 B       .
 185
 186                 ENDP
 187
 188                 ALIGN
 189                  END