2 ******************************************************************************
3 * @file startup_stm32f030x8.s
4 * @author MCD Application Team
7 * @brief STM32F030x8 devices vector table for Atollic TrueSTUDIO toolchain.
8 * This module performs:
10 * - Set the initial PC == Reset_Handler,
11 * - Set the vector table entries with the exceptions ISR address
12 * - Branches to main in the C library (which eventually
14 * After Reset the Cortex-M0 processor is in Thread mode,
15 * priority is Privileged, and the Stack is set to Main.
16 ******************************************************************************
18 * Redistribution and use in source and binary forms, with or without modification,
19 * are permitted provided that the following conditions are met:
20 * 1. Redistributions of source code must retain the above copyright notice,
21 * this list of conditions and the following disclaimer.
22 * 2. Redistributions in binary form must reproduce the above copyright notice,
23 * this list of conditions and the following disclaimer in the documentation
24 * and/or other materials provided with the distribution.
25 * 3. Neither the name of STMicroelectronics nor the names of its contributors
26 * may be used to endorse or promote products derived from this software
27 * without specific prior written permission.
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
30 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
32 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
37 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 ******************************************************************************
49 .global Default_Handler
51 /* start address for the initialization values of the .data section.
52 defined in linker script */
54 /* start address for the .data section. defined in linker script */
56 /* end address for the .data section. defined in linker script */
58 /* start address for the .bss section. defined in linker script */
60 /* end address for the .bss section. defined in linker script */
63 .section .text.Reset_Handler
65 .type Reset_Handler, %function
68 mov sp, r0 /* set stack pointer */
70 /* Copy the data segment initializers from flash to SRAM */
88 /* Zero fill the bss segment. */
100 /* Call the clock system intitialization function.*/
102 /* Call static constructors */
104 /* Call the application's entry point.*/
111 .size Reset_Handler, .-Reset_Handler
114 * @brief This is the code that gets called when the processor receives an
115 * unexpected interrupt. This simply enters an infinite loop, preserving
116 * the system state for examination by a debugger.
121 .section .text.Default_Handler,"ax",%progbits
125 .size Default_Handler, .-Default_Handler
126 /******************************************************************************
128 * The minimal vector table for a Cortex M0. Note that the proper constructs
129 * must be placed on this to ensure that it ends up at physical address
132 ******************************************************************************/
133 .section .isr_vector,"a",%progbits
134 .type g_pfnVectors, %object
135 .size g_pfnVectors, .-g_pfnVectors
142 .word HardFault_Handler
154 .word SysTick_Handler
155 .word WWDG_IRQHandler /* Window WatchDog */
156 .word 0 /* Reserved */
157 .word RTC_IRQHandler /* RTC through the EXTI line */
158 .word FLASH_IRQHandler /* FLASH */
159 .word RCC_IRQHandler /* RCC */
160 .word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */
161 .word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */
162 .word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */
163 .word 0 /* Reserved */
164 .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
165 .word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */
166 .word DMA1_Channel4_5_IRQHandler /* DMA1 Channel 4 and Channel 5 */
167 .word ADC1_IRQHandler /* ADC1 */
168 .word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */
169 .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
170 .word 0 /* Reserved */
171 .word TIM3_IRQHandler /* TIM3 */
172 .word TIM6_IRQHandler /* TIM6 */
173 .word 0 /* Reserved */
174 .word TIM14_IRQHandler /* TIM14 */
175 .word TIM15_IRQHandler /* TIM15 */
176 .word TIM16_IRQHandler /* TIM16 */
177 .word TIM17_IRQHandler /* TIM17 */
178 .word I2C1_IRQHandler /* I2C1 */
179 .word I2C2_IRQHandler /* I2C2 */
180 .word SPI1_IRQHandler /* SPI1 */
181 .word SPI2_IRQHandler /* SPI2 */
182 .word USART1_IRQHandler /* USART1 */
183 .word USART2_IRQHandler /* USART2 */
184 .word 0 /* Reserved */
185 .word 0 /* Reserved */
186 .word 0 /* Reserved */
188 /*******************************************************************************
190 * Provide weak aliases for each Exception handler to the Default_Handler.
191 * As they are weak aliases, any function with the same name will override
194 *******************************************************************************/
197 .thumb_set NMI_Handler,Default_Handler
199 .weak HardFault_Handler
200 .thumb_set HardFault_Handler,Default_Handler
203 .thumb_set SVC_Handler,Default_Handler
206 .thumb_set PendSV_Handler,Default_Handler
208 .weak SysTick_Handler
209 .thumb_set SysTick_Handler,Default_Handler
211 .weak WWDG_IRQHandler
212 .thumb_set WWDG_IRQHandler,Default_Handler
215 .thumb_set RTC_IRQHandler,Default_Handler
217 .weak FLASH_IRQHandler
218 .thumb_set FLASH_IRQHandler,Default_Handler
221 .thumb_set RCC_IRQHandler,Default_Handler
223 .weak EXTI0_1_IRQHandler
224 .thumb_set EXTI0_1_IRQHandler,Default_Handler
226 .weak EXTI2_3_IRQHandler
227 .thumb_set EXTI2_3_IRQHandler,Default_Handler
229 .weak EXTI4_15_IRQHandler
230 .thumb_set EXTI4_15_IRQHandler,Default_Handler
232 .weak DMA1_Channel1_IRQHandler
233 .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
235 .weak DMA1_Channel2_3_IRQHandler
236 .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
238 .weak DMA1_Channel4_5_IRQHandler
239 .thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler
241 .weak ADC1_IRQHandler
242 .thumb_set ADC1_IRQHandler,Default_Handler
244 .weak TIM1_BRK_UP_TRG_COM_IRQHandler
245 .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
247 .weak TIM1_CC_IRQHandler
248 .thumb_set TIM1_CC_IRQHandler,Default_Handler
250 .weak TIM3_IRQHandler
251 .thumb_set TIM3_IRQHandler,Default_Handler
253 .weak TIM6_IRQHandler
254 .thumb_set TIM6_IRQHandler,Default_Handler
256 .weak TIM14_IRQHandler
257 .thumb_set TIM14_IRQHandler,Default_Handler
259 .weak TIM15_IRQHandler
260 .thumb_set TIM15_IRQHandler,Default_Handler
262 .weak TIM16_IRQHandler
263 .thumb_set TIM16_IRQHandler,Default_Handler
265 .weak TIM17_IRQHandler
266 .thumb_set TIM17_IRQHandler,Default_Handler
268 .weak I2C1_IRQHandler
269 .thumb_set I2C1_IRQHandler,Default_Handler
271 .weak I2C2_IRQHandler
272 .thumb_set I2C2_IRQHandler,Default_Handler
274 .weak SPI1_IRQHandler
275 .thumb_set SPI1_IRQHandler,Default_Handler
277 .weak SPI2_IRQHandler
278 .thumb_set SPI2_IRQHandler,Default_Handler
280 .weak USART1_IRQHandler
281 .thumb_set USART1_IRQHandler,Default_Handler
283 .weak USART2_IRQHandler
284 .thumb_set USART2_IRQHandler,Default_Handler
286 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/