1 ;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
2 ;* File Name : startup_stm32f070xb.s
3 ;* Author : MCD Application Team
5 ;* Date : 05-December-2014
6 ;* Description : STM32F070x8/STM32F070xB devices vector table for MDK-ARM toolchain.
7 ;* This module performs:
8 ;* - Set the initial SP
9 ;* - Set the initial PC == Reset_Handler
10 ;* - Set the vector table entries with the exceptions ISR address
11 ;* - Branches to __main in the C library (which eventually
13 ;* After Reset the CortexM0 processor is in Thread mode,
14 ;* priority is Privileged, and the Stack is set to Main.
15 ;* <<< Use Configuration Wizard in Context Menu >>>
16 ;*******************************************************************************
18 ;* Redistribution and use in source and binary forms, with or without modification,
19 ;* are permitted provided that the following conditions are met:
20 ;* 1. Redistributions of source code must retain the above copyright notice,
21 ;* this list of conditions and the following disclaimer.
22 ;* 2. Redistributions in binary form must reproduce the above copyright notice,
23 ;* this list of conditions and the following disclaimer in the documentation
24 ;* and/or other materials provided with the distribution.
25 ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
26 ;* may be used to endorse or promote products derived from this software
27 ;* without specific prior written permission.
29 ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
30 ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31 ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
32 ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
33 ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
35 ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36 ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
37 ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 ;*******************************************************************************
42 ; Amount of memory (in bytes) allocated for Stack
43 ; Tailor this value to your application needs
44 ; <h> Stack Configuration
45 ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
48 Stack_Size EQU 0x00000400
50 AREA STACK, NOINIT, READWRITE, ALIGN=3
53 Stack_Mem SPACE Stack_Size
54 __initial_sp EQU 0x20004000 ; Top of RAM (16KB)
57 ; <h> Heap Configuration
58 ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
61 Heap_Size EQU 0x00000400
63 AREA HEAP, NOINIT, READWRITE, ALIGN=3
68 Heap_Mem SPACE Heap_Size
69 __heap_limit EQU (__initial_sp - Stack_Size)
75 ; Vector Table Mapped to Address 0 at Reset
76 AREA RESET, DATA, READONLY
81 __Vectors DCD __initial_sp ; Top of Stack
82 DCD Reset_Handler ; Reset Handler
83 DCD NMI_Handler ; NMI Handler
84 DCD HardFault_Handler ; Hard Fault Handler
92 DCD SVC_Handler ; SVCall Handler
95 DCD PendSV_Handler ; PendSV Handler
96 DCD SysTick_Handler ; SysTick Handler
99 DCD WWDG_IRQHandler ; Window Watchdog
101 DCD RTC_IRQHandler ; RTC through EXTI Line
102 DCD FLASH_IRQHandler ; FLASH
103 DCD RCC_IRQHandler ; RCC
104 DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
105 DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
106 DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
108 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
109 DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
110 DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5
111 DCD ADC1_IRQHandler ; ADC1
112 DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
113 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
115 DCD TIM3_IRQHandler ; TIM3
116 DCD TIM6_IRQHandler ; TIM6
117 DCD TIM7_IRQHandler ; TIM7
118 DCD TIM14_IRQHandler ; TIM14
119 DCD TIM15_IRQHandler ; TIM15
120 DCD TIM16_IRQHandler ; TIM16
121 DCD TIM17_IRQHandler ; TIM17
122 DCD I2C1_IRQHandler ; I2C1
123 DCD I2C2_IRQHandler ; I2C2
124 DCD SPI1_IRQHandler ; SPI1
125 DCD SPI2_IRQHandler ; SPI2
126 DCD USART1_IRQHandler ; USART1
127 DCD USART2_IRQHandler ; USART2
128 DCD USART3_4_IRQHandler ; USART3 & USART4
130 DCD USB_IRQHandler ; USB
134 __Vectors_Size EQU __Vectors_End - __Vectors
136 AREA |.text|, CODE, READONLY
138 ; Reset handler routine
140 EXPORT Reset_Handler [WEAK]
149 ; Dummy Exception Handlers (infinite loops which can be modified)
152 EXPORT NMI_Handler [WEAK]
157 EXPORT HardFault_Handler [WEAK]
161 EXPORT SVC_Handler [WEAK]
165 EXPORT PendSV_Handler [WEAK]
169 EXPORT SysTick_Handler [WEAK]
175 EXPORT WWDG_IRQHandler [WEAK]
176 EXPORT RTC_IRQHandler [WEAK]
177 EXPORT FLASH_IRQHandler [WEAK]
178 EXPORT RCC_IRQHandler [WEAK]
179 EXPORT EXTI0_1_IRQHandler [WEAK]
180 EXPORT EXTI2_3_IRQHandler [WEAK]
181 EXPORT EXTI4_15_IRQHandler [WEAK]
182 EXPORT DMA1_Channel1_IRQHandler [WEAK]
183 EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
184 EXPORT DMA1_Channel4_5_IRQHandler [WEAK]
185 EXPORT ADC1_IRQHandler [WEAK]
186 EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK]
187 EXPORT TIM1_CC_IRQHandler [WEAK]
188 EXPORT TIM3_IRQHandler [WEAK]
189 EXPORT TIM6_IRQHandler [WEAK]
190 EXPORT TIM7_IRQHandler [WEAK]
191 EXPORT TIM14_IRQHandler [WEAK]
192 EXPORT TIM15_IRQHandler [WEAK]
193 EXPORT TIM16_IRQHandler [WEAK]
194 EXPORT TIM17_IRQHandler [WEAK]
195 EXPORT I2C1_IRQHandler [WEAK]
196 EXPORT I2C2_IRQHandler [WEAK]
197 EXPORT SPI1_IRQHandler [WEAK]
198 EXPORT SPI2_IRQHandler [WEAK]
199 EXPORT USART1_IRQHandler [WEAK]
200 EXPORT USART2_IRQHandler [WEAK]
201 EXPORT USART3_4_IRQHandler [WEAK]
202 EXPORT USB_IRQHandler [WEAK]
212 DMA1_Channel1_IRQHandler
213 DMA1_Channel2_3_IRQHandler
214 DMA1_Channel4_5_IRQHandler
216 TIM1_BRK_UP_TRG_COM_IRQHandler