]> git.gir.st - tmk_keyboard.git/blob - tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/TOOLCHAIN_IAR/startup_stm32f070xb.s
Squashed 'tmk_core/' changes from 7967731..b9e0ea0
[tmk_keyboard.git] / tool / mbed / mbed-sdk / libraries / mbed / targets / cmsis / TARGET_STM / TARGET_STM32F0 / TARGET_NUCLEO_F070RB / TOOLCHAIN_IAR / startup_stm32f070xb.s
1 ;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
2 ;* File Name : startup_stm32f070xb.s
3 ;* Author : MCD Application Team
4 ;* Version : V2.2.0
5 ;* Date : 05-December-2014
6 ;* Description : STM32F070xB devices vector table for EWARM toolchain.
7 ;* This module performs:
8 ;* - Set the initial SP
9 ;* - Set the initial PC == __iar_program_start,
10 ;* - Set the vector table entries with the exceptions ISR
11 ;* address,
12 ;* - Branches to main in the C library (which eventually
13 ;* calls main()).
14 ;* After Reset the Cortex-M0 processor is in Thread mode,
15 ;* priority is Privileged, and the Stack is set to Main.
16 ;*******************************************************************************
17 ;*
18 ;* <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
19 ;*
20 ;* Redistribution and use in source and binary forms, with or without modification,
21 ;* are permitted provided that the following conditions are met:
22 ;* 1. Redistributions of source code must retain the above copyright notice,
23 ;* this list of conditions and the following disclaimer.
24 ;* 2. Redistributions in binary form must reproduce the above copyright notice,
25 ;* this list of conditions and the following disclaimer in the documentation
26 ;* and/or other materials provided with the distribution.
27 ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
28 ;* may be used to endorse or promote products derived from this software
29 ;* without specific prior written permission.
30 ;*
31 ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
32 ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33 ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34 ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
35 ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
37 ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38 ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
39 ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40 ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41 ;*
42 ;*******************************************************************************
43 ;
44 ;
45 ; The modules in this file are included in the libraries, and may be replaced
46 ; by any user-defined modules that define the PUBLIC symbol _program_start or
47 ; a user defined start symbol.
48 ; To override the cstartup defined in the library, simply add your modified
49 ; version to the workbench project.
50 ;
51 ; The vector table is normally located at address 0.
52 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
53 ; The name "__vector_table" has special meaning for C-SPY:
54 ; it is where the SP start value is found, and the NVIC vector
55 ; table register (VTOR) is initialized to this address if != 0.
56 ;
57 ; Cortex-M version
58 ;
59
60 MODULE ?cstartup
61
62 ;; Forward declaration of sections.
63 SECTION CSTACK:DATA:NOROOT(3)
64
65 SECTION .intvec:CODE:NOROOT(2)
66
67 EXTERN __iar_program_start
68 EXTERN SystemInit
69 PUBLIC __vector_table
70
71 DATA
72 __vector_table
73 DCD sfe(CSTACK)
74 DCD Reset_Handler ; Reset Handler
75
76 DCD NMI_Handler ; NMI Handler
77 DCD HardFault_Handler ; Hard Fault Handler
78 DCD 0 ; Reserved
79 DCD 0 ; Reserved
80 DCD 0 ; Reserved
81 DCD 0 ; Reserved
82 DCD 0 ; Reserved
83 DCD 0 ; Reserved
84 DCD 0 ; Reserved
85 DCD SVC_Handler ; SVCall Handler
86 DCD 0 ; Reserved
87 DCD 0 ; Reserved
88 DCD PendSV_Handler ; PendSV Handler
89 DCD SysTick_Handler ; SysTick Handler
90
91 ; External Interrupts
92 DCD WWDG_IRQHandler ; Window Watchdog
93 DCD 0 ; Reserved
94 DCD RTC_IRQHandler ; RTC through EXTI Line
95 DCD FLASH_IRQHandler ; FLASH
96 DCD RCC_IRQHandler ; RCC
97 DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
98 DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
99 DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
100 DCD 0 ; Reserved
101 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
102 DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
103 DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5
104 DCD ADC1_IRQHandler ; ADC1
105 DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
106 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
107 DCD 0 ; Reserved
108 DCD TIM3_IRQHandler ; TIM3
109 DCD TIM6_IRQHandler ; TIM6
110 DCD TIM7_IRQHandler ; TIM7
111 DCD TIM14_IRQHandler ; TIM14
112 DCD TIM15_IRQHandler ; TIM15
113 DCD TIM16_IRQHandler ; TIM16
114 DCD TIM17_IRQHandler ; TIM17
115 DCD I2C1_IRQHandler ; I2C1
116 DCD I2C2_IRQHandler ; I2C2
117 DCD SPI1_IRQHandler ; SPI1
118 DCD SPI2_IRQHandler ; SPI2
119 DCD USART1_IRQHandler ; USART1
120 DCD USART2_IRQHandler ; USART2
121 DCD USART3_4_IRQHandler ; USART3 and USART4
122 DCD 0 ; Reserved
123 DCD USB_IRQHandler ; USB
124
125 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
126 ;;
127 ;; Default interrupt handlers.
128 ;;
129 THUMB
130
131 PUBWEAK Reset_Handler
132 SECTION .text:CODE:NOROOT:REORDER(2)
133 Reset_Handler
134 LDR R0, =SystemInit
135 BLX R0
136 LDR R0, =__iar_program_start
137 BX R0
138
139 PUBWEAK NMI_Handler
140 SECTION .text:CODE:NOROOT:REORDER(1)
141 NMI_Handler
142 B NMI_Handler
143
144 PUBWEAK HardFault_Handler
145 SECTION .text:CODE:NOROOT:REORDER(1)
146 HardFault_Handler
147 B HardFault_Handler
148
149 PUBWEAK SVC_Handler
150 SECTION .text:CODE:NOROOT:REORDER(1)
151 SVC_Handler
152 B SVC_Handler
153
154 PUBWEAK PendSV_Handler
155 SECTION .text:CODE:NOROOT:REORDER(1)
156 PendSV_Handler
157 B PendSV_Handler
158
159 PUBWEAK SysTick_Handler
160 SECTION .text:CODE:NOROOT:REORDER(1)
161 SysTick_Handler
162 B SysTick_Handler
163
164 PUBWEAK WWDG_IRQHandler
165 SECTION .text:CODE:NOROOT:REORDER(1)
166 WWDG_IRQHandler
167 B WWDG_IRQHandler
168
169 PUBWEAK RTC_IRQHandler
170 SECTION .text:CODE:NOROOT:REORDER(1)
171 RTC_IRQHandler
172 B RTC_IRQHandler
173
174 PUBWEAK FLASH_IRQHandler
175 SECTION .text:CODE:NOROOT:REORDER(1)
176 FLASH_IRQHandler
177 B FLASH_IRQHandler
178
179 PUBWEAK RCC_IRQHandler
180 SECTION .text:CODE:NOROOT:REORDER(1)
181 RCC_IRQHandler
182 B RCC_IRQHandler
183
184 PUBWEAK EXTI0_1_IRQHandler
185 SECTION .text:CODE:NOROOT:REORDER(1)
186 EXTI0_1_IRQHandler
187 B EXTI0_1_IRQHandler
188
189 PUBWEAK EXTI2_3_IRQHandler
190 SECTION .text:CODE:NOROOT:REORDER(1)
191 EXTI2_3_IRQHandler
192 B EXTI2_3_IRQHandler
193
194 PUBWEAK EXTI4_15_IRQHandler
195 SECTION .text:CODE:NOROOT:REORDER(1)
196 EXTI4_15_IRQHandler
197 B EXTI4_15_IRQHandler
198
199 PUBWEAK DMA1_Channel1_IRQHandler
200 SECTION .text:CODE:NOROOT:REORDER(1)
201 DMA1_Channel1_IRQHandler
202 B DMA1_Channel1_IRQHandler
203
204 PUBWEAK DMA1_Channel2_3_IRQHandler
205 SECTION .text:CODE:NOROOT:REORDER(1)
206 DMA1_Channel2_3_IRQHandler
207 B DMA1_Channel2_3_IRQHandler
208
209 PUBWEAK DMA1_Channel4_5_IRQHandler
210 SECTION .text:CODE:NOROOT:REORDER(1)
211 DMA1_Channel4_5_IRQHandler
212 B DMA1_Channel4_5_IRQHandler
213
214 PUBWEAK ADC1_IRQHandler
215 SECTION .text:CODE:NOROOT:REORDER(1)
216 ADC1_IRQHandler
217 B ADC1_IRQHandler
218
219 PUBWEAK TIM1_BRK_UP_TRG_COM_IRQHandler
220 SECTION .text:CODE:NOROOT:REORDER(1)
221 TIM1_BRK_UP_TRG_COM_IRQHandler
222 B TIM1_BRK_UP_TRG_COM_IRQHandler
223
224 PUBWEAK TIM1_CC_IRQHandler
225 SECTION .text:CODE:NOROOT:REORDER(1)
226 TIM1_CC_IRQHandler
227 B TIM1_CC_IRQHandler
228
229 PUBWEAK TIM3_IRQHandler
230 SECTION .text:CODE:NOROOT:REORDER(1)
231 TIM3_IRQHandler
232 B TIM3_IRQHandler
233
234 PUBWEAK TIM6_IRQHandler
235 SECTION .text:CODE:NOROOT:REORDER(1)
236 TIM6_IRQHandler
237 B TIM6_IRQHandler
238
239 PUBWEAK TIM7_IRQHandler
240 SECTION .text:CODE:NOROOT:REORDER(1)
241 TIM7_IRQHandler
242 B TIM7_IRQHandler
243
244 PUBWEAK TIM14_IRQHandler
245 SECTION .text:CODE:NOROOT:REORDER(1)
246 TIM14_IRQHandler
247 B TIM14_IRQHandler
248
249 PUBWEAK TIM15_IRQHandler
250 SECTION .text:CODE:NOROOT:REORDER(1)
251 TIM15_IRQHandler
252 B TIM15_IRQHandler
253
254 PUBWEAK TIM16_IRQHandler
255 SECTION .text:CODE:NOROOT:REORDER(1)
256 TIM16_IRQHandler
257 B TIM16_IRQHandler
258
259 PUBWEAK TIM17_IRQHandler
260 SECTION .text:CODE:NOROOT:REORDER(1)
261 TIM17_IRQHandler
262 B TIM17_IRQHandler
263
264 PUBWEAK I2C1_IRQHandler
265 SECTION .text:CODE:NOROOT:REORDER(1)
266 I2C1_IRQHandler
267 B I2C1_IRQHandler
268
269 PUBWEAK I2C2_IRQHandler
270 SECTION .text:CODE:NOROOT:REORDER(1)
271 I2C2_IRQHandler
272 B I2C2_IRQHandler
273
274 PUBWEAK SPI1_IRQHandler
275 SECTION .text:CODE:NOROOT:REORDER(1)
276 SPI1_IRQHandler
277 B SPI1_IRQHandler
278
279 PUBWEAK SPI2_IRQHandler
280 SECTION .text:CODE:NOROOT:REORDER(1)
281 SPI2_IRQHandler
282 B SPI2_IRQHandler
283
284 PUBWEAK USART1_IRQHandler
285 SECTION .text:CODE:NOROOT:REORDER(1)
286 USART1_IRQHandler
287 B USART1_IRQHandler
288
289 PUBWEAK USART2_IRQHandler
290 SECTION .text:CODE:NOROOT:REORDER(1)
291 USART2_IRQHandler
292 B USART2_IRQHandler
293
294 PUBWEAK USART3_4_IRQHandler
295 SECTION .text:CODE:NOROOT:REORDER(1)
296 USART3_4_IRQHandler
297 B USART3_4_IRQHandler
298
299 PUBWEAK USB_IRQHandler
300 SECTION .text:CODE:NOROOT:REORDER(1)
301 USB_IRQHandler
302 B USB_IRQHandler
303
304 END
305 ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
Imprint / Impressum