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1 /**
2 ******************************************************************************
3 * @file stm32f0xx_hal_adc.c
4 * @author MCD Application Team
5 * @version V1.2.0
6 * @date 11-December-2014
7 * @brief This file provides firmware functions to manage the following
8 * functionalities of the Analog to Digital Convertor (ADC)
9 * peripheral:
10 * + Initialization and de-initialization functions
11 * ++ Initialization and Configuration of ADC
12 * + Operation functions
13 * ++ Start, stop, get result of conversions of regular group,
14 * using 3 possible modes: polling, interruption or DMA.
15 * + Control functions
16 * ++ Analog Watchdog configuration
17 * ++ Channels configuration on regular group
18 * + State functions
19 * ++ ADC state machine management
20 * ++ Interrupts and flags management
21 *
22 @verbatim
23 ==============================================================================
24 ##### ADC specific features #####
25 ==============================================================================
26 [..]
27 (#) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution
28
29 (#) Interrupt generation at the end of regular conversion and in case of
30 analog watchdog or overrun events.
31
32 (#) Single and continuous conversion modes.
33
34 (#) Scan mode for automatic conversion of channel 0 to channel 'n'.
35
36 (#) Data alignment with in-built data coherency.
37
38 (#) Programmable sampling time.
39
40 (#) ADC conversion group Regular.
41
42 (#) External trigger (timer or EXTI) with configurable polarity.
43
44 (#) DMA request generation for transfer of conversions data of regular group.
45
46 (#) ADC calibration
47
48 (#) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at
49 slower speed.
50
51 (#) ADC input range: from Vref minus (connected to Vssa) to Vref plus (connected to
52 Vdda or to an external voltage reference).
53
54
55 ##### How to use this driver #####
56 ==============================================================================
57 [..]
58
59 (#) Enable the ADC interface
60 (++) As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured
61 at RCC top level: clock source and clock prescaler.
62 (++)Two possible clock sources: synchronous clock derived from APB clock
63 or asynchronous clock derived from ADC dedicated HSI RC oscillator
64 14MHz.
65 (++)Example:
66 __ADC1_CLK_ENABLE(); (mandatory)
67
68 HI14 enable or let under control of ADC: (optional)
69
70 RCC_OscInitTypeDef RCC_OscInitStructure;
71 RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI14;
72 RCC_OscInitStructure.HSI14CalibrationValue = RCC_HSI14CALIBRATION_DEFAULT;
73 RCC_OscInitStructure.HSI14State = RCC_HSI14_ADC_CONTROL;
74 RCC_OscInitStructure.PLL... (optional if used for system clock)
75 HAL_RCC_OscConfig(&RCC_OscInitStructure);
76
77 Parameter "HSI14State" must be set either:
78 - to "...HSI14State = RCC_HSI14_ADC_CONTROL" to let the ADC control
79 the HSI14 oscillator enable/disable (if not used to supply the main
80 system clock): feature used if ADC mode LowPowerAutoPowerOff is
81 enabled.
82 - to "...HSI14State = RCC_HSI14_ON" to maintain the HSI14 oscillator
83 always enabled: can be used to supply the main system clock.
84
85 (#) ADC pins configuration
86 (++) Enable the clock for the ADC GPIOs using the following function:
87 __GPIOx_CLK_ENABLE();
88 (++) Configure these ADC pins in analog mode using HAL_GPIO_Init();
89
90 (#) Configure the ADC parameters (conversion resolution, data alignment,
91 continuous mode, ...) using the HAL_ADC_Init() function.
92
93 (#) Activate the ADC peripheral using one of the start functions:
94 HAL_ADC_Start(), HAL_ADC_Start_IT(), HAL_ADC_Start_DMA().
95
96 *** Channels configuration to regular group ***
97 ================================================
98 [..]
99 (+) To configure the ADC regular group features, use
100 HAL_ADC_Init() and HAL_ADC_ConfigChannel() functions.
101 (+) To activate the continuous mode, use the HAL_ADC_Init() function.
102 (+) To read the ADC converted values, use the HAL_ADC_GetValue() function.
103
104 *** DMA for regular configuration ***
105 =============================================================
106 [..]
107 (+) To enable the DMA mode for regular group, use the
108 HAL_ADC_Start_DMA() function.
109 (+) To enable the generation of DMA requests continuously at the end of
110 the last DMA transfer, use the HAL_ADC_Init() function.
111
112 @endverbatim
113 ******************************************************************************
114 * @attention
115 *
116 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
117 *
118 * Redistribution and use in source and binary forms, with or without modification,
119 * are permitted provided that the following conditions are met:
120 * 1. Redistributions of source code must retain the above copyright notice,
121 * this list of conditions and the following disclaimer.
122 * 2. Redistributions in binary form must reproduce the above copyright notice,
123 * this list of conditions and the following disclaimer in the documentation
124 * and/or other materials provided with the distribution.
125 * 3. Neither the name of STMicroelectronics nor the names of its contributors
126 * may be used to endorse or promote products derived from this software
127 * without specific prior written permission.
128 *
129 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
130 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
131 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
132 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
133 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
134 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
135 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
136 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
137 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
138 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
139 *
140 ******************************************************************************
141 */
142
143 /* Includes ------------------------------------------------------------------*/
144 #include "stm32f0xx_hal.h"
145
146 /** @addtogroup STM32F0xx_HAL_Driver
147 * @{
148 */
149
150 /** @defgroup ADC ADC HAL module driver
151 * @brief ADC HAL module driver
152 * @{
153 */
154
155 #ifdef HAL_ADC_MODULE_ENABLED
156
157 /* Private typedef -----------------------------------------------------------*/
158 /* Private define ------------------------------------------------------------*/
159 /** @defgroup ADC_Private_Constants ADC Private Constants
160 * @{
161 */
162
163 /* Fixed timeout values for ADC calibration, enable settling time, disable */
164 /* settling time. */
165 /* Values defined to be higher than worst cases: low clock frequency, */
166 /* maximum prescaler. */
167 /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock */
168 /* prescaler 4, sampling time 7.5 ADC clock cycles, resolution 12 bits. */
169 /* Unit: ms */
170 #define ADC_ENABLE_TIMEOUT ((uint32_t) 2)
171 #define ADC_DISABLE_TIMEOUT ((uint32_t) 2)
172 #define ADC_STOP_CONVERSION_TIMEOUT ((uint32_t) 2)
173
174 /* Delay for temperature sensor stabilization time. */
175 /* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */
176 /* Delay in CPU cycles, fixed to worst case: maximum CPU frequency 48MHz to */
177 /* have the minimum number of CPU cycles to fulfill this delay. */
178 #define ADC_TEMPSENSOR_DELAY_CPU_CYCLES ((uint32_t) 480)
179
180 /* Delay for ADC stabilization time. */
181 /* Maximum delay is 1us (refer to device datasheet, parameter tSTAB). */
182 /* Delay in CPU cycles, fixed to worst case: maximum CPU frequency 48MHz to */
183 /* have the minimum number of CPU cycles to fulfill this delay. */
184 #define ADC_STAB_DELAY_CPU_CYCLES ((uint32_t)48)
185 /**
186 * @}
187 */
188
189 /* Private macro -------------------------------------------------------------*/
190 /* Private variables ---------------------------------------------------------*/
191 /* Private function prototypes -----------------------------------------------*/
192 /** @defgroup ADC_Private_Functions ADC Private Functions
193 * @{
194 */
195 static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc);
196 static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc);
197 static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc);
198 static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma);
199 static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
200 static void ADC_DMAError(DMA_HandleTypeDef *hdma);
201 /**
202 * @}
203 */
204
205 /* Exported functions ---------------------------------------------------------*/
206
207 /** @defgroup ADC_Exported_Functions ADC Exported Functions
208 * @{
209 */
210
211 /** @defgroup ADC_Exported_Functions_Group1 Initialization/de-initialization functions
212 * @brief Initialization and Configuration functions
213 *
214 @verbatim
215 ===============================================================================
216 ##### Initialization and de-initialization functions #####
217 ===============================================================================
218 [..] This section provides functions allowing to:
219 (+) Initialize and configure the ADC.
220 (+) De-initialize the ADC
221 @endverbatim
222 * @{
223 */
224
225 /**
226 * @brief Initializes the ADC peripheral and regular group according to
227 * parameters specified in structure "ADC_InitTypeDef".
228 * @note As prerequisite, ADC clock must be configured at RCC top level
229 * depending on both possible clock sources: APB clock of HSI clock.
230 * See commented example code below that can be copied and uncommented
231 * into HAL_ADC_MspInit().
232 * @note Possibility to update parameters on the fly:
233 * This function initializes the ADC MSP (HAL_ADC_MspInit()) only when
234 * coming from ADC state reset. Following calls to this function can
235 * be used to reconfigure some parameters of ADC_InitTypeDef
236 * structure on the fly, without modifying MSP configuration. If ADC
237 * MSP has to be modified again, HAL_ADC_DeInit() must be called
238 * before HAL_ADC_Init().
239 * The setting of these parameters is conditioned to ADC state.
240 * For parameters constraints, see comments of structure
241 * "ADC_InitTypeDef".
242 * @note This function configures the ADC within 2 scopes: scope of entire
243 * ADC and scope of regular group. For parameters details, see comments
244 * of structure "ADC_InitTypeDef".
245 * @param hadc: ADC handle
246 * @retval HAL status
247 */
248 HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
249 {
250 HAL_StatusTypeDef tmpHALStatus = HAL_OK;
251 uint32_t tmpCFGR1 = 0;
252
253 /* Check ADC handle */
254 if(hadc == NULL)
255 {
256 return HAL_ERROR;
257 }
258
259 /* Check the parameters */
260 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
261 assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler));
262 assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution));
263 assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
264 assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
265 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
266 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
267 assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
268 assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
269 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
270 assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
271 assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun));
272 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait));
273 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoPowerOff));
274
275 /* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured */
276 /* at RCC top level depending on both possible clock sources: */
277 /* APB clock or HSI clock. */
278 /* Refer to header of this file for more details on clock enabling procedure*/
279
280 /* Actions performed only if ADC is coming from state reset: */
281 /* - Initialization of ADC MSP */
282 /* - ADC voltage regulator enable */
283 if (hadc->State == HAL_ADC_STATE_RESET)
284 {
285 /* Init the low level hardware */
286 HAL_ADC_MspInit(hadc);
287
288 }
289
290 /* Configuration of ADC parameters if previous preliminary actions are */
291 /* correctly completed. */
292 /* and if there is no conversion on going on regular group (ADC can be */
293 /* enabled anyway, in case of call of this function to update a parameter */
294 /* on the fly). */
295 if ((hadc->State != HAL_ADC_STATE_ERROR) &&
296 (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) )
297 {
298 /* Initialize the ADC state */
299 hadc->State = HAL_ADC_STATE_BUSY;
300
301 /* Parameters update conditioned to ADC state: */
302 /* Parameters that can be updated only when ADC is disabled: */
303 /* - ADC clock mode */
304 /* - ADC clock prescaler */
305 if (__HAL_ADC_IS_ENABLED(hadc) == RESET)
306 {
307 /* Some parameters of this register are not reset, since they are set */
308 /* by other functions and must be kept in case of usage of this */
309 /* function on the fly (update of a parameter of ADC_InitTypeDef */
310 /* without needing to reconfigure all other ADC groups/channels */
311 /* parameters): */
312 /* - internal measurement paths: Vbat, temperature sensor, Vref */
313 /* (set into HAL_ADC_ConfigChannel() ) */
314
315 /* Reset configuration of ADC configuration register CFGR2: */
316 /* - ADC clock mode: CKMODE */
317 hadc->Instance->CFGR2 &= ~(ADC_CFGR2_CKMODE);
318
319 /* Configuration of ADC clock mode: clock source AHB or HSI with */
320 /* selectable prescaler */
321 hadc->Instance->CFGR2 |= hadc->Init.ClockPrescaler;
322 }
323
324 /* Configuration of ADC: */
325 /* - discontinuous mode */
326 /* - LowPowerAutoWait mode */
327 /* - LowPowerAutoPowerOff mode */
328 /* - continuous conversion mode */
329 /* - overrun */
330 /* - external trigger to start conversion */
331 /* - external trigger polarity */
332 /* - data alignment */
333 /* - resolution */
334 /* - scan direction */
335 /* - DMA continuous request */
336 hadc->Instance->CFGR1 &= ~( ADC_CFGR1_DISCEN |
337 ADC_CFGR1_AUTOFF |
338 ADC_CFGR1_AUTDLY |
339 ADC_CFGR1_CONT |
340 ADC_CFGR1_OVRMOD |
341 ADC_CFGR1_EXTSEL |
342 ADC_CFGR1_EXTEN |
343 ADC_CFGR1_ALIGN |
344 ADC_CFGR1_RES |
345 ADC_CFGR1_SCANDIR |
346 ADC_CFGR1_DMACFG );
347
348 tmpCFGR1 |= (__HAL_ADC_CFGR1_AUTOWAIT(hadc->Init.LowPowerAutoWait) |
349 __HAL_ADC_CFGR1_AUTOOFF(hadc->Init.LowPowerAutoPowerOff) |
350 __HAL_ADC_CFGR1_CONTINUOUS(hadc->Init.ContinuousConvMode) |
351 __HAL_ADC_CFGR1_OVERRUN(hadc->Init.Overrun) |
352 hadc->Init.DataAlign |
353 hadc->Init.Resolution |
354 __HAL_ADC_CFGR1_SCANDIR(hadc->Init.ScanConvMode) |
355 __HAL_ADC_CFGR1_DMACONTREQ(hadc->Init.DMAContinuousRequests) );
356
357 /* Enable discontinuous mode only if continuous mode is disabled */
358 if ((hadc->Init.DiscontinuousConvMode == ENABLE) &&
359 (hadc->Init.ContinuousConvMode == DISABLE) )
360 {
361 /* Enable discontinuous mode of regular group */
362 tmpCFGR1 |= ADC_CFGR1_DISCEN;
363 }
364
365 /* Enable external trigger if trigger selection is different of software */
366 /* start. */
367 /* @Note: This configuration keeps the hardware feature of parameter */
368 /* ExternalTrigConvEdge "trigger edge none" equivalent to */
369 /* software start. */
370 if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
371 {
372 tmpCFGR1 |= ( hadc->Init.ExternalTrigConv |
373 hadc->Init.ExternalTrigConvEdge );
374 }
375
376 /* Update ADC configuration register with previous settings */
377 hadc->Instance->CFGR1 |= tmpCFGR1;
378
379 /* Check back that ADC registers have effectively been configured to */
380 /* ensure of no potential problem of ADC core IP clocking. */
381 /* Check through register CFGR1 (excluding analog watchdog configuration: */
382 /* set into separate dedicated function). */
383 if ((hadc->Instance->CFGR1 & ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL))
384 == tmpCFGR1)
385 {
386 /* Set ADC error code to none */
387 __HAL_ADC_CLEAR_ERRORCODE(hadc);
388
389 /* Initialize the ADC state */
390 hadc->State = HAL_ADC_STATE_READY;
391 }
392 else
393 {
394 /* Update ADC state machine to error */
395 hadc->State = HAL_ADC_STATE_ERROR;
396
397 /* Set ADC error code to ADC IP internal error */
398 hadc->ErrorCode |= HAL_ADC_ERROR_INTERNAL;
399
400 tmpHALStatus = HAL_ERROR;
401 }
402
403 }
404 else
405 {
406 /* Update ADC state machine to error */
407 hadc->State = HAL_ADC_STATE_ERROR;
408
409 tmpHALStatus = HAL_ERROR;
410 }
411
412 /* Return function status */
413 return tmpHALStatus;
414 }
415
416
417 /**
418 * @brief Deinitialize the ADC peripheral registers to their default reset
419 * values, with deinitialization of the ADC MSP.
420 * @note For devices with several ADCs: reset of ADC common registers is done
421 * only if all ADCs sharing the same common group are disabled.
422 * If this is not the case, reset of these common parameters reset is
423 * bypassed without error reporting: it can be the intended behaviour in
424 * case of reset of a single ADC while the other ADCs sharing the same
425 * common group is still running.
426 * @param hadc: ADC handle
427 * @retval HAL status
428 */
429 HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
430 {
431 HAL_StatusTypeDef tmpHALStatus = HAL_OK;
432
433 /* Check ADC handle */
434 if(hadc == NULL)
435 {
436 return HAL_ERROR;
437 }
438
439 /* Check the parameters */
440 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
441
442 /* Change ADC state */
443 hadc->State = HAL_ADC_STATE_BUSY;
444
445 /* Stop potential conversion on going, on regular group */
446 tmpHALStatus = ADC_ConversionStop(hadc);
447
448 /* Disable ADC peripheral if conversions are effectively stopped */
449 if (tmpHALStatus != HAL_ERROR)
450 {
451 /* Disable the ADC peripheral */
452 tmpHALStatus = ADC_Disable(hadc);
453
454 /* Check if ADC is effectively disabled */
455 if (tmpHALStatus != HAL_ERROR)
456 {
457 /* Change ADC state */
458 hadc->State = HAL_ADC_STATE_READY;
459 }
460 }
461
462
463 /* Configuration of ADC parameters if previous preliminary actions are */
464 /* correctly completed. */
465 if (tmpHALStatus != HAL_ERROR)
466 {
467
468 /* ========== Reset ADC registers ========== */
469 /* Reset register IER */
470 __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_AWD | ADC_IT_OVR |
471 ADC_IT_EOS | ADC_IT_EOC |
472 ADC_IT_EOSMP | ADC_IT_RDY ) );
473
474 /* Reset register ISR */
475 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD | ADC_FLAG_OVR |
476 ADC_FLAG_EOS | ADC_FLAG_EOC |
477 ADC_FLAG_EOSMP | ADC_FLAG_RDY ) );
478
479 /* Reset register CR */
480 /* Bits ADC_CR_ADCAL, ADC_CR_ADSTP, ADC_CR_ADSTART are in access mode */
481 /* "read-set": no direct reset applicable. */
482
483 /* Reset register CFGR1 */
484 hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | ADC_CFGR1_DISCEN |
485 ADC_CFGR1_AUTOFF | ADC_CFGR1_WAIT | ADC_CFGR1_CONT | ADC_CFGR1_OVRMOD |
486 ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_RES |
487 ADC_CFGR1_SCANDIR | ADC_CFGR1_DMACFG | ADC_CFGR1_DMAEN );
488
489 /* Reset register CFGR2 */
490 /* @Note: Update of ADC clock mode is conditioned to ADC state disabled: */
491 /* already done above. */
492 hadc->Instance->CFGR2 &= ~ADC_CFGR2_CKMODE;
493
494 /* Reset register SMPR */
495 hadc->Instance->SMPR &= ~ADC_SMPR_SMP;
496
497 /* Reset register TR1 */
498 hadc->Instance->TR &= ~(ADC_TR_HT | ADC_TR_LT);
499
500 /* Reset register CHSELR */
501 hadc->Instance->CHSELR &= ~(ADC_CHSELR_CHSEL18 | ADC_CHSELR_CHSEL17 | ADC_CHSELR_CHSEL16 |
502 ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_CHSELR_CHSEL12 |
503 ADC_CHSELR_CHSEL11 | ADC_CHSELR_CHSEL10 | ADC_CHSELR_CHSEL9 | ADC_CHSELR_CHSEL8 |
504 ADC_CHSELR_CHSEL7 | ADC_CHSELR_CHSEL6 | ADC_CHSELR_CHSEL5 | ADC_CHSELR_CHSEL4 |
505 ADC_CHSELR_CHSEL3 | ADC_CHSELR_CHSEL2 | ADC_CHSELR_CHSEL1 | ADC_CHSELR_CHSEL0 );
506
507 /* Reset register DR */
508 /* bits in access mode read only, no direct reset applicable*/
509
510 /* Reset register CCR */
511 ADC->CCR &= ~( ADC_CCR_VBATEN |
512 ADC_CCR_TSEN |
513 ADC_CCR_VREFEN );
514
515 /* ========== Hard reset ADC peripheral ========== */
516 /* Performs a global reset of the entire ADC peripheral: ADC state is */
517 /* forced to a similar state after device power-on. */
518 /* If needed, copy-paste and uncomment the following reset code into */
519 /* function "void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)": */
520 /* */
521 /* __ADC1_FORCE_RESET() */
522 /* __ADC1_RELEASE_RESET() */
523
524 /* DeInit the low level hardware */
525 HAL_ADC_MspDeInit(hadc);
526
527 /* Set ADC error code to none */
528 __HAL_ADC_CLEAR_ERRORCODE(hadc);
529
530 /* Change ADC state */
531 hadc->State = HAL_ADC_STATE_RESET;
532 }
533
534 /* Process unlocked */
535 __HAL_UNLOCK(hadc);
536
537 /* Return function status */
538 return tmpHALStatus;
539 }
540
541
542 /**
543 * @brief Initializes the ADC MSP.
544 * @param hadc: ADC handle
545 * @retval None
546 */
547 __weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
548 {
549 /* NOTE : This function should not be modified. When the callback is needed,
550 function HAL_ADC_MspInit must be implemented in the user file.
551 */
552 }
553
554 /**
555 * @brief DeInitializes the ADC MSP.
556 * @param hadc: ADC handle
557 * @retval None
558 */
559 __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
560 {
561 /* NOTE : This function should not be modified. When the callback is needed,
562 function HAL_ADC_MspDeInit must be implemented in the user file.
563 */
564 }
565
566 /**
567 * @}
568 */
569
570 /** @defgroup ADC_Exported_Functions_Group2 IO operation functions
571 * @brief IO operation functions
572 *
573 @verbatim
574 ===============================================================================
575 ##### IO operation functions #####
576 ===============================================================================
577 [..] This section provides functions allowing to:
578 (+) Start conversion of regular group.
579 (+) Stop conversion of regular group.
580 (+) Poll for conversion complete on regular group.
581 (+) Poll for conversion event.
582 (+) Get result of regular channel conversion.
583 (+) Start conversion of regular group and enable interruptions.
584 (+) Stop conversion of regular group and disable interruptions.
585 (+) Handle ADC interrupt request
586 (+) Start conversion of regular group and enable DMA transfer.
587 (+) Stop conversion of regular group and disable ADC DMA transfer.
588 @endverbatim
589 * @{
590 */
591
592 /**
593 * @brief Enables ADC, starts conversion of regular group.
594 * Interruptions enabled in this function: None.
595 * @param hadc: ADC handle
596 * @retval HAL status
597 */
598 HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
599 {
600 HAL_StatusTypeDef tmpHALStatus = HAL_OK;
601
602 /* Check the parameters */
603 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
604
605 /* Perform ADC enable and conversion start if no conversion is on going */
606 if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
607 {
608 /* Process locked */
609 __HAL_LOCK(hadc);
610
611 /* Enable the ADC peripheral */
612 /* If low power mode AutoPowerOff is enabled, power-on/off phases are */
613 /* performed automatically by hardware. */
614 if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
615 {
616 tmpHALStatus = ADC_Enable(hadc);
617 }
618
619 /* Start conversion if ADC is effectively enabled */
620 if (tmpHALStatus != HAL_ERROR)
621 {
622 /* State machine update: Change ADC state */
623 hadc->State = HAL_ADC_STATE_BUSY_REG;
624
625 /* Set ADC error code to none */
626 __HAL_ADC_CLEAR_ERRORCODE(hadc);
627
628 /* Clear regular group conversion flag and overrun flag */
629 /* (To ensure of no unknown state from potential previous ADC */
630 /* operations) */
631 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
632
633 /* Enable conversion of regular group. */
634 /* If software start has been selected, conversion starts immediately. */
635 /* If external trigger has been selected, conversion will start at next */
636 /* trigger event. */
637 hadc->Instance->CR |= ADC_CR_ADSTART;
638 }
639
640 /* Process unlocked */
641 __HAL_UNLOCK(hadc);
642 }
643 else
644 {
645 tmpHALStatus = HAL_BUSY;
646 }
647
648 /* Return function status */
649 return tmpHALStatus;
650 }
651
652 /**
653 * @brief Stop ADC conversion of regular group, disable ADC peripheral.
654 * @param hadc: ADC handle
655 * @retval HAL status.
656 */
657 HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
658 {
659 HAL_StatusTypeDef tmpHALStatus = HAL_OK;
660
661 /* Check the parameters */
662 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
663
664 /* Process locked */
665 __HAL_LOCK(hadc);
666
667 /* 1. Stop potential conversion on going, on regular group */
668 tmpHALStatus = ADC_ConversionStop(hadc);
669
670 /* Disable ADC peripheral if conversions are effectively stopped */
671 if (tmpHALStatus != HAL_ERROR)
672 {
673 /* 2. Disable the ADC peripheral */
674 tmpHALStatus = ADC_Disable(hadc);
675
676 /* Check if ADC is effectively disabled */
677 if (tmpHALStatus != HAL_ERROR)
678 {
679 /* Change ADC state */
680 hadc->State = HAL_ADC_STATE_READY;
681 }
682 }
683
684 /* Process unlocked */
685 __HAL_UNLOCK(hadc);
686
687 /* Return function status */
688 return tmpHALStatus;
689 }
690
691 /**
692 * @brief Wait for regular group conversion to be completed.
693 * @param hadc: ADC handle
694 * @param Timeout: Timeout value in millisecond.
695 * @retval HAL status
696 */
697 HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
698 {
699 uint32_t tickstart;
700 uint32_t tmp_Flag_EOC;
701
702 /* Check the parameters */
703 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
704
705 /* If end of conversion selected to end of sequence */
706 if (hadc->Init.EOCSelection == EOC_SEQ_CONV)
707 {
708 tmp_Flag_EOC = ADC_FLAG_EOS;
709 }
710 /* If end of conversion selected to end of each conversion */
711 else /* EOC_SINGLE_CONV */
712 {
713 tmp_Flag_EOC = (ADC_FLAG_EOC | ADC_FLAG_EOS);
714 }
715
716 /* Get timeout */
717 tickstart = HAL_GetTick();
718
719 /* Wait until End of Conversion flag is raised */
720 while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC))
721 {
722 /* Check if timeout is disabled (set to infinite wait) */
723 if(Timeout != HAL_MAX_DELAY)
724 {
725 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
726 {
727 /* Update ADC state machine to timeout */
728 hadc->State = HAL_ADC_STATE_TIMEOUT;
729
730 /* Process unlocked */
731 __HAL_UNLOCK(hadc);
732
733 return HAL_ERROR;
734 }
735 }
736 }
737
738 /* Clear end of conversion flag of regular group if low power feature */
739 /* "LowPowerAutoWait " is disabled, to not interfere with this feature */
740 /* until data register is read using function HAL_ADC_GetValue(). */
741 if (hadc->Init.LowPowerAutoWait == DISABLE)
742 {
743 /* Clear regular group conversion flag */
744 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS));
745 }
746
747 /* Update state machine on conversion status if not in error state */
748 if(hadc->State != HAL_ADC_STATE_ERROR)
749 {
750 /* Change ADC state */
751 hadc->State = HAL_ADC_STATE_EOC_REG;
752 }
753
754 /* Return ADC state */
755 return HAL_OK;
756 }
757
758 /**
759 * @brief Poll for conversion event.
760 * @param hadc: ADC handle
761 * @param EventType: the ADC event type.
762 * This parameter can be one of the following values:
763 * @arg AWD_EVENT: ADC Analog watchdog event
764 * @arg OVR_EVENT: ADC Overrun event
765 * @param Timeout: Timeout value in millisecond.
766 * @retval HAL status
767 */
768 HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout)
769 {
770 uint32_t tickstart=0;
771
772 /* Check the parameters */
773 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
774 assert_param(IS_ADC_EVENT_TYPE(EventType));
775
776 tickstart = HAL_GetTick();
777
778 /* Check selected event flag */
779 while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
780 {
781 /* Check if timeout is disabled (set to infinite wait) */
782 if(Timeout != HAL_MAX_DELAY)
783 {
784 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
785 {
786 /* Update ADC state machine to timeout */
787 hadc->State = HAL_ADC_STATE_TIMEOUT;
788
789 /* Process unlocked */
790 __HAL_UNLOCK(hadc);
791
792 return HAL_ERROR;
793 }
794 }
795 }
796
797 switch(EventType)
798 {
799 /* Analog watchdog (level out of window) event */
800 case AWD_EVENT:
801 /* Change ADC state */
802 hadc->State = HAL_ADC_STATE_AWD;
803
804 /* Clear ADC analog watchdog flag */
805 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
806 break;
807
808 /* Overrun event */
809 default: /* Case OVR_EVENT */
810 /* If overrun is set to overwrite previous data, overrun event is not */
811 /* considered as an error. */
812 /* (cf ref manual "Managing conversions without using the DMA and without */
813 /* overrun ") */
814 if (hadc->Init.Overrun == OVR_DATA_PRESERVED)
815 {
816 /* Change ADC state */
817 hadc->State = HAL_ADC_STATE_ERROR;
818
819 /* Set ADC error code to overrun */
820 hadc->ErrorCode |= HAL_ADC_ERROR_OVR;
821 }
822
823 /* Clear ADC Overrun flag */
824 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
825 break;
826 }
827
828 /* Return ADC state */
829 return HAL_OK;
830 }
831
832 /**
833 * @brief Enables ADC, starts conversion of regular group with interruption.
834 * Interruptions enabled in this function:
835 * - EOC (end of conversion of regular group) or EOS (end of
836 * sequence of regular group) depending on ADC initialization
837 * parameter "EOCSelection"
838 * - overrun (if available)
839 * Each of these interruptions has its dedicated callback function.
840 * @param hadc: ADC handle
841 * @retval HAL status
842 */
843 HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
844 {
845 HAL_StatusTypeDef tmpHALStatus = HAL_OK;
846
847 /* Check the parameters */
848 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
849
850 /* Perform ADC enable and conversion start if no conversion is on going */
851 if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
852 {
853 /* Process locked */
854 __HAL_LOCK(hadc);
855
856 /* Enable the ADC peripheral */
857 /* If low power mode AutoPowerOff is enabled, power-on/off phases are */
858 /* performed automatically by hardware. */
859 if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
860 {
861 tmpHALStatus = ADC_Enable(hadc);
862 }
863
864 /* Start conversion if ADC is effectively enabled */
865 if (tmpHALStatus != HAL_ERROR)
866 {
867 /* State machine update: Change ADC state */
868 hadc->State = HAL_ADC_STATE_BUSY_REG;
869
870 /* Set ADC error code to none */
871 __HAL_ADC_CLEAR_ERRORCODE(hadc);
872
873 /* Clear regular group conversion flag and overrun flag */
874 /* (To ensure of no unknown state from potential previous ADC */
875 /* operations) */
876 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
877
878 /* Enable ADC end of conversion interrupt */
879 /* Enable ADC overrun interrupt */
880 switch(hadc->Init.EOCSelection)
881 {
882 case EOC_SEQ_CONV:
883 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
884 __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOS | ADC_IT_OVR));
885 break;
886 /* case EOC_SINGLE_CONV */
887 default:
888 __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
889 break;
890 }
891
892 /* Enable conversion of regular group. */
893 /* If software start has been selected, conversion starts immediately. */
894 /* If external trigger has been selected, conversion will start at next */
895 /* trigger event. */
896 hadc->Instance->CR |= ADC_CR_ADSTART;
897 }
898
899 /* Process unlocked */
900 __HAL_UNLOCK(hadc);
901 }
902 else
903 {
904 tmpHALStatus = HAL_BUSY;
905 }
906
907 /* Return function status */
908 return tmpHALStatus;
909 }
910
911
912 /**
913 * @brief Stop ADC conversion of regular group, disable interruption of
914 * end-of-conversion, disable ADC peripheral.
915 * @param hadc: ADC handle
916 * @retval HAL status.
917 */
918 HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
919 {
920 HAL_StatusTypeDef tmpHALStatus = HAL_OK;
921
922 /* Check the parameters */
923 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
924
925 /* Process locked */
926 __HAL_LOCK(hadc);
927
928 /* 1. Stop potential conversion on going, on regular group */
929 tmpHALStatus = ADC_ConversionStop(hadc);
930
931 /* Disable ADC peripheral if conversions are effectively stopped */
932 if (tmpHALStatus != HAL_ERROR)
933 {
934 /* Disable ADC end of conversion interrupt for regular group */
935 /* Disable ADC overrun interrupt */
936 __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
937
938 /* 2. Disable the ADC peripheral */
939 tmpHALStatus = ADC_Disable(hadc);
940
941 /* Check if ADC is effectively disabled */
942 if (tmpHALStatus != HAL_ERROR)
943 {
944 /* Change ADC state */
945 hadc->State = HAL_ADC_STATE_READY;
946 }
947 }
948
949 /* Process unlocked */
950 __HAL_UNLOCK(hadc);
951
952 /* Return function status */
953 return tmpHALStatus;
954 }
955
956 /**
957 * @brief Enables ADC, starts conversion of regular group and transfers result
958 * through DMA.
959 * Interruptions enabled in this function:
960 * - DMA transfer complete
961 * - DMA half transfer
962 * - overrun
963 * Each of these interruptions has its dedicated callback function.
964 * @param hadc: ADC handle
965 * @param pData: The destination Buffer address.
966 * @param Length: The length of data to be transferred from ADC peripheral to memory.
967 * @retval None
968 */
969 HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
970 {
971 HAL_StatusTypeDef tmpHALStatus = HAL_OK;
972
973 /* Check the parameters */
974 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
975
976 /* Perform ADC enable and conversion start if no conversion is on going */
977 if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
978 {
979 /* Process locked */
980 __HAL_LOCK(hadc);
981
982 /* Enable the ADC peripheral */
983 /* If low power mode AutoPowerOff is enabled, power-on/off phases are */
984 /* performed automatically by hardware. */
985 if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
986 {
987 tmpHALStatus = ADC_Enable(hadc);
988 }
989
990 /* Start conversion if ADC is effectively enabled */
991 if (tmpHALStatus != HAL_ERROR)
992 {
993 /* State machine update: Change ADC state */
994 hadc->State = HAL_ADC_STATE_BUSY_REG;
995
996 /* Set ADC error code to none */
997 __HAL_ADC_CLEAR_ERRORCODE(hadc);
998
999
1000 /* Set the DMA transfer complete callback */
1001 hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
1002
1003 /* Set the DMA half transfer complete callback */
1004 hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
1005
1006 /* Set the DMA error callback */
1007 hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
1008
1009
1010 /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
1011 /* start (in case of SW start): */
1012
1013 /* Clear regular group conversion flag and overrun flag */
1014 /* (To ensure of no unknown state from potential previous ADC */
1015 /* operations) */
1016 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
1017
1018 /* Enable ADC overrun interrupt */
1019 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
1020
1021 /* Enable ADC DMA mode */
1022 hadc->Instance->CFGR1 |= ADC_CFGR1_DMAEN;
1023
1024 /* Start the DMA channel */
1025 HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
1026
1027 /* Enable conversion of regular group. */
1028 /* If software start has been selected, conversion starts immediately. */
1029 /* If external trigger has been selected, conversion will start at next */
1030 /* trigger event. */
1031 hadc->Instance->CR |= ADC_CR_ADSTART;
1032 }
1033
1034 /* Process unlocked */
1035 __HAL_UNLOCK(hadc);
1036 }
1037 else
1038 {
1039 tmpHALStatus = HAL_BUSY;
1040 }
1041
1042 /* Return function status */
1043 return tmpHALStatus;
1044 }
1045
1046 /**
1047 * @brief Stop ADC conversion of regular group, disable ADC DMA transfer, disable
1048 * ADC peripheral.
1049 * Each of these interruptions has its dedicated callback function.
1050 * @param hadc: ADC handle
1051 * @retval HAL status.
1052 */
1053 HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
1054 {
1055 HAL_StatusTypeDef tmpHALStatus = HAL_OK;
1056
1057 /* Check the parameters */
1058 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1059
1060 /* Process locked */
1061 __HAL_LOCK(hadc);
1062
1063 /* 1. Stop potential conversion on going, on regular group */
1064 tmpHALStatus = ADC_ConversionStop(hadc);
1065
1066 /* Disable ADC peripheral if conversions are effectively stopped */
1067 if (tmpHALStatus != HAL_ERROR)
1068 {
1069 /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */
1070 hadc->Instance->CFGR1 &= ~ADC_CFGR1_DMAEN;
1071
1072 /* Disable the DMA channel (in case of DMA in circular mode or stop while */
1073 /* while DMA transfer is on going) */
1074 tmpHALStatus = HAL_DMA_Abort(hadc->DMA_Handle);
1075
1076 /* Check if DMA channel effectively disabled */
1077 if (tmpHALStatus != HAL_OK)
1078 {
1079 /* Update ADC state machine to error */
1080 hadc->State = HAL_ADC_STATE_ERROR;
1081 }
1082
1083 /* Disable ADC overrun interrupt */
1084 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
1085
1086 /* 2. Disable the ADC peripheral */
1087 /* Update "tmpHALStatus" only if DMA channel disabling passed, to keep in */
1088 /* memory a potential failing status. */
1089 if (tmpHALStatus == HAL_OK)
1090 {
1091 tmpHALStatus = ADC_Disable(hadc);
1092 }
1093 else
1094 {
1095 ADC_Disable(hadc);
1096 }
1097
1098 /* Check if ADC is effectively disabled */
1099 if (tmpHALStatus == HAL_OK)
1100 {
1101 /* Change ADC state */
1102 hadc->State = HAL_ADC_STATE_READY;
1103 }
1104
1105 }
1106
1107 /* Process unlocked */
1108 __HAL_UNLOCK(hadc);
1109
1110 /* Return function status */
1111 return tmpHALStatus;
1112 }
1113
1114 /**
1115 * @brief Get ADC regular group conversion result.
1116 * @note Reading DR register automatically clears EOC (end of conversion of
1117 * regular group) flag.
1118 * Additionally, this functions clears EOS (end of sequence of
1119 * regular group) flag, in case of the end of the sequence is reached.
1120 * @param hadc: ADC handle
1121 * @retval Converted value
1122 */
1123 uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
1124 {
1125 /* Check the parameters */
1126 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1127
1128 /* @Note: EOC flag is not cleared here by software because automatically */
1129 /* cleared by hardware when reading register DR. */
1130
1131 /* Clear regular group end of sequence flag */
1132 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOS);
1133
1134 /* Return ADC converted value */
1135 return hadc->Instance->DR;
1136 }
1137
1138 /**
1139 * @brief DMA transfer complete callback.
1140 * @param hdma: pointer to DMA handle.
1141 * @retval None
1142 */
1143 static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
1144 {
1145 /* Retrieve ADC handle corresponding to current DMA handle */
1146 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1147
1148 /* Update state machine on conversion status if not in error state */
1149 if(hadc->State != HAL_ADC_STATE_ERROR)
1150 {
1151 /* Change ADC state */
1152 hadc->State = HAL_ADC_STATE_EOC_REG;
1153 }
1154
1155 /* Conversion complete callback */
1156 HAL_ADC_ConvCpltCallback(hadc);
1157 }
1158
1159 /**
1160 * @brief DMA half transfer complete callback.
1161 * @param hdma: pointer to DMA handle.
1162 * @retval None
1163 */
1164 static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
1165 {
1166 /* Retrieve ADC handle corresponding to current DMA handle */
1167 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1168
1169 /* Half conversion callback */
1170 HAL_ADC_ConvHalfCpltCallback(hadc);
1171 }
1172
1173 /**
1174 * @brief DMA error callback
1175 * @param hdma: pointer to DMA handle.
1176 * @retval None
1177 */
1178 static void ADC_DMAError(DMA_HandleTypeDef *hdma)
1179 {
1180 /* Retrieve ADC handle corresponding to current DMA handle */
1181 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1182
1183 /* Change ADC state */
1184 hadc->State = HAL_ADC_STATE_ERROR;
1185
1186 /* Set ADC error code to DMA error */
1187 hadc->ErrorCode |= HAL_ADC_ERROR_DMA;
1188
1189 /* Error callback */
1190 HAL_ADC_ErrorCallback(hadc);
1191 }
1192
1193 /**
1194 * @brief Handles ADC interrupt request.
1195 * @param hadc: ADC handle
1196 * @retval None
1197 */
1198 void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
1199 {
1200 /* Check the parameters */
1201 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1202 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
1203 assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
1204
1205 /* ========== Check End of Conversion flag for regular group ========== */
1206 if( (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC)) ||
1207 (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS)) )
1208 {
1209 /* Update state machine on conversion status if not in error state */
1210 if(hadc->State != HAL_ADC_STATE_ERROR)
1211 {
1212 /* Change ADC state */
1213 hadc->State = HAL_ADC_STATE_EOC_REG;
1214 }
1215
1216 /* Disable interruption if no further conversion upcoming by regular */
1217 /* external trigger or by continuous mode, */
1218 /* and if scan sequence if completed. */
1219 if(__HAL_ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
1220 (hadc->Init.ContinuousConvMode == DISABLE) )
1221 {
1222 /* If End of Sequence is reached, disable interrupts */
1223 if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) )
1224 {
1225 /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
1226 /* ADSTART==0 (no conversion on going) */
1227 if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
1228 {
1229 /* Disable ADC end of sequence conversion interrupt */
1230 /* @Note: Overrun interrupt was enabled with EOC interrupt in */
1231 /* HAL_Start_IT(), but is not disabled here because can be used */
1232 /* by overrun IRQ process below. */
1233 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS);
1234 }
1235 else
1236 {
1237 /* Change ADC state to error state */
1238 hadc->State = HAL_ADC_STATE_ERROR;
1239
1240 /* Set ADC error code to ADC IP internal error */
1241 hadc->ErrorCode |= HAL_ADC_ERROR_INTERNAL;
1242 }
1243 }
1244 }
1245
1246 /* Conversion complete callback */
1247 /* @Note: into callback, to determine if conversion has been triggered */
1248 /* from EOC or EOS, possibility to use: */
1249 /* " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOS)) " */
1250 HAL_ADC_ConvCpltCallback(hadc);
1251
1252
1253 /* Clear regular group conversion flag */
1254 /* @Note: in case of overrun set to OVR_DATA_PRESERVED, end of conversion */
1255 /* flags clear induces the release of the preserved data. */
1256 /* Therefore, if the preserved data value is needed, it must be */
1257 /* read preliminarily into HAL_ADC_ConvCpltCallback(). */
1258 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS) );
1259 }
1260
1261 /* ========== Check Analog watchdog flags ========== */
1262 if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD))
1263 {
1264 /* Change ADC state */
1265 hadc->State = HAL_ADC_STATE_AWD;
1266
1267 /* Level out of window callback */
1268 HAL_ADC_LevelOutOfWindowCallback(hadc);
1269
1270 /* Clear ADC Analog watchdog flag */
1271 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
1272
1273 }
1274
1275
1276 /* ========== Check Overrun flag ========== */
1277 if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR))
1278 {
1279 /* If overrun is set to overwrite previous data (default setting), */
1280 /* overrun event is not considered as an error. */
1281 /* (cf ref manual "Managing conversions without using the DMA and without */
1282 /* overrun ") */
1283 /* Exception for usage with DMA overrun event always considered as an */
1284 /* error. */
1285 if ((hadc->Init.Overrun == OVR_DATA_PRESERVED) ||
1286 HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) )
1287 {
1288 /* Change ADC state to error state */
1289 hadc->State = HAL_ADC_STATE_ERROR;
1290
1291 /* Set ADC error code to overrun */
1292 hadc->ErrorCode |= HAL_ADC_ERROR_OVR;
1293
1294 /* Error callback */
1295 HAL_ADC_ErrorCallback(hadc);
1296 }
1297
1298 /* Clear the Overrun flag */
1299 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
1300 }
1301
1302 }
1303
1304
1305 /**
1306 * @brief Conversion complete callback in non blocking mode
1307 * @param hadc: ADC handle
1308 * @retval None
1309 */
1310 __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
1311 {
1312 /* NOTE : This function should not be modified. When the callback is needed,
1313 function HAL_ADC_ConvCpltCallback must be implemented in the user file.
1314 */
1315 }
1316
1317 /**
1318 * @brief Conversion DMA half-transfer callback in non blocking mode
1319 * @param hadc: ADC handle
1320 * @retval None
1321 */
1322 __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
1323 {
1324 /* NOTE : This function should not be modified. When the callback is needed,
1325 function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
1326 */
1327 }
1328
1329 /**
1330 * @brief Analog watchdog callback in non blocking mode.
1331 * @param hadc: ADC handle
1332 * @retval None
1333 */
1334 __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
1335 {
1336 /* NOTE : This function should not be modified. When the callback is needed,
1337 function HAL_ADC_LevelOoutOfWindowCallback must be implemented in the user file.
1338 */
1339 }
1340
1341 /**
1342 * @brief ADC error callback in non blocking mode
1343 * (ADC conversion with interruption or transfer by DMA)
1344 * @param hadc: ADC handle
1345 * @retval None
1346 */
1347 __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
1348 {
1349 /* NOTE : This function should not be modified. When the callback is needed,
1350 function HAL_ADC_ErrorCallback must be implemented in the user file.
1351 */
1352 }
1353
1354
1355 /**
1356 * @}
1357 */
1358
1359 /** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions
1360 * @brief Peripheral Control functions
1361 *
1362 @verbatim
1363 ===============================================================================
1364 ##### Peripheral Control functions #####
1365 ===============================================================================
1366 [..] This section provides functions allowing to:
1367 (+) Configure channels on regular group
1368 (+) Configure the analog watchdog
1369
1370 @endverbatim
1371 * @{
1372 */
1373
1374 /**
1375 * @brief Configures the the selected channel to be linked to the regular
1376 * group.
1377 * @note In case of usage of internal measurement channels:
1378 * VrefInt/Vbat/TempSensor.
1379 * Sampling time constraints must be respected (sampling time can be
1380 * adjusted in function of ADC clock frequency and sampling time
1381 * setting).
1382 * Refer to device datasheet for timings values, parameters TS_vrefint,
1383 * TS_vbat, TS_temp (values rough order: 5us to 17us).
1384 * These internal paths can be be disabled using function
1385 * HAL_ADC_DeInit().
1386 * @note Possibility to update parameters on the fly:
1387 * This function initializes channel into regular group, following
1388 * calls to this function can be used to reconfigure some parameters
1389 * of structure "ADC_ChannelConfTypeDef" on the fly, without reseting
1390 * the ADC.
1391 * The setting of these parameters is conditioned to ADC state.
1392 * For parameters constraints, see comments of structure
1393 * "ADC_ChannelConfTypeDef".
1394 * @param hadc: ADC handle
1395 * @param sConfig: Structure of ADC channel for regular group.
1396 * @retval HAL status
1397 */
1398 HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
1399 {
1400 HAL_StatusTypeDef tmpHALStatus = HAL_OK;
1401 __IO uint32_t wait_loop_index = 0;
1402
1403 /* Check the parameters */
1404 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1405 assert_param(IS_ADC_CHANNEL(sConfig->Channel));
1406 assert_param(IS_ADC_RANK(sConfig->Rank));
1407 assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
1408
1409 /* Process locked */
1410 __HAL_LOCK(hadc);
1411
1412 /* Parameters update conditioned to ADC state: */
1413 /* Parameters that can be updated when ADC is disabled or enabled without */
1414 /* conversion on going on regular group: */
1415 /* - Channel number */
1416 /* - Channel sampling time */
1417 /* - Management of internal measurement channels: Vbat/VrefInt/TempSensor */
1418 if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
1419 {
1420 /* Configure channel: depending on rank setting, add it or remove it from */
1421 /* ADC conversion sequencer. */
1422 if (sConfig->Rank != ADC_RANK_NONE)
1423 {
1424 /* Regular sequence configuration */
1425 /* Set the channel selection register from the selected channel */
1426 hadc->Instance->CHSELR |= __HAL_ADC_CHSELR_CHANNEL(sConfig->Channel);
1427
1428 /* Channel sampling time configuration */
1429 /* Modify sampling time if needed (not needed in case of reoccurrence */
1430 /* for several channels programmed consecutively into the sequencer) */
1431 if (sConfig->SamplingTime != __HAL_ADC_GET_SAMPLINGTIME(hadc))
1432 {
1433 /* Channel sampling time configuration */
1434 /* Clear the old sample time */
1435 hadc->Instance->SMPR &= ~(ADC_SMPR_SMP);
1436
1437 /* Set the new sample time */
1438 hadc->Instance->SMPR |= (sConfig->SamplingTime);
1439 }
1440
1441 /* Management of internal measurement channels: Vbat/VrefInt/TempSensor */
1442 /* internal measurement paths enable: If internal channel selected, */
1443 /* enable dedicated internal buffers and path. */
1444 /* @Note: these internal measurement paths can be disabled using */
1445 /* HAL_ADC_DeInit() or removing the channel from sequencer with */
1446 /* channel configuration parameter "Rank". */
1447
1448 /* If Channel_16 is selected, enable Temp. sensor measurement path. */
1449 if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
1450 {
1451 ADC->CCR |= ADC_CCR_TSEN;
1452
1453 /* Delay for temperature sensor stabilization time */
1454 while(wait_loop_index < ADC_TEMPSENSOR_DELAY_CPU_CYCLES)
1455 {
1456 wait_loop_index++;
1457 }
1458 }
1459 /* If Channel_17 is selected, enable VBAT measurement path. */
1460 else if (sConfig->Channel == ADC_CHANNEL_VBAT)
1461 {
1462 ADC->CCR |= ADC_CCR_VBATEN;
1463 }
1464 /* If Channel_18 is selected, enable VREFINT measurement path. */
1465 else if (sConfig->Channel == ADC_CHANNEL_VREFINT)
1466 {
1467 ADC->CCR |= ADC_CCR_VREFEN;
1468 }
1469
1470 }
1471 else
1472 {
1473 /* Regular sequence configuration */
1474 /* Reset the channel selection register from the selected channel */
1475 hadc->Instance->CHSELR &= ~__HAL_ADC_CHSELR_CHANNEL(sConfig->Channel);
1476
1477 /* Management of internal measurement channels: Vbat/VrefInt/TempSensor */
1478 /* internal measurement paths disable: If internal channel selected, */
1479 /* disable dedicated internal buffers and path. */
1480
1481 /* If Channel_16 is selected, disable Temp. sensor measurement path. */
1482 if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
1483 {
1484 ADC->CCR &= ~ADC_CCR_TSEN;
1485 }
1486 /* If Channel_17 is selected, disable VBAT measurement path. */
1487 else if (sConfig->Channel == ADC_CHANNEL_VBAT)
1488 {
1489 ADC->CCR &= ~ADC_CCR_VBATEN;
1490 }
1491 /* If Channel_18 is selected, disable VREFINT measurement path. */
1492 else if (sConfig->Channel == ADC_CHANNEL_VREFINT)
1493 {
1494 ADC->CCR &= ~ADC_CCR_VREFEN;
1495 }
1496 }
1497
1498 }
1499
1500
1501 /* If a conversion is on going on regular group, no update on regular */
1502 /* channel could be done on neither of the channel configuration structure */
1503 /* parameters. */
1504 else
1505 {
1506 /* Update ADC state machine to error */
1507 hadc->State = HAL_ADC_STATE_ERROR;
1508
1509 tmpHALStatus = HAL_ERROR;
1510 }
1511
1512 /* Process unlocked */
1513 __HAL_UNLOCK(hadc);
1514
1515 /* Return function status */
1516 return tmpHALStatus;
1517 }
1518
1519
1520 /**
1521 * @brief Configures the analog watchdog.
1522 * @note Possibility to update parameters on the fly:
1523 * This function initializes the selected analog watchdog, following
1524 * calls to this function can be used to reconfigure some parameters
1525 * of structure "ADC_AnalogWDGConfTypeDef" on the fly, without reseting
1526 * the ADC.
1527 * The setting of these parameters is conditioned to ADC state.
1528 * For parameters constraints, see comments of structure
1529 * "ADC_AnalogWDGConfTypeDef".
1530 * @param hadc: ADC handle
1531 * @param AnalogWDGConfig: Structure of ADC analog watchdog configuration
1532 * @retval HAL status
1533 */
1534 HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
1535 {
1536 HAL_StatusTypeDef tmpHALStatus = HAL_OK;
1537
1538 uint32_t tmpAWDHighThresholdShifted;
1539 uint32_t tmpAWDLowThresholdShifted;
1540
1541 /* Check the parameters */
1542 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1543 assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
1544
1545 /* Verify if threshold is within the selected ADC resolution */
1546 assert_param(IS_ADC_RANGE(__HAL_ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->HighThreshold));
1547 assert_param(IS_ADC_RANGE(__HAL_ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold));
1548
1549 if(AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG)
1550 {
1551 assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
1552 }
1553
1554 /* Process locked */
1555 __HAL_LOCK(hadc);
1556
1557 /* Parameters update conditioned to ADC state: */
1558 /* Parameters that can be updated when ADC is disabled or enabled without */
1559 /* conversion on going on regular group: */
1560 /* - Analog watchdog channels */
1561 /* - Analog watchdog thresholds */
1562 if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
1563 {
1564 /* Configuration of analog watchdog: */
1565 /* - Set the analog watchdog enable mode: one or overall group of */
1566 /* channels. */
1567 /* - Set the Analog watchdog channel (is not used if watchdog */
1568 /* mode "all channels": ADC_CFGR_AWD1SGL=0). */
1569 hadc->Instance->CFGR1 &= ~( ADC_CFGR1_AWDSGL |
1570 ADC_CFGR1_AWDEN |
1571 ADC_CFGR1_AWDCH );
1572
1573 hadc->Instance->CFGR1 |= ( AnalogWDGConfig->WatchdogMode |
1574 __HAL_ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) );
1575
1576 /* Shift the offset in function of the selected ADC resolution: Thresholds*/
1577 /* have to be left-aligned on bit 11, the LSB (right bits) are set to 0 */
1578 tmpAWDHighThresholdShifted = __HAL_ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThreshold);
1579 tmpAWDLowThresholdShifted = __HAL_ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThreshold);
1580
1581 /* Set the high and low thresholds */
1582 hadc->Instance->TR &= ~(ADC_TR_HT | ADC_TR_LT);
1583 hadc->Instance->TR |= ( __HAL_ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) |
1584 tmpAWDLowThresholdShifted );
1585
1586 /* Clear the ADC Analog watchdog flag (in case of left enabled by */
1587 /* previous ADC operations) to be ready to use for HAL_ADC_IRQHandler() */
1588 /* or HAL_ADC_PollForEvent(). */
1589 __HAL_ADC_CLEAR_FLAG(hadc, ADC_IT_AWD);
1590
1591 /* Configure ADC Analog watchdog interrupt */
1592 if(AnalogWDGConfig->ITMode == ENABLE)
1593 {
1594 /* Enable the ADC Analog watchdog interrupt */
1595 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD);
1596 }
1597 else
1598 {
1599 /* Disable the ADC Analog watchdog interrupt */
1600 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD);
1601 }
1602
1603 }
1604 /* If a conversion is on going on regular group, no update could be done */
1605 /* on neither of the AWD configuration structure parameters. */
1606 else
1607 {
1608 /* Update ADC state machine to error */
1609 hadc->State = HAL_ADC_STATE_ERROR;
1610
1611 tmpHALStatus = HAL_ERROR;
1612 }
1613
1614
1615 /* Process unlocked */
1616 __HAL_UNLOCK(hadc);
1617
1618 /* Return function status */
1619 return tmpHALStatus;
1620 }
1621
1622
1623 /**
1624 * @}
1625 */
1626
1627
1628 /** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions
1629 * @brief Peripheral State functions
1630 *
1631 @verbatim
1632 ===============================================================================
1633 ##### Peripheral State and Errors functions #####
1634 ===============================================================================
1635 [..]
1636 This subsection provides functions to get in run-time the status of the
1637 peripheral.
1638 (+) Check the ADC state
1639 (+) Check the ADC error code
1640
1641 @endverbatim
1642 * @{
1643 */
1644
1645 /**
1646 * @brief return the ADC state
1647 * @param hadc: ADC handle
1648 * @retval HAL state
1649 */
1650 HAL_ADC_StateTypeDef HAL_ADC_GetState(ADC_HandleTypeDef* hadc)
1651 {
1652 /* Check the parameters */
1653 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1654
1655 /* Return ADC state */
1656 return hadc->State;
1657 }
1658
1659 /**
1660 * @brief Return the ADC error code
1661 * @param hadc: ADC handle
1662 * @retval ADC Error Code
1663 */
1664 uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc)
1665 {
1666 return hadc->ErrorCode;
1667 }
1668
1669 /**
1670 * @}
1671 */
1672
1673 /**
1674 * @}
1675 */
1676
1677 /** @defgroup ADC_Private_Functions ADC Private Functions
1678 * @{
1679 */
1680
1681 /**
1682 * @brief Enable the selected ADC.
1683 * @note Prerequisite condition to use this function: ADC must be disabled
1684 * and voltage regulator must be enabled (done into HAL_ADC_Init()).
1685 * @param hadc: ADC handle
1686 * @retval HAL status.
1687 */
1688 static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
1689 {
1690 uint32_t tickstart = 0;
1691 __IO uint32_t wait_loop_index = 0;
1692
1693 /* ADC enable and wait for ADC ready (in case of ADC is disabled or */
1694 /* enabling phase not yet completed: flag ADC ready not yet set). */
1695 /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */
1696 /* causes: ADC clock not running, ...). */
1697 if (__HAL_ADC_IS_ENABLED(hadc) == RESET)
1698 {
1699 /* Check if conditions to enable the ADC are fulfilled */
1700 if (__HAL_ADC_ENABLING_CONDITIONS(hadc) == RESET)
1701 {
1702 /* Update ADC state machine to error */
1703 hadc->State = HAL_ADC_STATE_ERROR;
1704
1705 /* Set ADC error code to ADC IP internal error */
1706 hadc->ErrorCode |= HAL_ADC_ERROR_INTERNAL;
1707
1708 return HAL_ERROR;
1709 }
1710
1711 /* Enable the ADC peripheral */
1712 __HAL_ADC_ENABLE(hadc);
1713
1714 /* Delay for ADC stabilization time. */
1715 /* Delay fixed to worst case: maximum CPU frequency */
1716 while(wait_loop_index < ADC_STAB_DELAY_CPU_CYCLES)
1717 {
1718 wait_loop_index++;
1719 }
1720
1721 /* Get timeout */
1722 tickstart = HAL_GetTick();
1723
1724 /* Wait for ADC effectively enabled */
1725 while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET)
1726 {
1727 if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
1728 {
1729 /* Update ADC state machine to error */
1730 hadc->State = HAL_ADC_STATE_ERROR;
1731
1732 /* Set ADC error code to ADC IP internal error */
1733 hadc->ErrorCode |= HAL_ADC_ERROR_INTERNAL;
1734
1735 return HAL_ERROR;
1736 }
1737 }
1738
1739 }
1740
1741 /* Return HAL status */
1742 return HAL_OK;
1743 }
1744
1745 /**
1746 * @brief Disable the selected ADC.
1747 * @note Prerequisite condition to use this function: ADC conversions must be
1748 * stopped.
1749 * @param hadc: ADC handle
1750 * @retval HAL status.
1751 */
1752 static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc)
1753 {
1754 uint32_t tickstart = 0;
1755
1756 /* Verification if ADC is not already disabled: */
1757 /* @Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */
1758 /* disabled. */
1759 if (__HAL_ADC_IS_ENABLED(hadc) != RESET )
1760 {
1761 /* Check if conditions to disable the ADC are fulfilled */
1762 if (__HAL_ADC_DISABLING_CONDITIONS(hadc) != RESET)
1763 {
1764 /* Disable the ADC peripheral */
1765 __HAL_ADC_DISABLE(hadc);
1766 }
1767 else
1768 {
1769 /* Update ADC state machine to error */
1770 hadc->State = HAL_ADC_STATE_ERROR;
1771
1772 /* Set ADC error code to ADC IP internal error */
1773 hadc->ErrorCode |= HAL_ADC_ERROR_INTERNAL;
1774
1775 return HAL_ERROR;
1776 }
1777
1778 /* Wait for ADC effectively disabled */
1779 tickstart = HAL_GetTick();
1780
1781 while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN))
1782 {
1783 if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
1784 {
1785 /* Update ADC state machine to error */
1786 hadc->State = HAL_ADC_STATE_ERROR;
1787
1788 /* Set ADC error code to ADC IP internal error */
1789 hadc->ErrorCode |= HAL_ADC_ERROR_INTERNAL;
1790
1791 return HAL_ERROR;
1792 }
1793 }
1794 }
1795
1796 /* Return HAL status */
1797 return HAL_OK;
1798 }
1799
1800
1801 /**
1802 * @brief Stop ADC conversion.
1803 * @note Prerequisite condition to use this function: ADC conversions must be
1804 * stopped to disable the ADC.
1805 * @param hadc: ADC handle
1806 * @retval HAL status.
1807 */
1808 static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc)
1809 {
1810 uint32_t tickstart = 0;
1811
1812 /* Check the parameters */
1813 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1814
1815 /* Verification if ADC is not already stopped on regular group to bypass */
1816 /* this function if not needed. */
1817 if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc))
1818 {
1819
1820 /* Stop potential conversion on going on regular group */
1821 /* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */
1822 if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) &&
1823 HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) )
1824 {
1825 /* Stop conversions on regular group */
1826 hadc->Instance->CR |= ADC_CR_ADSTP;
1827 }
1828
1829 /* Wait for conversion effectively stopped */
1830 tickstart = HAL_GetTick();
1831
1832 while((hadc->Instance->CR & ADC_CR_ADSTART) != RESET)
1833 {
1834 if((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
1835 {
1836 /* Update ADC state machine to error */
1837 hadc->State = HAL_ADC_STATE_ERROR;
1838
1839 /* Set ADC error code to ADC IP internal error */
1840 hadc->ErrorCode |= HAL_ADC_ERROR_INTERNAL;
1841
1842 return HAL_ERROR;
1843 }
1844 }
1845
1846 }
1847
1848 /* Return HAL status */
1849 return HAL_OK;
1850 }
1851
1852 /**
1853 * @}
1854 */
1855
1856 #endif /* HAL_ADC_MODULE_ENABLED */
1857 /**
1858 * @}
1859 */
1860
1861 /**
1862 * @}
1863 */
1864
1865 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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