tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_pwr.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f0xx_hal_pwr.c
   4   * @author  MCD Application Team
   5   * @version V1.2.0
   6   * @date    11-December-2014
   7   * @brief   PWR HAL module driver.
   8   *          This file provides firmware functions to manage the following
   9   *          functionalities of the Power Controller (PWR) peripheral:
  10   *           + Initialization/de-initialization function
  11   *           + Peripheral Control function
  12   *
  13   @verbatim
  14   ******************************************************************************
  15   * @attention
  16   *
  17   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  18   *
  19   * Redistribution and use in source and binary forms, with or without modification,
  20   * are permitted provided that the following conditions are met:
  21   *   1. Redistributions of source code must retain the above copyright notice,
  22   *      this list of conditions and the following disclaimer.
  23   *   2. Redistributions in binary form must reproduce the above copyright notice,
  24   *      this list of conditions and the following disclaimer in the documentation
  25   *      and/or other materials provided with the distribution.
  26   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  27   *      may be used to endorse or promote products derived from this software
  28   *      without specific prior written permission.
  29   *
  30   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  31   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  32   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  33   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  34   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  35   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  36   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  37   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  38   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  39   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40   *
  41   ******************************************************************************
  42   */
  43
  44 /* Includes ------------------------------------------------------------------*/
  45 #include "stm32f0xx_hal.h"
  46
  47 /** @addtogroup STM32F0xx_HAL_Driver
  48   * @{
  49   */
  50
  51 /** @defgroup PWR PWR HAL module Driver
  52   * @brief PWR HAL module driver
  53   * @{
  54   */
  55
  56 #ifdef HAL_PWR_MODULE_ENABLED
  57
  58 /* Private typedef -----------------------------------------------------------*/
  59 /* Private define ------------------------------------------------------------*/
  60 /* Private macro -------------------------------------------------------------*/
  61 /* Private variables ---------------------------------------------------------*/
  62 /* Private function prototypes -----------------------------------------------*/
  63 /* Private functions ---------------------------------------------------------*/
  64
  65 /** @defgroup PWR_Exported_Functions PWR Exported Functions
  66   * @{
  67   */
  68
  69 /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
  70   *  @brief    Initialization and de-initialization functions
  71   *
  72 @verbatim
  73  ===============================================================================
  74               ##### Initialization and de-initialization functions #####
  75  ===============================================================================
  76     [..]
  77       After reset, the backup domain (RTC registers, RTC backup data
  78       registers) is protected against possible unwanted
  79       write accesses.
  80       To enable access to the RTC Domain and RTC registers, proceed as follows:
  81         (+) Enable the Power Controller (PWR) APB1 interface clock using the
  82             __PWR_CLK_ENABLE() macro.
  83         (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
  84
  85 @endverbatim
  86   * @{
  87   */
  88
  89 /**
  90   * @brief Deinitializes the PWR peripheral registers to their default reset values.
  91   * @retval None
  92   */
  93 void HAL_PWR_DeInit(void)
  94 {
  95   __PWR_FORCE_RESET();
  96   __PWR_RELEASE_RESET();
  97 }
  98
  99 /**
 100   * @brief Enables access to the backup domain (RTC registers, RTC
 101   *         backup data registers).
 102   * @note  If the HSE divided by 32 is used as the RTC clock, the
 103   *         Backup Domain Access should be kept enabled.
 104   * @retval None
 105   */
 106 void HAL_PWR_EnableBkUpAccess(void)
 107 {
 108   PWR->CR |= (uint32_t)PWR_CR_DBP;
 109 }
 110
 111 /**
 112   * @brief Disables access to the backup domain (RTC registers, RTC
 113   *         backup data registers).
 114   * @note  If the HSE divided by 32 is used as the RTC clock, the
 115   *         Backup Domain Access should be kept enabled.
 116   * @retval None
 117   */
 118 void HAL_PWR_DisableBkUpAccess(void)
 119 {
 120   PWR->CR &= ~((uint32_t)PWR_CR_DBP);
 121 }
 122
 123 /**
 124   * @}
 125   */
 126
 127 /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions
 128   *  @brief Low Power modes configuration functions
 129   *
 130 @verbatim
 131
 132  ===============================================================================
 133                  ##### Peripheral Control functions #####
 134  ===============================================================================
 135
 136     *** WakeUp pin configuration ***
 137     ================================
 138     [..]
 139       (+) WakeUp pin is used to wakeup the system from Standby mode. This pin is
 140           forced in input pull down configuration and is active on rising edges.
 141       (+) There are two WakeUp pins, and up to eight Wakeup pins on STM32F07x & STM32F09x devices.
 142          (++)WakeUp Pin 1 on PA.00.
 143          (++)WakeUp Pin 2 on PC.13.
 144          (++)WakeUp Pin 3 on PE.06.(STM32F07x/STM32F09x)
 145          (++)WakeUp Pin 4 on PA.02.(STM32F07x/STM32F09x)
 146          (++)WakeUp Pin 5 on PC.05.(STM32F07x/STM32F09x)
 147          (++)WakeUp Pin 6 on PB.05.(STM32F07x/STM32F09x)
 148          (++)WakeUp Pin 7 on PB.15.(STM32F07x/STM32F09x)
 149          (++)WakeUp Pin 8 on PF.02.(STM32F07x/STM32F09x)
 150
 151     *** Low Power modes configuration ***
 152     =====================================
 153     [..]
 154       The devices feature 3 low-power modes:
 155       (+) Sleep mode: Cortex-M0 core stopped, peripherals kept running.
 156       (+) Stop mode: all clocks are stopped, regulator running, regulator
 157           in low power mode
 158       (+) Standby mode: 1.2V domain powered off (mode not available on STM32F0x8 devices).
 159
 160    *** Sleep mode ***
 161    ==================
 162     [..]
 163       (+) Entry:
 164           The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFx)
 165               functions with
 166           (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
 167           (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
 168
 169       (+) Exit:
 170         (++) Any peripheral interrupt acknowledged by the nested vectored interrupt
 171               controller (NVIC) can wake up the device from Sleep mode.
 172
 173    *** Stop mode ***
 174    =================
 175     [..]
 176       In Stop mode, all clocks in the 1.8V domain are stopped, the PLL, the HSI,
 177       and the HSE RC oscillators are disabled. Internal SRAM and register contents
 178       are preserved.
 179       The voltage regulator can be configured either in normal or low-power mode.
 180       To minimize the consumption.
 181
 182       (+) Entry:
 183           The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON, PWR_STOPENTRY_WFI )
 184              function with:
 185           (++) Main regulator ON.
 186           (++) Low Power regulator ON.
 187           (++) PWR_STOPENTRY_WFI: enter STOP mode with WFI instruction
 188           (++) PWR_STOPENTRY_WFE: enter STOP mode with WFE instruction
 189       (+) Exit:
 190           (++) Any EXTI Line (Internal or External) configured in Interrupt/Event mode.
 191           (++) Some specific communication peripherals (CEC, USART, I2C) interrupts,
 192                when programmed in wakeup mode (the peripheral must be
 193                programmed in wakeup mode and the corresponding interrupt vector
 194                must be enabled in the NVIC)
 195
 196    *** Standby mode ***
 197    ====================
 198      [..]
 199       The Standby mode allows to achieve the lowest power consumption. It is based
 200       on the Cortex-M0 deep sleep mode, with the voltage regulator disabled.
 201       The 1.8V domain is consequently powered off. The PLL, the HSI oscillator and
 202       the HSE oscillator are also switched off. SRAM and register contents are lost
 203       except for the RTC registers, RTC backup registers and Standby circuitry.
 204       The voltage regulator is OFF.
 205
 206       (+) Entry:
 207           (++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function.
 208       (+) Exit:
 209           (++) WKUP pin rising edge, RTC alarm (Alarm A), RTC wakeup,
 210                tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
 211
 212    *** Auto-wakeup (AWU) from low-power mode ***
 213    =============================================
 214     [..]
 215       The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
 216       Wakeup event, a tamper event, a time-stamp event, or a comparator event,
 217       without depending on an external interrupt (Auto-wakeup mode).
 218
 219     (+) RTC auto-wakeup (AWU) from the Stop and Standby modes
 220
 221       (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to
 222             configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function.
 223
 224       (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
 225            is necessary to configure the RTC to detect the tamper or time stamp event using the
 226            HAL_RTC_SetTimeStamp_IT() or HAL_RTC_SetTamper_IT() functions.
 227
 228       (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to
 229            configure the RTC to generate the RTC WakeUp event using the HAL_RTC_SetWakeUpTimer_IT() function.
 230
 231     (+) Comparator auto-wakeup (AWU) from the Stop mode
 232
 233       (++) To wake up from the Stop mode with a comparator wakeup event, it is necessary to:
 234            (+++) Configure the EXTI Line associated with the comparator (example EXTI Line 22 for comparator 2)
 235                  to be sensitive to to the selected edges (falling, rising or falling
 236                  and rising) (Interrupt or Event modes) using the EXTI_Init() function.
 237            (+++) Configure the comparator to generate the event.
 238 @endverbatim
 239   * @{
 240   */
 241
 242 /**
 243   * @brief Enables the WakeUp PINx functionality.
 244   * @param WakeUpPinx: Specifies the Power Wake-Up pin to enable.
 245   *         This parameter can be value of :
 246   *           @ref PWREx_WakeUp_Pins
 247   * @retval None
 248   */
 249 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)
 250 {
 251   /* Check the parameters */
 252   assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
 253   PWR->CSR |= (PWR_CSR_EWUP1 << (uint8_t)WakeUpPinx);
 254 }
 255
 256 /**
 257   * @brief Disables the WakeUp PINx functionality.
 258   * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable.
 259   *         This parameter can be values of :
 260   *           @ref PWREx_WakeUp_Pins
 261   * @retval None
 262   */
 263 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
 264 {
 265   /* Check the parameters */
 266   assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
 267   PWR->CSR &= ~(PWR_CSR_EWUP1 << (uint8_t)WakeUpPinx);
 268 }
 269
 270 /**
 271   * @brief Enters Sleep mode.
 272   * @note  In Sleep mode, all I/O pins keep the same state as in Run mode.
 273   * @param Regulator: Specifies the regulator state in SLEEP mode.
 274   *           On STM32F0 devices, this parameter is a dummy value and it is ignored
 275   *           as regulator can't be modified in this mode. Parameter is kept for platform
 276   *           compatibility.
 277   * @param SLEEPEntry: Specifies if SLEEP mode is entered with WFI or WFE instruction.
 278   *           When WFI entry is used, tick interrupt have to be disabled if not desired as
 279   *           the interrupt wake up source.
 280   *           This parameter can be one of the following values:
 281   *            @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
 282   *            @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
 283   * @retval None
 284   */
 285 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
 286 {
 287   /* Check the parameters */
 288   assert_param(IS_PWR_REGULATOR(Regulator));
 289   assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
 290
 291   /* Clear SLEEPDEEP bit of Cortex System Control Register */
 292   SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
 293
 294   /* Select SLEEP mode entry -------------------------------------------------*/
 295   if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
 296   {
 297     /* Request Wait For Interrupt */
 298     __WFI();
 299   }
 300   else
 301   {
 302     /* Request Wait For Event */
 303     __SEV();
 304     __WFE();
 305     __WFE();
 306   }
 307 }
 308
 309 /**
 310   * @brief Enters STOP mode.
 311   * @note  In Stop mode, all I/O pins keep the same state as in Run mode.
 312   * @note  When exiting Stop mode by issuing an interrupt or a wakeup event,
 313   *         the HSI RC oscillator is selected as system clock.
 314   * @note  When the voltage regulator operates in low power mode, an additional
 315   *         startup delay is incurred when waking up from Stop mode.
 316   *         By keeping the internal regulator ON during Stop mode, the consumption
 317   *         is higher although the startup time is reduced.
 318   * @param Regulator: Specifies the regulator state in STOP mode.
 319   *          This parameter can be one of the following values:
 320   *            @arg PWR_MAINREGULATOR_ON: STOP mode with regulator ON
 321   *            @arg PWR_LOWPOWERREGULATOR_ON: STOP mode with low power regulator ON
 322   * @param STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction.
 323   *          This parameter can be one of the following values:
 324   *            @arg PWR_STOPENTRY_WFI:Enter STOP mode with WFI instruction
 325   *            @arg PWR_STOPENTRY_WFE: Enter STOP mode with WFE instruction
 326   * @retval None
 327   */
 328 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
 329 {
 330   uint32_t tmpreg = 0;
 331
 332   /* Check the parameters */
 333   assert_param(IS_PWR_REGULATOR(Regulator));
 334   assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
 335
 336   /* Select the regulator state in STOP mode ---------------------------------*/
 337   tmpreg = PWR->CR;
 338
 339   /* Clear PDDS and LPDS bits */
 340   tmpreg &= (uint32_t)~(PWR_CR_PDDS | PWR_CR_LPDS);
 341
 342   /* Set LPDS bit according to Regulator value */
 343   tmpreg |= Regulator;
 344
 345   /* Store the new value */
 346   PWR->CR = tmpreg;
 347
 348   /* Set SLEEPDEEP bit of Cortex System Control Register */
 349   SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
 350
 351   /* Select STOP mode entry --------------------------------------------------*/
 352   if(STOPEntry == PWR_STOPENTRY_WFI)
 353   {
 354     /* Request Wait For Interrupt */
 355     __WFI();
 356   }
 357   else
 358   {
 359     /* Request Wait For Event */
 360     __SEV();
 361     __WFE();
 362     __WFE();
 363   }
 364
 365   /* Reset SLEEPDEEP bit of Cortex System Control Register */
 366   SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
 367 }
 368
 369 /**
 370   * @brief Enters STANDBY mode.
 371   * @note  In Standby mode, all I/O pins are high impedance except for:
 372   *          - Reset pad (still available)
 373   *          - RTC alternate function pins if configured for tamper, time-stamp, RTC
 374   *            Alarm out, or RTC clock calibration out.
 375   *          - WKUP pins if enabled.
 376   *            STM32F0x8 devices, the Stop mode is available, but it is
 377   *            aningless to distinguish between voltage regulator in Low power
 378   *            mode and voltage regulator in Run mode because the regulator
 379   *            not used and the core is supplied directly from an external source.
 380   *            Consequently, the Standby mode is not available on those devices.
 381   * @retval None
 382   */
 383 void HAL_PWR_EnterSTANDBYMode(void)
 384 {
 385   /* Select STANDBY mode */
 386   PWR->CR |= (uint32_t)PWR_CR_PDDS;
 387
 388   /* Set SLEEPDEEP bit of Cortex System Control Register */
 389   SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
 390
 391   /* This option is used to ensure that store operations are completed */
 392 #if defined ( __CC_ARM)
 393   __force_stores();
 394 #endif
 395   /* Request Wait For Interrupt */
 396   __WFI();
 397 }
 398
 399 /**
 400   * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode.
 401   * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor
 402   *       re-enters SLEEP mode when an interruption handling is over.
 403   *       Setting this bit is useful when the processor is expected to run only on
 404   *       interruptions handling.
 405   * @retval None
 406   */
 407 void HAL_PWR_EnableSleepOnExit(void)
 408 {
 409   /* Set SLEEPONEXIT bit of Cortex System Control Register */
 410   SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
 411 }
 412
 413
 414 /**
 415   * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode.
 416   * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor
 417   *       re-enters SLEEP mode when an interruption handling is over.
 418   * @retval None
 419   */
 420 void HAL_PWR_DisableSleepOnExit(void)
 421 {
 422   /* Clear SLEEPONEXIT bit of Cortex System Control Register */
 423   CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
 424 }
 425
 426
 427
 428 /**
 429   * @brief Enables CORTEX M4 SEVONPEND bit.
 430   * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes
 431   *       WFE to wake up when an interrupt moves from inactive to pended.
 432   * @retval None
 433   */
 434 void HAL_PWR_EnableSEVOnPend(void)
 435 {
 436   /* Set SEVONPEND bit of Cortex System Control Register */
 437   SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
 438 }
 439
 440
 441 /**
 442   * @brief Disables CORTEX M4 SEVONPEND bit.
 443   * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes
 444   *       WFE to wake up when an interrupt moves from inactive to pended.
 445   * @retval None
 446   */
 447 void HAL_PWR_DisableSEVOnPend(void)
 448 {
 449   /* Clear SEVONPEND bit of Cortex System Control Register */
 450   CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
 451 }
 452
 453 /**
 454   * @}
 455   */
 456
 457 /**
 458   * @}
 459   */
 460
 461 #endif /* HAL_PWR_MODULE_ENABLED */
 462 /**
 463   * @}
 464   */
 465
 466 /**
 467   * @}
 468   */
 469
 470 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/