tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal_adc_ex.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f1xx_hal_adc_ex.h
   4   * @author  MCD Application Team
   5   * @version V1.0.0
   6   * @date    15-December-2014
   7   * @brief   Header file of ADC HAL extension module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
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  16   *      this list of conditions and the following disclaimer.
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  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32F1xx_HAL_ADC_EX_H
  40 #define __STM32F1xx_HAL_ADC_EX_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 /* Includes ------------------------------------------------------------------*/
  47 #include "stm32f1xx_hal_def.h"
  48
  49 /** @addtogroup STM32F1xx_HAL_Driver
  50   * @{
  51   */
  52
  53 /** @addtogroup ADCEx
  54   * @{
  55   */
  56
  57 /* Exported types ------------------------------------------------------------*/
  58 /** @defgroup ADCEx_Exported_Types ADCEx Exported Types
  59   * @{
  60   */
  61
  62 /**
  63   * @brief  ADC Configuration injected Channel structure definition
  64   * @note   Parameters of this structure are shared within 2 scopes:
  65   *          - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset
  66   *          - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode,
  67   *            AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv.
  68   * @note   The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state.
  69   *         ADC state can be either:
  70   *          - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'ExternalTrigInjecConv')
  71   *          - For all except parameters 'ExternalTrigInjecConv': ADC enabled without conversion on going on injected group.
  72   */
  73 typedef struct
  74 {
  75   uint32_t InjectedChannel;               /*!< Selection of ADC channel to configure
  76                                                This parameter can be a value of @ref ADC_channels
  77                                                Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability.
  78                                                Note: On STM32F1 devices with several ADC: Only ADC1 can access internal measurement channels (VrefInt/TempSensor)
  79                                                Note: On STM32F10xx8 and STM32F10xxB devices: A low-amplitude voltage glitch may be generated (on ADC input 0) on the PA0 pin, when the ADC is converting with injection trigger.
  80                                                      It is advised to distribute the analog channels so that Channel 0 is configured as an injected channel.
  81                                                      Refer to errata sheet of these devices for more details. */
  82   uint32_t InjectedRank;                  /*!< Rank in the injected group sequencer
  83                                                This parameter must be a value of @ref ADCEx_injected_rank
  84                                                Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */
  85   uint32_t InjectedSamplingTime;          /*!< Sampling time value to be set for the selected channel.
  86                                                Unit: ADC clock cycles
  87                                                Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits).
  88                                                This parameter can be a value of @ref ADC_sampling_times
  89                                                Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
  90                                                         If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
  91                                                Note: In case of usage of internal measurement channels (VrefInt/TempSensor),
  92                                                      sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
  93                                                      Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 5us to 17.1us min). */
  94   uint32_t InjectedOffset;                /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only).
  95                                                Offset value must be a positive number.
  96                                                Depending of ADC resolution selected (12, 10, 8 or 6 bits),
  97                                                this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
  98   uint32_t InjectedNbrOfConversion;       /*!< Specifies the number of ranks that will be converted within the injected group sequencer.
  99                                                To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
 100                                                This parameter must be a number between Min_Data = 1 and Max_Data = 4.
 101                                                Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
 102                                                         configure a channel on injected group can impact the configuration of other channels previously set. */
 103   uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
 104                                                Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
 105                                                Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
 106                                                This parameter can be set to ENABLE or DISABLE.
 107                                                Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one.
 108                                                Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
 109                                                         configure a channel on injected group can impact the configuration of other channels previously set. */
 110   uint32_t AutoInjectedConv;              /*!< Enables or disables the selected ADC automatic injected group conversion after regular one
 111                                                This parameter can be set to ENABLE or DISABLE.
 112                                                Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE)
 113                                                Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START)
 114                                                Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete.
 115                                                      To maintain JAUTO always enabled, DMA must be configured in circular mode.
 116                                                Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
 117                                                         configure a channel on injected group can impact the configuration of other channels previously set. */
 118   uint32_t ExternalTrigInjecConv;         /*!< Selects the external event used to trigger the conversion start of injected group.
 119                                                If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled.
 120                                                If set to external trigger source, triggering is on event rising edge.
 121                                                This parameter can be a value of @ref ADCEx_External_trigger_source_Injected
 122                                                Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
 123                                                      If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly)
 124                                                Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
 125                                                         configure a channel on injected group can impact the configuration of other channels previously set. */
 126 }ADC_InjectionConfTypeDef;
 127
 128 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
 129 /**
 130   * @brief  Structure definition of ADC multimode
 131   * @note   The setting of these parameters with function HAL_ADCEx_MultiModeConfigChannel() is conditioned to ADCs state (both ADCs of the common group).
 132   *         State of ADCs of the common group must be: disabled.
 133   */
 134 typedef struct
 135 {
 136   uint32_t Mode;              /*!< Configures the ADC to operate in independent or multi mode.
 137                                    This parameter can be a value of @ref ADCEx_Common_mode
 138                                    Note: In dual mode, a change of channel configuration generates a restart that can produce a loss of synchronization. It is recommended to disable dual mode before any configuration change.
 139                                    Note: In case of simultaneous mode used: Exactly the same sampling time should be configured for the 2 channels that will be sampled simultaneously by ACD1 and ADC2.
 140                                    Note: In case of interleaved mode used: To avoid overlap between conversions, maximum sampling time allowed is 7 ADC clock cycles for fast interleaved mode and 14 ADC clock cycles for slow interleaved mode.
 141                                    Note: Some multimode parameters are fixed on STM32F1 and can be configured on other STM32 devices with several ADC (multimode configuration structure can have additional parameters).
 142                                          The equivalences are:
 143                                            - Parameter 'DMAAccessMode': On STM32F1, this parameter is fixed to 1 DMA channel (one DMA channel for both ADC, DMA of ADC master). On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_DMAACCESSMODE_12_10_BITS'.
 144                                            - Parameter 'TwoSamplingDelay': On STM32F1, this parameter is fixed to 7 or 14 ADC clock cycles depending on fast or slow interleaved mode selected. On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_TWOSAMPLINGDELAY_7CYCLES' (for fast interleaved mode). */
 145
 146
 147 }ADC_MultiModeTypeDef;
 148 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
 149
 150 /**
 151   * @}
 152   */
 153
 154
 155 /* Exported constants --------------------------------------------------------*/
 156
 157 /** @defgroup ADCEx_Exported_Constants ADCEx Exported Constants
 158   * @{
 159   */
 160
 161 /** @defgroup ADCEx_injected_rank ADCEx rank into injected group
 162   * @{
 163   */
 164 #define ADC_INJECTED_RANK_1    ((uint32_t)0x00000001)
 165 #define ADC_INJECTED_RANK_2    ((uint32_t)0x00000002)
 166 #define ADC_INJECTED_RANK_3    ((uint32_t)0x00000003)
 167 #define ADC_INJECTED_RANK_4    ((uint32_t)0x00000004)
 168 /**
 169   * @}
 170   */
 171
 172 /** @defgroup ADCEx_External_trigger_edge_Injected ADCEx external trigger enable for injected group
 173   * @{
 174   */
 175 #define ADC_EXTERNALTRIGINJECCONV_EDGE_NONE           ((uint32_t)0x00000000)
 176 #define ADC_EXTERNALTRIGINJECCONV_EDGE_RISING         ((uint32_t)ADC_CR2_JEXTTRIG)
 177 /**
 178   * @}
 179   */
 180
 181 /** @defgroup ADC_External_trigger_source_Regular ADC External trigger selection for regular group
 182   * @{
 183   */
 184 /*!< List of external triggers with generic trigger name, independently of    */
 185 /* ADC target, sorted by trigger name:                                        */
 186
 187 /*!< External triggers of regular group for ADC1&ADC2 only */
 188 #define ADC_EXTERNALTRIGCONV_T1_CC1         ADC1_2_EXTERNALTRIG_T1_CC1
 189 #define ADC_EXTERNALTRIGCONV_T1_CC2         ADC1_2_EXTERNALTRIG_T1_CC2
 190 #define ADC_EXTERNALTRIGCONV_T2_CC2         ADC1_2_EXTERNALTRIG_T2_CC2
 191 #define ADC_EXTERNALTRIGCONV_T3_TRGO        ADC1_2_EXTERNALTRIG_T3_TRGO
 192 #define ADC_EXTERNALTRIGCONV_T4_CC4         ADC1_2_EXTERNALTRIG_T4_CC4
 193 #define ADC_EXTERNALTRIGCONV_EXT_IT11       ADC1_2_EXTERNALTRIG_EXT_IT11
 194
 195 #if defined (STM32F103xE) || defined (STM32F103xG)
 196 /*!< External triggers of regular group for ADC3 only */
 197 #define ADC_EXTERNALTRIGCONV_T2_CC3         ADC3_EXTERNALTRIG_T2_CC3
 198 #define ADC_EXTERNALTRIGCONV_T3_CC1         ADC3_EXTERNALTRIG_T3_CC1
 199 #define ADC_EXTERNALTRIGCONV_T5_CC1         ADC3_EXTERNALTRIG_T5_CC1
 200 #define ADC_EXTERNALTRIGCONV_T5_CC3         ADC3_EXTERNALTRIG_T5_CC3
 201 #define ADC_EXTERNALTRIGCONV_T8_CC1         ADC3_EXTERNALTRIG_T8_CC1
 202 #endif /* STM32F103xE || defined STM32F103xG */
 203
 204 /*!< External triggers of regular group for all ADC instances */
 205 #define ADC_EXTERNALTRIGCONV_T1_CC3         ADC1_2_3_EXTERNALTRIG_T1_CC3
 206
 207 #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
 208 /*!< Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and   */
 209 /*         XL-density devices.                                                */
 210 /*         To use it on ADC or ADC2, a rempap of trigger must be done from    */
 211 /*         EXTI line 11 to TIM8_TRGO with macro:                              */
 212 /*           __HAL_AFIO_REMAP_ADC1_ETRGREG_ENABLE()                           */
 213 /*           __HAL_AFIO_REMAP_ADC2_ETRGREG_ENABLE()                           */
 214
 215 /* Note for internal constant value management: If TIM8_TRGO is available,    */
 216 /* its definition is set to value for ADC1&ADC2 by default and changed to     */
 217 /* value for ADC3 by HAL ADC driver if ADC3 is selected.                      */
 218 #define ADC_EXTERNALTRIGCONV_T8_TRGO        ADC1_2_EXTERNALTRIG_T8_TRGO
 219 #endif /* STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
 220
 221 #define ADC_SOFTWARE_START                  ADC1_2_3_SWSTART
 222 /**
 223   * @}
 224   */
 225
 226 /** @defgroup ADCEx_External_trigger_source_Injected ADCEx External trigger selection for injected group
 227   * @{
 228   */
 229 /*!< List of external triggers with generic trigger name, independently of    */
 230 /* ADC target, sorted by trigger name:                                        */
 231
 232 /*!< External triggers of injected group for ADC1&ADC2 only */
 233 #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO        ADC1_2_EXTERNALTRIGINJEC_T2_TRGO
 234 #define ADC_EXTERNALTRIGINJECCONV_T2_CC1         ADC1_2_EXTERNALTRIGINJEC_T2_CC1
 235 #define ADC_EXTERNALTRIGINJECCONV_T3_CC4         ADC1_2_EXTERNALTRIGINJEC_T3_CC4
 236 #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO        ADC1_2_EXTERNALTRIGINJEC_T4_TRGO
 237 #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15       ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
 238
 239 #if defined (STM32F103xE) || defined (STM32F103xG)
 240 /*!< External triggers of injected group for ADC3 only */
 241 #define ADC_EXTERNALTRIGINJECCONV_T4_CC3         ADC3_EXTERNALTRIGINJEC_T4_CC3
 242 #define ADC_EXTERNALTRIGINJECCONV_T8_CC2         ADC3_EXTERNALTRIGINJEC_T8_CC2
 243 #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO        ADC3_EXTERNALTRIGINJEC_T5_TRGO
 244 #define ADC_EXTERNALTRIGINJECCONV_T5_CC4         ADC3_EXTERNALTRIGINJEC_T5_CC4
 245 #endif /* STM32F103xE || defined STM32F103xG */
 246
 247 /*!< External triggers of injected group for all ADC instances */
 248 #define ADC_EXTERNALTRIGINJECCONV_T1_CC4         ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4
 249 #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO        ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO
 250
 251 #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
 252 /*!< Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and    */
 253 /*         XL-density devices.                                                */
 254 /*         To use it on ADC or ADC2, a rempap of trigger must be done from    */
 255 /*         EXTI line 11 to TIM8_TRGO with macro:                              */
 256 /*           __HAL_AFIO_REMAP_ADC1_ETRGINJ_ENABLE()                           */
 257 /*           __HAL_AFIO_REMAP_ADC2_ETRGINJ_ENABLE()                           */
 258
 259 /* Note for internal constant value management: If TIM8_CC4 is available,     */
 260 /* its definition is set to value for ADC1&ADC2 by default and changed to     */
 261 /* value for ADC3 by HAL ADC driver if ADC3 is selected.                      */
 262 #define ADC_EXTERNALTRIGINJECCONV_T8_CC4         ADC1_2_EXTERNALTRIGINJEC_T8_CC4
 263 #endif /* STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
 264
 265 #define ADC_INJECTED_SOFTWARE_START              ADC1_2_3_JSWSTART
 266 /**
 267   * @}
 268   */
 269
 270 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
 271 /** @defgroup ADCEx_Common_mode ADC Extended Dual ADC Mode
 272   * @{
 273   */
 274 #define ADC_MODE_INDEPENDENT                  ((uint32_t)(0x00000000)) /*!< ADC dual mode disabled (ADC independent mode) */
 275 #define ADC_DUALMODE_REGSIMULT_INJECSIMULT    ((uint32_t)(                                                            ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined regular simultaneous + injected simultaneous mode */
 276 #define ADC_DUALMODE_REGSIMULT_ALTERTRIG      ((uint32_t)(                                        ADC_CR1_DUALMOD_1                    )) /*!< ADC dual mode enabled: Combined regular simultaneous + alternate trigger mode */
 277 #define ADC_DUALMODE_INJECSIMULT_INTERLFAST   ((uint32_t)(                                        ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined injected simultaneous + fast interleaved mode (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
 278 #define ADC_DUALMODE_INJECSIMULT_INTERLSLOW   ((uint32_t)(                    ADC_CR1_DUALMOD_2                                        )) /*!< ADC dual mode enabled: Combined injected simultaneous + slow Interleaved mode (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
 279 #define ADC_DUALMODE_INJECSIMULT              ((uint32_t)(                    ADC_CR1_DUALMOD_2 |                     ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Injected simultaneous mode only */
 280 #define ADC_DUALMODE_REGSIMULT                ((uint32_t)(                    ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1                    )) /*!< ADC dual mode enabled: Regular simultaneous mode only */
 281 #define ADC_DUALMODE_INTERLFAST               ((uint32_t)(                    ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Fast interleaved mode only (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
 282 #define ADC_DUALMODE_INTERLSLOW               ((uint32_t)(ADC_CR1_DUALMOD_3                                                            )) /*!< ADC dual mode enabled: Slow interleaved mode only (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
 283 #define ADC_DUALMODE_ALTERTRIG                ((uint32_t)(ADC_CR1_DUALMOD_3 |                                         ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Alternate trigger mode only */
 284 /**
 285   * @}
 286   */
 287 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
 288
 289 /**
 290   * @}
 291   */
 292
 293
 294 /* Private constants ---------------------------------------------------------*/
 295
 296 /** @addtogroup ADCEx_Private_Constants ADCEx Private Constants
 297   * @{
 298   */
 299
 300 /** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Regular ADC Extended Internal HAL driver trigger selection for regular group
 301   * @{
 302   */
 303 /* List of external triggers of regular group for ADC1, ADC2, ADC3 (if ADC    */
 304 /* instance is availble on the selected device).                              */
 305 /* (used internally by HAL driver. To not use into HAL structure parameters)  */
 306
 307 /* External triggers of regular group for ADC1&ADC2 (if ADCx available) */
 308 #define ADC1_2_EXTERNALTRIG_T1_CC1           ((uint32_t) 0x00000000)
 309 #define ADC1_2_EXTERNALTRIG_T1_CC2           ((uint32_t)(                                      ADC_CR2_EXTSEL_0))
 310 #define ADC1_2_EXTERNALTRIG_T2_CC2           ((uint32_t)(                   ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
 311 #define ADC1_2_EXTERNALTRIG_T3_TRGO          ((uint32_t)(ADC_CR2_EXTSEL_2                                      ))
 312 #define ADC1_2_EXTERNALTRIG_T4_CC4           ((uint32_t)(ADC_CR2_EXTSEL_2 |                    ADC_CR2_EXTSEL_0))
 313 #define ADC1_2_EXTERNALTRIG_EXT_IT11         ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1                   ))
 314 #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG)
 315 /* Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and     */
 316 /* XL-density devices.                                                        */
 317 #define ADC1_2_EXTERNALTRIG_T8_TRGO          ADC1_2_EXTERNALTRIG_EXT_IT11
 318 #endif
 319
 320 #if defined (STM32F103xE) || defined (STM32F103xG)
 321 /* External triggers of regular group for ADC3 */
 322 #define ADC3_EXTERNALTRIG_T3_CC1             ADC1_2_EXTERNALTRIG_T1_CC1
 323 #define ADC3_EXTERNALTRIG_T2_CC3             ADC1_2_EXTERNALTRIG_T1_CC2
 324 #define ADC3_EXTERNALTRIG_T8_CC1             ADC1_2_EXTERNALTRIG_T2_CC2
 325 #define ADC3_EXTERNALTRIG_T8_TRGO            ADC1_2_EXTERNALTRIG_T3_TRGO
 326 #define ADC3_EXTERNALTRIG_T5_CC1             ADC1_2_EXTERNALTRIG_T4_CC4
 327 #define ADC3_EXTERNALTRIG_T5_CC3             ADC1_2_EXTERNALTRIG_EXT_IT11
 328 #endif
 329
 330 /* External triggers of regular group for ADC1&ADC2&ADC3 (if ADCx available) */
 331 #define ADC1_2_3_EXTERNALTRIG_T1_CC3         ((uint32_t)(                   ADC_CR2_EXTSEL_1                   ))
 332 #define ADC1_2_3_SWSTART                     ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
 333 /**
 334   * @}
 335   */
 336
 337 /** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Injected ADC Extended Internal HAL driver trigger selection for injected group
 338   * @{
 339   */
 340 /* List of external triggers of injected group for ADC1, ADC2, ADC3 (if ADC    */
 341 /* instance is availble on the selected device).                              */
 342 /* (used internally by HAL driver. To not use into HAL structure parameters)  */
 343
 344 /* External triggers of injected group for ADC1&ADC2 (if ADCx available) */
 345 #define ADC1_2_EXTERNALTRIGINJEC_T2_TRGO          ((uint32_t)(                    ADC_CR2_JEXTSEL_1                    ))
 346 #define ADC1_2_EXTERNALTRIGINJEC_T2_CC1           ((uint32_t)(                    ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
 347 #define ADC1_2_EXTERNALTRIGINJEC_T3_CC4           ((uint32_t)(ADC_CR2_JEXTSEL_2                                        ))
 348 #define ADC1_2_EXTERNALTRIGINJEC_T4_TRGO          ((uint32_t)(ADC_CR2_JEXTSEL_2 |                     ADC_CR2_JEXTSEL_0))
 349 #define ADC1_2_EXTERNALTRIGINJEC_EXT_IT15         ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1                    ))
 350 #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG)
 351 /* Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and      */
 352 /* XL-density devices.                                                        */
 353 #define ADC1_2_EXTERNALTRIGINJEC_T8_CC4           ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
 354 #endif
 355
 356 #if defined (STM32F103xE) || defined (STM32F103xG)
 357 /* External triggers of injected group for ADC3 */
 358 #define ADC3_EXTERNALTRIGINJEC_T4_CC3             ADC1_2_EXTERNALTRIGINJEC_T2_TRGO
 359 #define ADC3_EXTERNALTRIGINJEC_T8_CC2             ADC1_2_EXTERNALTRIGINJEC_T2_CC1
 360 #define ADC3_EXTERNALTRIGINJEC_T8_CC4             ADC1_2_EXTERNALTRIGINJEC_T3_CC4
 361 #define ADC3_EXTERNALTRIGINJEC_T5_TRGO            ADC1_2_EXTERNALTRIGINJEC_T4_TRGO
 362 #define ADC3_EXTERNALTRIGINJEC_T5_CC4             ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
 363 #endif /* STM32F103xE || defined STM32F103xG */
 364
 365 /* External triggers of injected group for ADC1&ADC2&ADC3 (if ADCx available) */
 366 #define ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO        ((uint32_t) 0x00000000)
 367 #define ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4         ((uint32_t)(                                        ADC_CR2_JEXTSEL_0))
 368 #define ADC1_2_3_JSWSTART                         ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
 369 /**
 370   * @}
 371   */
 372
 373 /**
 374   * @}
 375   */
 376
 377
 378 /* Exported macro ------------------------------------------------------------*/
 379
 380 /* Private macro -------------------------------------------------------------*/
 381
 382 /** @defgroup ADCEx_Private_Macro ADCEx Private Macro
 383   * @{
 384   */
 385 /* Macro reserved for internal HAL driver usage, not intended to be used in   */
 386 /* code of final user.                                                        */
 387
 388
 389 /**
 390   * @brief For devices with 3 ADCs: Defines the external trigger source
 391   *        for regular group according to ADC into common group ADC1&ADC2 or
 392   *        ADC3 (some triggers with same source have different value to
 393   *        be programmed into ADC EXTSEL bits of CR2 register).
 394   *        For devices with 2 ADCs or less: this macro makes no change.
 395   * @param __HANDLE__: ADC handle
 396   * @param __EXT_TRIG_CONV__: External trigger selected for regular group.
 397   * @retval External trigger to be programmed into EXTSEL bits of CR2 register
 398   */
 399 #if defined (STM32F103xE) || defined (STM32F103xG)
 400 #define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__)                         \
 401  (( (((__HANDLE__)->Instance) == ADC3)                                         \
 402   )?                                                                           \
 403    ( ( (__EXT_TRIG_CONV__) == ADC_EXTERNALTRIGCONV_T8_TRGO                     \
 404      )?                                                                        \
 405       (ADC3_EXTERNALTRIG_T8_TRGO)                                              \
 406       :                                                                        \
 407       (__EXT_TRIG_CONV__)                                                      \
 408    )                                                                           \
 409    :                                                                           \
 410    (__EXT_TRIG_CONV__)                                                         \
 411  )
 412 #else
 413 #define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__)                         \
 414   (__EXT_TRIG_CONV__)
 415 #endif /* STM32F103xE || STM32F103xG */
 416
 417 /**
 418   * @brief For devices with 3 ADCs: Defines the external trigger source
 419   *        for injected group according to ADC into common group ADC1&ADC2 or
 420   *        ADC3 (some triggers with same source have different value to
 421   *        be programmed into ADC JEXTSEL bits of CR2 register).
 422   *        For devices with 2 ADCs or less: this macro makes no change.
 423   * @param __HANDLE__: ADC handle
 424   * @param __EXT_TRIG_INJECTCONV__: External trigger selected for injected group.
 425   * @retval External trigger to be programmed into JEXTSEL bits of CR2 register
 426   */
 427 #if defined (STM32F103xE) || defined (STM32F103xG)
 428 #define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__)                  \
 429  (( (((__HANDLE__)->Instance) == ADC3)                                         \
 430   )?                                                                           \
 431    ( ( (__EXT_TRIG_INJECTCONV__) == ADC_EXTERNALTRIGINJECCONV_T8_CC4           \
 432      )?                                                                        \
 433       (ADC3_EXTERNALTRIGINJEC_T8_CC4)                                          \
 434       :                                                                        \
 435       (__EXT_TRIG_INJECTCONV__)                                                \
 436    )                                                                           \
 437    :                                                                           \
 438    (__EXT_TRIG_INJECTCONV__)                                                   \
 439  )
 440 #else
 441 #define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__)                  \
 442    (__EXT_TRIG_INJECTCONV__)
 443 #endif /* STM32F103xE || STM32F103xG */
 444
 445
 446 /**
 447   * @brief Verification if multimode is enabled for the selected ADC (multimode ADC master or ADC slave) (applicable for devices with several ADCs)
 448   * @param __HANDLE__: ADC handle
 449   * @retval Multimode state: RESET if multimode is disabled, other value if multimode is enabled
 450   */
 451 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
 452 #define ADC_MULTIMODE_IS_ENABLE(__HANDLE__)                                    \
 453  (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2)   \
 454   )?                                                                           \
 455    (ADC1->CR1 & ADC_CR1_DUALMOD)                                               \
 456    :                                                                           \
 457    (RESET)                                                                     \
 458  )
 459 #else
 460 #define ADC_MULTIMODE_IS_ENABLE(__HANDLE__)                                    \
 461   (RESET)
 462 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
 463
 464 /**
 465   * @brief Verification of condition for ADC start conversion: ADC must be in non-multimode, or multimode with handle of ADC master (applicable for devices with several ADCs)
 466   * @param __HANDLE__: ADC handle
 467   * @retval None
 468   */
 469 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
 470 #define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__)                        \
 471  (( (((__HANDLE__)->Instance) == ADC2)                                         \
 472   )?                                                                           \
 473    ((ADC1->CR1 & ADC_CR1_DUALMOD) == RESET)                                    \
 474    :                                                                           \
 475    (!RESET)                                                                    \
 476  )
 477 #else
 478 #define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__)                        \
 479   (!RESET)
 480 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
 481
 482 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
 483 /**
 484   * @brief Set handle of the other ADC sharing the common multimode settings
 485   * @param __HANDLE__: ADC handle
 486   * @param __HANDLE_OTHER_ADC__: other ADC handle
 487   * @retval None
 488   */
 489 #define ADC_COMMON_ADC_OTHER(__HANDLE__, __HANDLE_OTHER_ADC__)                 \
 490   ((__HANDLE_OTHER_ADC__)->Instance = ADC2)
 491
 492 /**
 493   * @brief Set handle of the ADC slave associated to the ADC master
 494   * On STM32F1 devices, ADC slave is always ADC2 (this can be different
 495   * on other STM32 devices)
 496   * @param __HANDLE_MASTER__: ADC master handle
 497   * @param __HANDLE_SLAVE__: ADC slave handle
 498   * @retval None
 499   */
 500 #define ADC_MULTI_SLAVE(__HANDLE_MASTER__, __HANDLE_SLAVE__)                   \
 501   ((__HANDLE_SLAVE__)->Instance = ADC2)
 502
 503 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
 504
 505 #define IS_ADC_INJECTED_RANK(CHANNEL) (((CHANNEL) == ADC_INJECTED_RANK_1) || \
 506                                        ((CHANNEL) == ADC_INJECTED_RANK_2) || \
 507                                        ((CHANNEL) == ADC_INJECTED_RANK_3) || \
 508                                        ((CHANNEL) == ADC_INJECTED_RANK_4)   )
 509
 510 #define IS_ADC_EXTTRIGINJEC_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE)  || \
 511                                         ((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISING)  )
 512
 513 /** @defgroup ADCEx_injected_nb_conv_verification ADCEx injected nb conv verification
 514   * @{
 515   */
 516 #define IS_ADC_INJECTED_NB_CONV(LENGTH)                                        \
 517   (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)4)))
 518 /**
 519   * @}
 520   */
 521
 522 #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC)
 523 #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
 524                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
 525                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
 526                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
 527                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
 528                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
 529                                                                                   \
 530                                  ((REGTRIG) == ADC_SOFTWARE_START)               )
 531 #endif
 532 #if defined (STM32F101xE) || defined (STM32F101xG)
 533 #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
 534                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
 535                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
 536                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
 537                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
 538                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
 539                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO)   || \
 540                                                                                   \
 541                                  ((REGTRIG) == ADC_SOFTWARE_START)               )
 542 #endif
 543 #if defined (STM32F103xE) || defined (STM32F103xG)
 544 #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
 545                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
 546                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
 547                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
 548                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
 549                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
 550                                                                                   \
 551                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_CC1)    || \
 552                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC3)    || \
 553                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_CC1)    || \
 554                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC1)    || \
 555                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC3)    || \
 556                                                                                   \
 557                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC3)    || \
 558                                  ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO)   || \
 559                                  ((REGTRIG) == ADC_SOFTWARE_START)               )
 560 #endif
 561
 562 #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC)
 563 #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
 564                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
 565                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
 566                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
 567                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
 568                                                                                            \
 569                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
 570                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
 571                                                                                            \
 572                                       ((REGTRIG) == ADC_INJECTED_SOFTWARE_START)          )
 573 #endif
 574 #if defined (STM32F101xE) || defined (STM32F101xG)
 575 #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
 576                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
 577                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
 578                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
 579                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
 580                                                                                            \
 581                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
 582                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
 583                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4)   || \
 584                                                                                            \
 585                                       ((REGTRIG) == ADC_INJECTED_SOFTWARE_START)          )
 586 #endif
 587 #if defined (STM32F103xE) || defined (STM32F103xG)
 588 #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
 589                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
 590                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
 591                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
 592                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4)   || \
 593                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
 594                                                                                            \
 595                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3)   || \
 596                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2)   || \
 597                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO)  || \
 598                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4)   || \
 599                                                                                            \
 600                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
 601                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
 602                                       ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4)   || \
 603                                                                                            \
 604                                       ((REGTRIG) == ADC_INJECTED_SOFTWARE_START)          )
 605 #endif
 606
 607 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
 608 #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT)                || \
 609                            ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT)  || \
 610                            ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG)    || \
 611                            ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLFAST) || \
 612                            ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLSLOW) || \
 613                            ((MODE) == ADC_DUALMODE_INJECSIMULT)            || \
 614                            ((MODE) == ADC_DUALMODE_REGSIMULT)              || \
 615                            ((MODE) == ADC_DUALMODE_INTERLFAST)             || \
 616                            ((MODE) == ADC_DUALMODE_INTERLSLOW)             || \
 617                            ((MODE) == ADC_DUALMODE_ALTERTRIG)                )
 618 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
 619
 620 /**
 621   * @}
 622   */
 623
 624
 625
 626
 627
 628
 629 /* Exported functions --------------------------------------------------------*/
 630 /** @addtogroup ADCEx_Exported_Functions
 631   * @{
 632   */
 633
 634 /* IO operation functions  *****************************************************/
 635 /** @addtogroup ADCEx_Exported_Functions_Group1
 636   * @{
 637   */
 638
 639 /* ADC calibration */
 640 HAL_StatusTypeDef       HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc);
 641
 642 /* Blocking mode: Polling */
 643 HAL_StatusTypeDef       HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
 644 HAL_StatusTypeDef       HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
 645 HAL_StatusTypeDef       HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
 646
 647 /* Non-blocking mode: Interruption */
 648 HAL_StatusTypeDef       HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
 649 HAL_StatusTypeDef       HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
 650
 651 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
 652 /* ADC multimode */
 653 HAL_StatusTypeDef       HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length);
 654 HAL_StatusTypeDef       HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc);
 655 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
 656
 657 /* ADC retrieve conversion value intended to be used with polling or interruption */
 658 uint32_t                HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
 659 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
 660 uint32_t                HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc);
 661 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
 662
 663 /* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption) */
 664 void                    HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
 665 /**
 666   * @}
 667   */
 668
 669
 670 /* Peripheral Control functions ***********************************************/
 671 /** @addtogroup ADCEx_Exported_Functions_Group2
 672   * @{
 673   */
 674 HAL_StatusTypeDef       HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
 675 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
 676 HAL_StatusTypeDef       HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode);
 677 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
 678 /**
 679   * @}
 680   */
 681
 682
 683 /**
 684   * @}
 685   */
 686
 687
 688 /**
 689   * @}
 690   */
 691
 692 /**
 693   * @}
 694   */
 695
 696 #ifdef __cplusplus
 697 }
 698 #endif
 699
 700 #endif /* __STM32F1xx_HAL_ADC_EX_H */
 701
 702
 703 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/