tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal_can.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f1xx_hal_can.h
   4   * @author  MCD Application Team
   5   * @version V1.0.0
   6   * @date    15-December-2014
   7   * @brief   Header file of CAN HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __stm32f1xx_CAN_H
  40 #define __stm32f1xx_CAN_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 #if defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || \
  47     defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC)
  48
  49 /* Includes ------------------------------------------------------------------*/
  50 #include "stm32f1xx_hal_def.h"
  51
  52 /** @addtogroup STM32F1xx_HAL_Driver
  53   * @{
  54   */
  55
  56 /** @addtogroup CAN
  57   * @{
  58   */
  59
  60 /* Exported types ------------------------------------------------------------*/
  61 /** @defgroup CAN_Exported_Types CAN Exported Types
  62   * @{
  63   */
  64 /**
  65   * @brief  HAL State structures definition
  66   */
  67 typedef enum
  68 {
  69   HAL_CAN_STATE_RESET             = 0x00,  /*!< CAN not yet initialized or disabled */
  70   HAL_CAN_STATE_READY             = 0x01,  /*!< CAN initialized and ready for use   */
  71   HAL_CAN_STATE_BUSY              = 0x02,  /*!< CAN process is ongoing              */
  72   HAL_CAN_STATE_BUSY_TX           = 0x12,  /*!< CAN process is ongoing              */
  73   HAL_CAN_STATE_BUSY_RX           = 0x22,  /*!< CAN process is ongoing              */
  74   HAL_CAN_STATE_BUSY_TX_RX        = 0x32,  /*!< CAN process is ongoing              */
  75   HAL_CAN_STATE_TIMEOUT           = 0x03,  /*!< CAN in Timeout state                */
  76   HAL_CAN_STATE_ERROR             = 0x04   /*!< CAN error state                     */
  77
  78 }HAL_CAN_StateTypeDef;
  79
  80
  81 /**
  82   * @brief  CAN init structure definition
  83   */
  84 typedef struct
  85 {
  86   uint32_t Prescaler;  /*!< Specifies the length of a time quantum.
  87                             This parameter must be a number between Min_Data = 1 and Max_Data = 1024. */
  88
  89   uint32_t Mode;       /*!< Specifies the CAN operating mode.
  90                             This parameter can be a value of @ref CAN_operating_mode */
  91
  92   uint32_t SJW;        /*!< Specifies the maximum number of time quanta
  93                             the CAN hardware is allowed to lengthen or
  94                             shorten a bit to perform resynchronization.
  95                             This parameter can be a value of @ref CAN_synchronisation_jump_width */
  96
  97   uint32_t BS1;        /*!< Specifies the number of time quanta in Bit Segment 1.
  98                             This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
  99
 100   uint32_t BS2;        /*!< Specifies the number of time quanta in Bit Segment 2.
 101                             This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
 102
 103   uint32_t TTCM;       /*!< Enable or disable the time triggered communication mode.
 104                             This parameter can be set to ENABLE or DISABLE. */
 105
 106   uint32_t ABOM;       /*!< Enable or disable the automatic bus-off management.
 107                             This parameter can be set to ENABLE or DISABLE. */
 108
 109   uint32_t AWUM;       /*!< Enable or disable the automatic wake-up mode.
 110                             This parameter can be set to ENABLE or DISABLE. */
 111
 112   uint32_t NART;       /*!< Enable or disable the non-automatic retransmission mode.
 113                             This parameter can be set to ENABLE or DISABLE. */
 114
 115   uint32_t RFLM;       /*!< Enable or disable the Receive FIFO Locked mode.
 116                             This parameter can be set to ENABLE or DISABLE. */
 117
 118   uint32_t TXFP;       /*!< Enable or disable the transmit FIFO priority.
 119                             This parameter can be set to ENABLE or DISABLE. */
 120 }CAN_InitTypeDef;
 121
 122 /**
 123   * @brief  CAN Tx message structure definition
 124   */
 125 typedef struct
 126 {
 127   uint32_t StdId;    /*!< Specifies the standard identifier.
 128                           This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */
 129
 130   uint32_t ExtId;    /*!< Specifies the extended identifier.
 131                           This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */
 132
 133   uint32_t IDE;      /*!< Specifies the type of identifier for the message that will be transmitted.
 134                           This parameter can be a value of @ref CAN_identifier_type */
 135
 136   uint32_t RTR;      /*!< Specifies the type of frame for the message that will be transmitted.
 137                           This parameter can be a value of @ref CAN_remote_transmission_request */
 138
 139   uint32_t DLC;      /*!< Specifies the length of the frame that will be transmitted.
 140                           This parameter must be a number between Min_Data = 0 and Max_Data = 8. */
 141
 142   uint32_t Data[8];  /*!< Contains the data to be transmitted.
 143                           This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */
 144
 145 }CanTxMsgTypeDef;
 146
 147 /**
 148   * @brief  CAN Rx message structure definition
 149   */
 150 typedef struct
 151 {
 152   uint32_t StdId;       /*!< Specifies the standard identifier.
 153                              This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */
 154
 155   uint32_t ExtId;       /*!< Specifies the extended identifier.
 156                              This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */
 157
 158   uint32_t IDE;         /*!< Specifies the type of identifier for the message that will be received.
 159                              This parameter can be a value of @ref CAN_identifier_type */
 160
 161   uint32_t RTR;         /*!< Specifies the type of frame for the received message.
 162                              This parameter can be a value of @ref CAN_remote_transmission_request */
 163
 164   uint32_t DLC;         /*!< Specifies the length of the frame that will be received.
 165                              This parameter must be a number between Min_Data = 0 and Max_Data = 8. */
 166
 167   uint32_t Data[8];     /*!< Contains the data to be received.
 168                              This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */
 169
 170   uint32_t FMI;         /*!< Specifies the index of the filter the message stored in the mailbox passes through.
 171                              This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */
 172
 173   uint32_t FIFONumber;  /*!< Specifies the receive FIFO number.
 174                              This parameter can be a value of @ref CAN_receive_FIFO_number_constants */
 175
 176 }CanRxMsgTypeDef;
 177
 178 /**
 179   * @brief  CAN handle Structure definition
 180   */
 181 typedef struct
 182 {
 183   CAN_TypeDef                 *Instance;  /*!< Register base address          */
 184
 185   CAN_InitTypeDef             Init;       /*!< CAN required parameters        */
 186
 187   CanTxMsgTypeDef*            pTxMsg;     /*!< Pointer to transmit structure  */
 188
 189   CanRxMsgTypeDef*            pRxMsg;     /*!< Pointer to reception structure */
 190
 191   HAL_LockTypeDef             Lock;       /*!< CAN locking object             */
 192
 193   __IO HAL_CAN_StateTypeDef   State;      /*!< CAN communication state        */
 194
 195   __IO uint32_t               ErrorCode;  /*!< CAN Error code                 */
 196
 197 }CAN_HandleTypeDef;
 198 /**
 199   * @}
 200   */
 201 /* Exported constants --------------------------------------------------------*/
 202
 203 /** @defgroup CAN_Exported_Constants CAN Exported Constants
 204   * @{
 205   */
 206
 207 /** @defgroup CAN_Error_Code CAN Error Code
 208   * @{
 209   */
 210
 211
 212 #define HAL_CAN_ERROR_NONE              ((uint32_t)0x00)   /*!< No error             */
 213 #define HAL_CAN_ERROR_EWG               ((uint32_t)0x01)   /*!< EWG error            */
 214 #define HAL_CAN_ERROR_EPV               ((uint32_t)0x02)   /*!< EPV error            */
 215 #define HAL_CAN_ERROR_BOF               ((uint32_t)0x04)   /*!< BOF error            */
 216 #define HAL_CAN_ERROR_STF               ((uint32_t)0x08)   /*!< Stuff error          */
 217 #define HAL_CAN_ERROR_FOR               ((uint32_t)0x10)   /*!< Form error           */
 218 #define HAL_CAN_ERROR_ACK               ((uint32_t)0x20)   /*!< Acknowledgment error */
 219 #define HAL_CAN_ERROR_BR                ((uint32_t)0x40)   /*!< Bit recessive        */
 220 #define HAL_CAN_ERROR_BD                ((uint32_t)0x80)   /*!< LEC dominant         */
 221 #define HAL_CAN_ERROR_CRC               ((uint32_t)0x100)  /*!< LEC transfer error   */
 222
 223
 224 /**
 225   * @}
 226   */
 227
 228
 229 /** @defgroup CAN_InitStatus CAN initialization Status
 230   * @{
 231   */
 232 #define CAN_INITSTATUS_FAILED       ((uint32_t)0x00000000)  /*!< CAN initialization failed */
 233 #define CAN_INITSTATUS_SUCCESS      ((uint32_t)0x00000001)  /*!< CAN initialization OK */
 234 /**
 235   * @}
 236   */
 237
 238 /** @defgroup CAN_operating_mode CAN Operating Mode
 239   * @{
 240   */
 241 #define CAN_MODE_NORMAL             ((uint32_t)0x00000000)                     /*!< Normal mode   */
 242 #define CAN_MODE_LOOPBACK           ((uint32_t)CAN_BTR_LBKM)                   /*!< Loopback mode */
 243 #define CAN_MODE_SILENT             ((uint32_t)CAN_BTR_SILM)                   /*!< Silent mode   */
 244 #define CAN_MODE_SILENT_LOOPBACK    ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM))  /*!< Loopback combined with silent mode */
 245
 246 /**
 247   * @}
 248   */
 249
 250
 251 /** @defgroup CAN_synchronisation_jump_width CAN Synchronization Jump Width
 252   * @{
 253   */
 254 #define CAN_SJW_1TQ                 ((uint32_t)0x00000000)     /*!< 1 time quantum */
 255 #define CAN_SJW_2TQ                 ((uint32_t)CAN_BTR_SJW_0)  /*!< 2 time quantum */
 256 #define CAN_SJW_3TQ                 ((uint32_t)CAN_BTR_SJW_1)  /*!< 3 time quantum */
 257 #define CAN_SJW_4TQ                 ((uint32_t)CAN_BTR_SJW)    /*!< 4 time quantum */
 258
 259 /**
 260   * @}
 261   */
 262
 263 /** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in Bit Segment 1
 264   * @{
 265   */
 266 #define CAN_BS1_1TQ                 ((uint32_t)0x00000000)                                       /*!< 1 time quantum  */
 267 #define CAN_BS1_2TQ                 ((uint32_t)CAN_BTR_TS1_0)                                    /*!< 2 time quantum  */
 268 #define CAN_BS1_3TQ                 ((uint32_t)CAN_BTR_TS1_1)                                    /*!< 3 time quantum  */
 269 #define CAN_BS1_4TQ                 ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0))                  /*!< 4 time quantum  */
 270 #define CAN_BS1_5TQ                 ((uint32_t)CAN_BTR_TS1_2)                                    /*!< 5 time quantum  */
 271 #define CAN_BS1_6TQ                 ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0))                  /*!< 6 time quantum  */
 272 #define CAN_BS1_7TQ                 ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1))                  /*!< 7 time quantum  */
 273 #define CAN_BS1_8TQ                 ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0))  /*!< 8 time quantum  */
 274 #define CAN_BS1_9TQ                 ((uint32_t)CAN_BTR_TS1_3)                                    /*!< 9 time quantum  */
 275 #define CAN_BS1_10TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0))                  /*!< 10 time quantum */
 276 #define CAN_BS1_11TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1))                  /*!< 11 time quantum */
 277 #define CAN_BS1_12TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0))  /*!< 12 time quantum */
 278 #define CAN_BS1_13TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2))                  /*!< 13 time quantum */
 279 #define CAN_BS1_14TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0))  /*!< 14 time quantum */
 280 #define CAN_BS1_15TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1))  /*!< 15 time quantum */
 281 #define CAN_BS1_16TQ                ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */
 282
 283 /**
 284   * @}
 285   */
 286
 287 /** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in Bit Segment 2
 288   * @{
 289   */
 290 #define CAN_BS2_1TQ                 ((uint32_t)0x00000000)                       /*!< 1 time quantum */
 291 #define CAN_BS2_2TQ                 ((uint32_t)CAN_BTR_TS2_0)                    /*!< 2 time quantum */
 292 #define CAN_BS2_3TQ                 ((uint32_t)CAN_BTR_TS2_1)                    /*!< 3 time quantum */
 293 #define CAN_BS2_4TQ                 ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0))  /*!< 4 time quantum */
 294 #define CAN_BS2_5TQ                 ((uint32_t)CAN_BTR_TS2_2)                    /*!< 5 time quantum */
 295 #define CAN_BS2_6TQ                 ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0))  /*!< 6 time quantum */
 296 #define CAN_BS2_7TQ                 ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1))  /*!< 7 time quantum */
 297 #define CAN_BS2_8TQ                 ((uint32_t)CAN_BTR_TS2)                      /*!< 8 time quantum */
 298
 299 /**
 300   * @}
 301   */
 302
 303 /** @defgroup CAN_filter_mode CAN Filter Mode
 304   * @{
 305   */
 306 #define CAN_FILTERMODE_IDMASK       ((uint8_t)0x00)  /*!< Identifier mask mode */
 307 #define CAN_FILTERMODE_IDLIST       ((uint8_t)0x01)  /*!< Identifier list mode */
 308
 309 /**
 310   * @}
 311   */
 312
 313 /** @defgroup CAN_filter_scale CAN Filter Scale
 314   * @{
 315   */
 316 #define CAN_FILTERSCALE_16BIT       ((uint8_t)0x00)  /*!< Two 16-bit filters */
 317 #define CAN_FILTERSCALE_32BIT       ((uint8_t)0x01)  /*!< One 32-bit filter  */
 318
 319 /**
 320   * @}
 321   */
 322
 323 /** @defgroup CAN_filter_FIFO CAN Filter FIFO
 324   * @{
 325   */
 326 #define CAN_FILTER_FIFO0             ((uint8_t)0x00)  /*!< Filter FIFO 0 assignment for filter x */
 327 #define CAN_FILTER_FIFO1             ((uint8_t)0x01)  /*!< Filter FIFO 1 assignment for filter x */
 328
 329
 330 /**
 331   * @}
 332   */
 333
 334 /** @defgroup CAN_identifier_type CAN Identifier Type
 335   * @{
 336   */
 337 #define CAN_ID_STD             ((uint32_t)0x00000000)  /*!< Standard Id */
 338 #define CAN_ID_EXT             ((uint32_t)0x00000004)  /*!< Extended Id */
 339
 340 /**
 341   * @}
 342   */
 343
 344 /** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request
 345   * @{
 346   */
 347 #define CAN_RTR_DATA                ((uint32_t)0x00000000)  /*!< Data frame */
 348 #define CAN_RTR_REMOTE              ((uint32_t)0x00000002)  /*!< Remote frame */
 349
 350 /**
 351   * @}
 352   */
 353
 354 /** @defgroup CAN_transmit_constants CAN Transmit Constants
 355   * @{
 356   */
 357 #define CAN_TXSTATUS_NOMAILBOX      ((uint8_t)0x04)  /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */
 358
 359 /**
 360   * @}
 361   */
 362
 363 /** @defgroup CAN_receive_FIFO_number_constants CAN Receive FIFO Number
 364   * @{
 365   */
 366 #define CAN_FIFO0                   ((uint8_t)0x00)  /*!< CAN FIFO 0 used to receive */
 367 #define CAN_FIFO1                   ((uint8_t)0x01)  /*!< CAN FIFO 1 used to receive */
 368
 369 /**
 370   * @}
 371   */
 372
 373 /** @defgroup CAN_flags CAN Flags
 374   * @{
 375   */
 376 /* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus()
 377    and CAN_ClearFlag() functions. */
 378 /* If the flag is 0x1XXXXXXX, it means that it can only be used with
 379    CAN_GetFlagStatus() function.  */
 380
 381 /* Transmit Flags */
 382 #define CAN_FLAG_RQCP0             ((uint32_t)((TSR_REGISTER_INDEX << 8U) | CAN_TSR_RQCP0_BIT_POSITION))  /*!< Request MailBox0 flag         */
 383 #define CAN_FLAG_RQCP1             ((uint32_t)((TSR_REGISTER_INDEX << 8U) | CAN_TSR_RQCP1_BIT_POSITION))  /*!< Request MailBox1 flag         */
 384 #define CAN_FLAG_RQCP2             ((uint32_t)((TSR_REGISTER_INDEX << 8U) | CAN_TSR_RQCP2_BIT_POSITION))  /*!< Request MailBox2 flag         */
 385 #define CAN_FLAG_TXOK0             ((uint32_t)((TSR_REGISTER_INDEX << 8U) | CAN_TSR_TXOK0_BIT_POSITION))  /*!< Transmission OK MailBox0 flag */
 386 #define CAN_FLAG_TXOK1             ((uint32_t)((TSR_REGISTER_INDEX << 8U) | CAN_TSR_TXOK1_BIT_POSITION))  /*!< Transmission OK MailBox1 flag */
 387 #define CAN_FLAG_TXOK2             ((uint32_t)((TSR_REGISTER_INDEX << 8U) | CAN_TSR_RQCP0_BIT_POSITION))  /*!< Transmission OK MailBox2 flag */
 388 #define CAN_FLAG_TME0              ((uint32_t)((TSR_REGISTER_INDEX << 8U) | CAN_TSR_TME0_BIT_POSITION))   /*!< Transmit mailbox 0 empty flag */
 389 #define CAN_FLAG_TME1              ((uint32_t)((TSR_REGISTER_INDEX << 8U) | CAN_TSR_TME1_BIT_POSITION))   /*!< Transmit mailbox 0 empty flag */
 390 #define CAN_FLAG_TME2              ((uint32_t)((TSR_REGISTER_INDEX << 8U) | CAN_TSR_TME2_BIT_POSITION))   /*!< Transmit mailbox 0 empty flag */
 391
 392 /* Receive Flags */
 393 #define CAN_FLAG_FF0               ((uint32_t)((RF0R_REGISTER_INDEX << 8U) | CAN_RF0R_FF0_BIT_POSITION))  /*!< FIFO 0 Full flag    */
 394 #define CAN_FLAG_FOV0              ((uint32_t)((RF0R_REGISTER_INDEX << 8U) | CAN_RF0R_FOV0_BIT_POSITION)) /*!< FIFO 0 Overrun flag */
 395
 396 #define CAN_FLAG_FF1               ((uint32_t)((RF1R_REGISTER_INDEX << 8U) | CAN_RF1R_FF1_BIT_POSITION))  /*!< FIFO 1 Full flag    */
 397 #define CAN_FLAG_FOV1              ((uint32_t)((RF1R_REGISTER_INDEX << 8U) | CAN_RF1R_FOV1_BIT_POSITION)) /*!< FIFO 1 Overrun flag */
 398
 399 /* Operating Mode Flags */
 400 #define CAN_FLAG_WKU               ((uint32_t)((MSR_REGISTER_INDEX << 8U) | CAN_MSR_WKU_BIT_POSITION))    /*!< Wake up flag           */
 401 #define CAN_FLAG_SLAK              ((uint32_t)((MSR_REGISTER_INDEX << 8U) | CAN_MSR_SLAK_BIT_POSITION))   /*!< Sleep acknowledge flag */
 402 #define CAN_FLAG_SLAKI             ((uint32_t)((MSR_REGISTER_INDEX << 8U) | CAN_MSR_SLAKI_BIT_POSITION))  /*!< Sleep acknowledge flag */
 403 /* @note When SLAK interrupt is disabled (SLKIE=0), no polling on SLAKI is possible.
 404          In this case the SLAK bit can be polled.*/
 405
 406 /* Error Flags */
 407 #define CAN_FLAG_EWG               ((uint32_t)((ESR_REGISTER_INDEX << 8U) | CAN_ESR_EWG_BIT_POSITION))    /*!< Error warning flag   */
 408 #define CAN_FLAG_EPV               ((uint32_t)((ESR_REGISTER_INDEX << 8U) | CAN_ESR_EPV_BIT_POSITION))    /*!< Error passive flag   */
 409 #define CAN_FLAG_BOF               ((uint32_t)((ESR_REGISTER_INDEX << 8U) | CAN_ESR_BOF_BIT_POSITION))    /*!< Bus-Off flag         */
 410
 411 /**
 412   * @}
 413   */
 414
 415
 416 /** @defgroup CAN_interrupts CAN Interrupts
 417   * @{
 418   */
 419 #define CAN_IT_TME                  ((uint32_t)CAN_IER_TMEIE)   /*!< Transmit mailbox empty interrupt */
 420
 421 /* Receive Interrupts */
 422 #define CAN_IT_FMP0                 ((uint32_t)CAN_IER_FMPIE0)  /*!< FIFO 0 message pending interrupt */
 423 #define CAN_IT_FF0                  ((uint32_t)CAN_IER_FFIE0)   /*!< FIFO 0 full interrupt            */
 424 #define CAN_IT_FOV0                 ((uint32_t)CAN_IER_FOVIE0)  /*!< FIFO 0 overrun interrupt         */
 425 #define CAN_IT_FMP1                 ((uint32_t)CAN_IER_FMPIE1)  /*!< FIFO 1 message pending interrupt */
 426 #define CAN_IT_FF1                  ((uint32_t)CAN_IER_FFIE1)   /*!< FIFO 1 full interrupt            */
 427 #define CAN_IT_FOV1                 ((uint32_t)CAN_IER_FOVIE1)  /*!< FIFO 1 overrun interrupt         */
 428
 429 /* Operating Mode Interrupts */
 430 #define CAN_IT_WKU                  ((uint32_t)CAN_IER_WKUIE)  /*!< Wake-up interrupt           */
 431 #define CAN_IT_SLK                  ((uint32_t)CAN_IER_SLKIE)  /*!< Sleep acknowledge interrupt */
 432
 433 /* Error Interrupts */
 434 #define CAN_IT_EWG                  ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt   */
 435 #define CAN_IT_EPV                  ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt   */
 436 #define CAN_IT_BOF                  ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt         */
 437 #define CAN_IT_LEC                  ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */
 438 #define CAN_IT_ERR                  ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt           */
 439
 440
 441 /**
 442   * @}
 443   */
 444
 445
 446
 447 /**
 448   * @}
 449   */
 450
 451 /** @defgroup CAN_Private_Constants CAN Private Constants
 452   * @{
 453   */
 454
 455 /* CAN intermediate shift values used for CAN flags */
 456 #define TSR_REGISTER_INDEX      ((uint32_t)0x5)
 457 #define RF0R_REGISTER_INDEX     ((uint32_t)0x2)
 458 #define RF1R_REGISTER_INDEX     ((uint32_t)0x4)
 459 #define MSR_REGISTER_INDEX      ((uint32_t)0x1)
 460 #define ESR_REGISTER_INDEX      ((uint32_t)0x3)
 461
 462 /* CAN flags bits position into their respective register (TSR, RF0R, RF1R or MSR regsiters) */
 463 /* Transmit Flags */
 464 #define CAN_TSR_RQCP0_BIT_POSITION     ((uint32_t)0x00000000)
 465 #define CAN_TSR_RQCP1_BIT_POSITION     ((uint32_t)0x00000008)
 466 #define CAN_TSR_RQCP2_BIT_POSITION     ((uint32_t)0x00000010)
 467 #define CAN_TSR_TXOK0_BIT_POSITION     ((uint32_t)0x00000001)
 468 #define CAN_TSR_TXOK1_BIT_POSITION     ((uint32_t)0x00000009)
 469 #define CAN_TSR_TXOK2_BIT_POSITION     ((uint32_t)0x00000011)
 470 #define CAN_TSR_TME0_BIT_POSITION      ((uint32_t)0x0000001A)
 471 #define CAN_TSR_TME1_BIT_POSITION      ((uint32_t)0x0000001B)
 472 #define CAN_TSR_TME2_BIT_POSITION      ((uint32_t)0x0000001C)
 473
 474 /* Receive Flags */
 475 #define CAN_RF0R_FF0_BIT_POSITION       ((uint32_t)0x00000003)
 476 #define CAN_RF0R_FOV0_BIT_POSITION      ((uint32_t)0x00000004)
 477
 478 #define CAN_RF1R_FF1_BIT_POSITION       ((uint32_t)0x00000003)
 479 #define CAN_RF1R_FOV1_BIT_POSITION      ((uint32_t)0x00000004)
 480
 481 /* Operating Mode Flags */
 482 #define CAN_MSR_WKU_BIT_POSITION       ((uint32_t)0x00000003)
 483 #define CAN_MSR_SLAK_BIT_POSITION      ((uint32_t)0x00000001)
 484 #define CAN_MSR_SLAKI_BIT_POSITION     ((uint32_t)0x00000004)
 485
 486 /* Error Flags */
 487 #define CAN_ESR_EWG_BIT_POSITION       ((uint32_t)0x00000000)
 488 #define CAN_ESR_EPV_BIT_POSITION       ((uint32_t)0x00000001)
 489 #define CAN_ESR_BOF_BIT_POSITION       ((uint32_t)0x00000002)
 490
 491 /* Mask used by macro to get/clear CAN flags*/
 492 #define CAN_FLAG_MASK     ((uint32_t)0x000000FF)
 493
 494 /* Mailboxes definition */
 495 #define CAN_TXMAILBOX_0   ((uint8_t)0x00)
 496 #define CAN_TXMAILBOX_1   ((uint8_t)0x01)
 497 #define CAN_TXMAILBOX_2   ((uint8_t)0x02)
 498
 499
 500 /**
 501   * @}
 502   */
 503
 504
 505 /* Exported macros -----------------------------------------------------------*/
 506 /** @defgroup CAN_Exported_Macro CAN Exported Macros
 507   * @{
 508   */
 509
 510 /** @brief  Reset CAN handle state
 511   * @param  __HANDLE__: CAN handle.
 512   * @retval None
 513   */
 514 #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
 515
 516 /**
 517   * @brief  Enable the specified CAN interrupts
 518   * @param  __HANDLE__: CAN handle.
 519   * @param  __INTERRUPT__: CAN Interrupt.
 520   *         This parameter can be one of the following values:
 521   *            @arg CAN_IT_TME: Transmit mailbox empty interrupt enable
 522   *            @arg CAN_IT_FMP0: FIFO 0 message pending interrupt
 523   *            @arg CAN_IT_FF0 : FIFO 0 full interrupt
 524   *            @arg CAN_IT_FOV0: FIFO 0 overrun interrupt
 525   *            @arg CAN_IT_FMP1: FIFO 1 message pending interrupt
 526   *            @arg CAN_IT_FF1 : FIFO 1 full interrupt
 527   *            @arg CAN_IT_FOV1: FIFO 1 overrun interrupt
 528   *            @arg CAN_IT_WKU : Wake-up interrupt
 529   *            @arg CAN_IT_SLK : Sleep acknowledge interrupt
 530   *            @arg CAN_IT_EWG : Error warning interrupt
 531   *            @arg CAN_IT_EPV : Error passive interrupt
 532   *            @arg CAN_IT_BOF : Bus-off interrupt
 533   *            @arg CAN_IT_LEC : Last error code interrupt
 534   *            @arg CAN_IT_ERR : Error Interrupt
 535   * @retval None.
 536   */
 537 #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
 538
 539 /**
 540   * @brief  Disable the specified CAN interrupts
 541   * @param  __HANDLE__: CAN handle.
 542   * @param  __INTERRUPT__: CAN Interrupt.
 543   *         This parameter can be one of the following values:
 544   *            @arg CAN_IT_TME: Transmit mailbox empty interrupt enable
 545   *            @arg CAN_IT_FMP0: FIFO 0 message pending interrupt
 546   *            @arg CAN_IT_FF0 : FIFO 0 full interrupt
 547   *            @arg CAN_IT_FOV0: FIFO 0 overrun interrupt
 548   *            @arg CAN_IT_FMP1: FIFO 1 message pending interrupt
 549   *            @arg CAN_IT_FF1 : FIFO 1 full interrupt
 550   *            @arg CAN_IT_FOV1: FIFO 1 overrun interrupt
 551   *            @arg CAN_IT_WKU : Wake-up interrupt
 552   *            @arg CAN_IT_SLK : Sleep acknowledge interrupt
 553   *            @arg CAN_IT_EWG : Error warning interrupt
 554   *            @arg CAN_IT_EPV : Error passive interrupt
 555   *            @arg CAN_IT_BOF : Bus-off interrupt
 556   *            @arg CAN_IT_LEC : Last error code interrupt
 557   *            @arg CAN_IT_ERR : Error Interrupt
 558   * @retval None.
 559   */
 560 #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
 561
 562 /**
 563   * @brief  Return the number of pending received messages.
 564   * @param  __HANDLE__: CAN handle.
 565   * @param  __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
 566   * @retval The number of pending message.
 567   */
 568 #define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
 569 ((uint8_t)((__HANDLE__)->Instance->RF0R&(uint32_t)0x03)) : ((uint8_t)((__HANDLE__)->Instance->RF1R&(uint32_t)0x03)))
 570
 571 /** @brief  Check whether the specified CAN flag is set or not.
 572   * @param  __HANDLE__: specifies the CAN Handle.
 573   * @param  __FLAG__: specifies the flag to check.
 574   *         This parameter can be one of the following values:
 575   *            @arg CAN_TSR_RQCP0: Request MailBox0 Flag
 576   *            @arg CAN_TSR_RQCP1: Request MailBox1 Flag
 577   *            @arg CAN_TSR_RQCP2: Request MailBox2 Flag
 578   *            @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
 579   *            @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
 580   *            @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
 581   *            @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
 582   *            @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
 583   *            @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
 584   *            @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
 585   *            @arg CAN_FLAG_FF0: FIFO 0 Full Flag
 586   *            @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
 587   *            @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
 588   *            @arg CAN_FLAG_FF1: FIFO 1 Full Flag
 589   *            @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
 590   *            @arg CAN_FLAG_WKU: Wake up Flag
 591   *            @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
 592   *            @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
 593   *            @arg CAN_FLAG_EWG: Error Warning Flag
 594   *            @arg CAN_FLAG_EPV: Error Passive Flag
 595   *            @arg CAN_FLAG_BOF: Bus-Off Flag
 596   * @retval The new state of __FLAG__ (TRUE or FALSE).
 597   */
 598 #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
 599 ((((__FLAG__) >> 8) == 5)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
 600  (((__FLAG__) >> 8) == 2)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
 601  (((__FLAG__) >> 8) == 4)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
 602  (((__FLAG__) >> 8) == 1)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
 603  ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))))
 604
 605 /** @brief  Clear the specified CAN pending flag.
 606   * @param  __HANDLE__: specifies the CAN Handle.
 607   * @param  __FLAG__: specifies the flag to check.
 608   *         This parameter can be one of the following values:
 609   *            @arg CAN_TSR_RQCP0: Request MailBox0 Flag
 610   *            @arg CAN_TSR_RQCP1: Request MailBox1 Flag
 611   *            @arg CAN_TSR_RQCP2: Request MailBox2 Flag
 612   *            @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
 613   *            @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
 614   *            @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
 615   *            @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
 616   *            @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
 617   *            @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
 618   *            @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
 619   *            @arg CAN_FLAG_FF0: FIFO 0 Full Flag
 620   *            @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
 621   *            @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
 622   *            @arg CAN_FLAG_FF1: FIFO 1 Full Flag
 623   *            @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
 624   *            @arg CAN_FLAG_WKU: Wake up Flag
 625   *            @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
 626   * @retval The new state of __FLAG__ (TRUE or FALSE).
 627   */
 628 #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
 629 ((((__FLAG__) >> 8U) == TSR_REGISTER_INDEX) ? (((__HANDLE__)->Instance->TSR)  = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
 630  (((__FLAG__) >> 8U) == RF0R_REGISTER_INDEX)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
 631  (((__FLAG__) >> 8U) == RF1R_REGISTER_INDEX)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
 632  (((__FLAG__) >> 8U) == MSR_REGISTER_INDEX) ? (((__HANDLE__)->Instance->MSR)  = (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0)
 633
 634
 635 /** @brief  Check if the specified CAN interrupt source is enabled or disabled.
 636   * @param  __HANDLE__: specifies the CAN Handle.
 637   * @param  __INTERRUPT__: specifies the CAN interrupt source to check.
 638   *         This parameter can be one of the following values:
 639   *            @arg CAN_IT_TME: Transmit mailbox empty interrupt enable
 640   *            @arg CAN_IT_FMP0: FIFO 0 message pending interrupt
 641   *            @arg CAN_IT_FF0 : FIFO 0 full interrupt
 642   *            @arg CAN_IT_FOV0: FIFO 0 overrun interrupt
 643   *            @arg CAN_IT_FMP1: FIFO 1 message pending interrupt
 644   *            @arg CAN_IT_FF1 : FIFO 1 full interrupt
 645   *            @arg CAN_IT_FOV1: FIFO 1 overrun interrupt
 646   *            @arg CAN_IT_WKU : Wake-up interrupt
 647   *            @arg CAN_IT_SLK : Sleep acknowledge interrupt
 648   *            @arg CAN_IT_EWG : Error warning interrupt
 649   *            @arg CAN_IT_EPV : Error passive interrupt
 650   *            @arg CAN_IT_BOF : Bus-off interrupt
 651   *            @arg CAN_IT_LEC : Last error code interrupt
 652   *            @arg CAN_IT_ERR : Error Interrupt
 653   * @retval The new state of __IT__ (TRUE or FALSE).
 654   */
 655 #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
 656
 657 /**
 658   * @brief  Check the transmission status of a CAN Frame.
 659   * @param  __HANDLE__: specifies the CAN Handle.
 660   * @param  __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
 661   * @retval The new status of transmission  (TRUE or FALSE).
 662   */
 663 #define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\
 664 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) == (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) :\
 665  ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) == (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) :\
 666  ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)))
 667
 668 /**
 669   * @brief  Release the specified receive FIFO.
 670   * @param  __HANDLE__: CAN handle.
 671   * @param  __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
 672   * @retval None.
 673   */
 674 #define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
 675 ((__HANDLE__)->Instance->RF0R |= CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R |= CAN_RF1R_RFOM1))
 676
 677 /**
 678   * @brief  Cancel a transmit request.
 679   * @param  __HANDLE__: specifies the CAN Handle.
 680   * @param  __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
 681   * @retval None.
 682   */
 683 #define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\
 684 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ0) :\
 685  ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ1) :\
 686  ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ2))
 687
 688 /**
 689   * @brief  Enable or disables the DBG Freeze for CAN.
 690   * @param  __HANDLE__: specifies the CAN Handle.
 691   * @param  __NEWSTATE__: new state of the CAN peripheral.
 692   *         This parameter can be: ENABLE (CAN reception/transmission is frozen
 693   *         during debug. Reception FIFOs can still be accessed/controlled normally)
 694   *         or DISABLE (CAN is working during debug).
 695   * @retval None
 696   */
 697 #define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \
 698 ((__HANDLE__)->Instance->MCR |= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF))
 699
 700 /**
 701  * @}
 702  */
 703
 704 /* Private macros --------------------------------------------------------*/
 705 /** @defgroup CAN_Private_Macros   CAN Private Macros
 706   * @{
 707   */
 708
 709 #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \
 710                            ((MODE) == CAN_MODE_LOOPBACK)|| \
 711                            ((MODE) == CAN_MODE_SILENT) || \
 712                            ((MODE) == CAN_MODE_SILENT_LOOPBACK))
 713
 714 #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ)|| \
 715                          ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ))
 716
 717 #define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ)
 718
 719 #define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ)
 720
 721 #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \
 722                                   ((MODE) == CAN_FILTERMODE_IDLIST))
 723
 724 #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \
 725                                     ((SCALE) == CAN_FILTERSCALE_32BIT))
 726
 727
 728 #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \
 729                                   ((FIFO) == CAN_FILTER_FIFO1))
 730
 731 #define IS_CAN_IDTYPE(IDTYPE)  (((IDTYPE) == CAN_ID_STD) || \
 732                                 ((IDTYPE) == CAN_ID_EXT))
 733
 734 #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE))
 735
 736 #define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1))
 737
 738 #define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28)
 739
 740 #define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02))
 741 #define IS_CAN_STDID(STDID)   ((STDID) <= ((uint32_t)0x7FF))
 742 #define IS_CAN_EXTID(EXTID)   ((EXTID) <= ((uint32_t)0x1FFFFFFF))
 743 #define IS_CAN_DLC(DLC)       ((DLC) <= ((uint8_t)0x08))
 744
 745 #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024))
 746
 747 /**
 748   * @}
 749   */
 750
 751 /* Include CAN HAL Extension module */
 752 #include "stm32f1xx_hal_can_ex.h"
 753
 754 /* Exported functions --------------------------------------------------------*/
 755 /** @addtogroup CAN_Exported_Functions
 756   * @{
 757   */
 758
 759 /** @addtogroup CAN_Exported_Functions_Group1
 760  *  @brief    Initialization and Configuration functions
 761  * @{
 762  */
 763 /* Initialization and de-initialization functions *****************************/
 764 HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan);
 765 HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig);
 766 HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan);
 767 void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan);
 768 void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan);
 769 /**
 770  * @}
 771  */
 772
 773 /** @addtogroup CAN_Exported_Functions_Group2
 774  *  @brief    I/O operation functions
 775  * @{
 776  */
 777 /* IO operation functions *****************************************************/
 778 HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout);
 779 HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan);
 780 HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout);
 781 HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber);
 782 HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan);
 783 HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
 784 void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan);
 785 void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan);
 786 void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan);
 787 void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
 788 /**
 789  * @}
 790  */
 791
 792 /** @addtogroup CAN_Exported_Functions_Group3
 793  *  @brief   CAN Peripheral State functions
 794  * @{
 795  */
 796 /* Peripheral State and Error functions ***************************************/
 797 uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
 798 HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan);
 799 /**
 800  * @}
 801  */
 802
 803 /**
 804  * @}
 805  */
 806
 807 /**
 808   * @}
 809   */
 810
 811 /**
 812   * @}
 813   */
 814
 815 #endif /* STM32F103x6) || STM32F103xB || STM32F103xE || */
 816        /* STM32F103xG) || STM32F105xC || STM32F107xC    */
 817
 818 #ifdef __cplusplus
 819 }
 820 #endif
 821
 822 #endif /* __stm32f1xx_CAN_H */
 823
 824
 825 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/