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1 /**
2 ******************************************************************************
3 * @file stm32f1xx_hal_dac.c
4 * @author MCD Application Team
5 * @version V1.0.0
6 * @date 15-December-2014
7 * @brief DAC HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the Digital to Analog Converter (DAC) peripheral:
10 * + Initialization and de-initialization functions
11 * + IO operation functions
12 * + Peripheral Control functions
13 * + Peripheral State and Errors functions
14 *
15 *
16 @verbatim
17 ==============================================================================
18 ##### DAC Peripheral features #####
19 ==============================================================================
20 [..]
21 *** DAC Channels ***
22 ====================
23 [..]
24 The device integrates two 12-bit Digital Analog Converters that can
25 be used independently or simultaneously (dual mode):
26 (#) DAC channel1 with DAC_OUT1 (PA4) as output
27 (#) DAC channel2 with DAC_OUT2 (PA5) as output
28
29 *** DAC Triggers ***
30 ====================
31 [..]
32 Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE
33 and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register.
34 [..]
35 Digital to Analog conversion can be triggered by:
36 (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9.
37 The used pin (GPIOx_PIN_9) must be configured in input mode.
38
39 (#) Timers TRGO: TIM2, TIM4, TIM6, TIM7
40 For STM32F10x connectivity line devices and STM32F100x devices: TIM3
41 For STM32F10x high-density and XL-density devices: TIM8
42 For STM32F100x high-density value line devices: TIM15 as
43 replacement of TIM5.
44 (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T4_TRGO...)
45
46 (#) Software using DAC_TRIGGER_SOFTWARE
47
48 *** DAC Buffer mode feature ***
49 ===============================
50 [..]
51 Each DAC channel integrates an output buffer that can be used to
52 reduce the output impedance, and to drive external loads directly
53 without having to add an external operational amplifier.
54 To enable, the output buffer use
55 sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
56 [..]
57 (@) Refer to the device datasheet for more details about output
58 impedance value with and without output buffer.
59
60 *** DAC connect feature ***
61 ===============================
62 [..]
63 Each DAC channel can be connected internally.
64 To connect, use
65 sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_ENABLE;
66
67 *** GPIO configurations guidelines ***
68 =====================
69 [..]
70 When a DAC channel is used (ex channel1 on PA4) and the other is not
71 (ex channel1 on PA5 is configured in Analog and disabled).
72 Channel1 may disturb channel2 as coupling effect.
73 Note that there is no coupling on channel2 as soon as channel2 is turned on.
74 Coupling on adjacent channel could be avoided as follows:
75 when unused PA5 is configured as INPUT PULL-UP or DOWN.
76 PA5 is configured in ANALOG just before it is turned on.
77
78 *** DAC wave generation feature ***
79 ===================================
80 [..]
81 Both DAC channels can be used to generate
82 (#) Noise wave using HAL_DACEx_NoiseWaveGenerate()
83 (#) Triangle wave using HAL_DACEx_TriangleWaveGenerate()
84
85 *** DAC data format ***
86 =======================
87 [..]
88 The DAC data format can be:
89 (#) 8-bit right alignment using DAC_ALIGN_8B_R
90 (#) 12-bit left alignment using DAC_ALIGN_12B_L
91 (#) 12-bit right alignment using DAC_ALIGN_12B_R
92
93 *** DAC data value to voltage correspondance ***
94 ================================================
95 [..]
96 The analog output voltage on each DAC channel pin is determined
97 by the following equation:
98 [..]
99 DAC_OUTx = VREF+ * DOR / 4095
100 (+) with DOR is the Data Output Register
101 [..]
102 VEF+ is the input voltage reference (refer to the device datasheet)
103 [..]
104 e.g. To set DAC_OUT1 to 0.7V, use
105 (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
106
107 *** DMA requests ***
108 =====================
109 [..]
110 A DMA1 request can be generated when an external trigger (but not
111 a software trigger) occurs if DMA1 requests are enabled using
112 HAL_DAC_Start_DMA()
113 [..]
114 DMA requests are mapped as following:
115 (#) DAC channel1 :
116 For STM32F100x low-density, medium-density, high-density with DAC
117 DMA remap:
118 mapped on DMA1 channel3 which must be
119 already configured
120 For STM32F100x high-density without DAC DMA remap and other
121 STM32F1 devices:
122 mapped on DMA2 channel3 which must be
123 already configured
124 (#) DAC channel2 :
125 For STM32F100x low-density, medium-density, high-density with DAC
126 DMA remap:
127 mapped on DMA1 channel4 which must be
128 already configured
129 For STM32F100x high-density without DAC DMA remap and other
130 STM32F1 devices:
131 mapped on DMA2 channel4 which must be
132 already configured
133
134 ##### How to use this driver #####
135 ==============================================================================
136 [..]
137 (+) DAC APB clock must be enabled to get write access to DAC
138 registers using HAL_DAC_Init()
139 (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
140 (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function.
141 (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA functions
142
143 *** Polling mode IO operation ***
144 =================================
145 [..]
146 (+) Start the DAC peripheral using HAL_DAC_Start()
147 (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function.
148 (+) Stop the DAC peripheral using HAL_DAC_Stop()
149
150 *** DMA mode IO operation ***
151 ==============================
152 [..]
153 (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length
154 of data to be transferred at each end of conversion
155 (+) At the middle of data transfer HAL_DACEx_ConvHalfCpltCallbackCh1()or HAL_DACEx_ConvHalfCpltCallbackCh2()
156 function is executed and user can add his own code by customization of function pointer
157 HAL_DAC_ConvHalfCpltCallbackCh1 or HAL_DAC_ConvHalfCpltCallbackCh2
158 (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1()or HAL_DAC_ConvCpltCallbackCh2()
159 function is executed and user can add his own code by customization of function pointer
160 HAL_DAC_ConvCpltCallbackCh1 or HAL_DAC_ConvCpltCallbackCh2
161 (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() or HAL_DACEx_ErrorCallbackCh2() function is executed and user can
162 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1 or HAL_DACEx_ErrorCallbackCh2
163 (+) For STM32F100x devices with specific feature: DMA underrun.
164 In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler.
165 HAL_DAC_DMAUnderrunCallbackCh1()or HAL_DACEx_DMAUnderrunCallbackCh2()
166 function is executed and user can add his own code by customization of function pointer
167 HAL_DAC_DMAUnderrunCallbackCh1 or HAL_DACEx_DMAUnderrunCallbackCh2
168 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1
169 (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA()
170
171 *** DAC HAL driver macros list ***
172 =============================================
173 [..]
174 Below the list of most used macros in DAC HAL driver.
175
176 (+) __HAL_DAC_ENABLE : Enable the DAC peripheral (For STM32F100x devices with specific feature: DMA underrun)
177 (+) __HAL_DAC_DISABLE : Disable the DAC peripheral (For STM32F100x devices with specific feature: DMA underrun)
178 (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags (For STM32F100x devices with specific feature: DMA underrun)
179 (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status (For STM32F100x devices with specific feature: DMA underrun)
180
181 [..]
182 (@) You can refer to the DAC HAL driver header file for more useful macros
183
184 @endverbatim
185 ******************************************************************************
186 * @attention
187 *
188 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
189 *
190 * Redistribution and use in source and binary forms, with or without modification,
191 * are permitted provided that the following conditions are met:
192 * 1. Redistributions of source code must retain the above copyright notice,
193 * this list of conditions and the following disclaimer.
194 * 2. Redistributions in binary form must reproduce the above copyright notice,
195 * this list of conditions and the following disclaimer in the documentation
196 * and/or other materials provided with the distribution.
197 * 3. Neither the name of STMicroelectronics nor the names of its contributors
198 * may be used to endorse or promote products derived from this software
199 * without specific prior written permission.
200 *
201 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
202 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
203 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
204 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
205 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
206 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
207 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
208 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
209 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
210 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
211 *
212 ******************************************************************************
213 */
214
215
216 /* Includes ------------------------------------------------------------------*/
217 #include "stm32f1xx_hal.h"
218
219 /** @addtogroup STM32F1xx_HAL_Driver
220 * @{
221 */
222
223 /** @defgroup DAC DAC
224 * @brief DAC driver modules
225 * @{
226 */
227
228 #ifdef HAL_DAC_MODULE_ENABLED
229 #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
230
231 /* Private typedef -----------------------------------------------------------*/
232 /* Private define ------------------------------------------------------------*/
233 /* Private macro -------------------------------------------------------------*/
234 /* Private variables ---------------------------------------------------------*/
235 /* Private function prototypes -----------------------------------------------*/
236 /* Exported functions -------------------------------------------------------*/
237
238 /** @defgroup DAC_Exported_Functions DAC Exported Functions
239 * @{
240 */
241
242 /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions
243 * @brief Initialization and Configuration functions
244 *
245 @verbatim
246 ==============================================================================
247 ##### Initialization and de-initialization functions #####
248 ==============================================================================
249 [..] This section provides functions allowing to:
250 (+) Initialize and configure the DAC.
251 (+) De-initialize the DAC.
252
253 @endverbatim
254 * @{
255 */
256
257 /**
258 * @brief Initializes the DAC peripheral according to the specified parameters
259 * in the DAC_InitStruct.
260 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
261 * the configuration information for the specified DAC.
262 * @retval HAL status
263 */
264 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
265 {
266 /* Check DAC handle */
267 if(hdac == NULL)
268 {
269 return HAL_ERROR;
270 }
271 /* Check the parameters */
272 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
273
274 if(hdac->State == HAL_DAC_STATE_RESET)
275 {
276 /* Allocate lock resource and initialize it */
277 hdac-> Lock = HAL_UNLOCKED;
278
279 /* Init the low level hardware */
280 HAL_DAC_MspInit(hdac);
281 }
282
283 /* Initialize the DAC state*/
284 hdac->State = HAL_DAC_STATE_BUSY;
285
286 /* Set DAC error code to none */
287 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
288
289 /* Initialize the DAC state*/
290 hdac->State = HAL_DAC_STATE_READY;
291
292 /* Return function status */
293 return HAL_OK;
294 }
295
296 /**
297 * @brief Deinitializes the DAC peripheral registers to their default reset values.
298 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
299 * the configuration information for the specified DAC.
300 * @retval HAL status
301 */
302 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac)
303 {
304 /* Check DAC handle */
305 if(hdac == NULL)
306 {
307 return HAL_ERROR;
308 }
309
310 /* Check the parameters */
311 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
312
313 /* Change DAC state */
314 hdac->State = HAL_DAC_STATE_BUSY;
315
316 /* DeInit the low level hardware */
317 HAL_DAC_MspDeInit(hdac);
318
319 /* Set DAC error code to none */
320 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
321
322 /* Change DAC state */
323 hdac->State = HAL_DAC_STATE_RESET;
324
325 /* Release Lock */
326 __HAL_UNLOCK(hdac);
327
328 /* Return function status */
329 return HAL_OK;
330 }
331
332 /**
333 * @brief Initializes the DAC MSP.
334 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
335 * the configuration information for the specified DAC.
336 * @retval None
337 */
338 __weak void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
339 {
340 /* NOTE : This function Should not be modified, when the callback is needed,
341 the HAL_DAC_MspInit could be implemented in the user file
342 */
343 }
344
345 /**
346 * @brief DeInitializes the DAC MSP.
347 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
348 * the configuration information for the specified DAC.
349 * @retval None
350 */
351 __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
352 {
353 /* NOTE : This function Should not be modified, when the callback is needed,
354 the HAL_DAC_MspDeInit could be implemented in the user file
355 */
356 }
357
358 /**
359 * @}
360 */
361
362 /** @defgroup DAC_Exported_Functions_Group2 IO operation functions
363 * @brief IO operation functions
364 *
365 @verbatim
366 ==============================================================================
367 ##### IO operation functions #####
368 ==============================================================================
369 [..] This section provides functions allowing to:
370 (+) Start conversion.
371 (+) Stop conversion.
372 (+) Start conversion and enable DMA transfer.
373 (+) Stop conversion and disable DMA transfer.
374 (+) Get result of conversion.
375
376 @endverbatim
377 * @{
378 */
379
380 /**
381 * @brief Enables DAC and starts conversion of channel.
382 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
383 * the configuration information for the specified DAC.
384 * @param Channel: The selected DAC channel.
385 * This parameter can be one of the following values:
386 * @arg DAC_CHANNEL_1: DAC Channel1 selected
387 * @arg DAC_CHANNEL_2: DAC Channel2 selected
388 * @retval HAL status
389 */
390 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
391 {
392 /* Check the parameters */
393 assert_param(IS_DAC_CHANNEL(Channel));
394
395 /* Process locked */
396 __HAL_LOCK(hdac);
397
398 /* Change DAC state */
399 hdac->State = HAL_DAC_STATE_BUSY;
400
401 /* Enable the Peripharal */
402 __HAL_DAC_ENABLE(hdac, Channel);
403
404 if(Channel == DAC_CHANNEL_1)
405 {
406 /* Check if software trigger enabled */
407 if(HAL_IS_BIT_SET(hdac->Instance->CR, (DAC_CR_TEN1 | DAC_CR_TSEL1)))
408 {
409 /* Enable the selected DAC software conversion */
410 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
411 }
412 }
413 else
414 {
415 /* Check if software trigger enabled */
416 if(HAL_IS_BIT_SET(hdac->Instance->CR, (DAC_CR_TEN2 | DAC_CR_TSEL2)))
417 {
418 /* Enable the selected DAC software conversion*/
419 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
420 }
421 }
422
423 /* Change DAC state */
424 hdac->State = HAL_DAC_STATE_READY;
425
426 /* Process unlocked */
427 __HAL_UNLOCK(hdac);
428
429 /* Return function status */
430 return HAL_OK;
431 }
432
433 /**
434 * @brief Disables DAC and stop conversion of channel.
435 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
436 * the configuration information for the specified DAC.
437 * @param Channel: The selected DAC channel.
438 * This parameter can be one of the following values:
439 * @arg DAC_CHANNEL_1: DAC Channel1 selected
440 * @arg DAC_CHANNEL_2: DAC Channel2 selected
441 * @retval HAL status
442 */
443 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel)
444 {
445 /* Check the parameters */
446 assert_param(IS_DAC_CHANNEL(Channel));
447
448 /* Disable the Peripheral */
449 __HAL_DAC_DISABLE(hdac, Channel);
450
451 /* Change DAC state */
452 hdac->State = HAL_DAC_STATE_READY;
453
454 /* Return function status */
455 return HAL_OK;
456 }
457
458 /**
459 * @brief Enables DAC and starts conversion of channel.
460 * Note: For STM32F100x devices with specific feature: DMA underrun.
461 * On these devices, this function enables the interruption of DMA
462 * underrun.
463 * (refer to redefinition of this function in DAC extended file)
464 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
465 * the configuration information for the specified DAC.
466 * @param Channel: The selected DAC channel.
467 * This parameter can be one of the following values:
468 * @arg DAC_CHANNEL_1: DAC Channel1 selected
469 * @arg DAC_CHANNEL_2: DAC Channel2 selected
470 * @param pData: The destination peripheral Buffer address.
471 * @param Length: The length of data to be transferred from memory to DAC peripheral
472 * @param Alignment: Specifies the data alignment for DAC channel.
473 * This parameter can be one of the following values:
474 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
475 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
476 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
477 * @retval HAL status
478 */
479 __weak HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
480 {
481 uint32_t tmpreg = 0;
482
483 /* Check the parameters */
484 assert_param(IS_DAC_CHANNEL(Channel));
485 assert_param(IS_DAC_ALIGN(Alignment));
486
487 /* Process locked */
488 __HAL_LOCK(hdac);
489
490 /* Change DAC state */
491 hdac->State = HAL_DAC_STATE_BUSY;
492
493 if(Channel == DAC_CHANNEL_1)
494 {
495 /* Set the DMA transfer complete callback for channel1 */
496 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
497
498 /* Set the DMA half transfer complete callback for channel1 */
499 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
500
501 /* Set the DMA error callback for channel1 */
502 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
503
504 /* Enable the selected DAC channel1 DMA request */
505 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
506
507 /* Case of use of channel 1 */
508 switch(Alignment)
509 {
510 case DAC_ALIGN_12B_R:
511 /* Get DHR12R1 address */
512 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
513 break;
514 case DAC_ALIGN_12B_L:
515 /* Get DHR12L1 address */
516 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
517 break;
518 case DAC_ALIGN_8B_R:
519 /* Get DHR8R1 address */
520 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
521 break;
522 default:
523 break;
524 }
525 }
526 else
527 {
528 /* Set the DMA transfer complete callback for channel2 */
529 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
530
531 /* Set the DMA half transfer complete callback for channel2 */
532 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
533
534 /* Set the DMA error callback for channel2 */
535 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
536
537 /* Enable the selected DAC channel2 DMA request */
538 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
539
540 /* Case of use of channel 2 */
541 switch(Alignment)
542 {
543 case DAC_ALIGN_12B_R:
544 /* Get DHR12R2 address */
545 tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
546 break;
547 case DAC_ALIGN_12B_L:
548 /* Get DHR12L2 address */
549 tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
550 break;
551 case DAC_ALIGN_8B_R:
552 /* Get DHR8R2 address */
553 tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
554 break;
555 default:
556 break;
557 }
558 }
559
560 /* Enable the DMA channel */
561 if(Channel == DAC_CHANNEL_1)
562 {
563 /* Enable the DMA channel */
564 HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
565 }
566 else
567 {
568 /* Enable the DMA channel */
569 HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
570 }
571
572 /* Process Unlocked */
573 __HAL_UNLOCK(hdac);
574
575 /* Enable the Peripharal */
576 __HAL_DAC_ENABLE(hdac, Channel);
577
578 /* Return function status */
579 return HAL_OK;
580 }
581
582 /**
583 * @brief Disables DAC and stop conversion of channel.
584 * Note: For STM32F100x devices with specific feature: DMA underrun.
585 * On these devices, this function disables the interruption of DMA
586 * underrun.
587 * (refer to redefinition of this function in DAC extended file)
588 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
589 * the configuration information for the specified DAC.
590 * @param Channel: The selected DAC channel.
591 * This parameter can be one of the following values:
592 * @arg DAC_CHANNEL_1: DAC Channel1 selected
593 * @arg DAC_CHANNEL_2: DAC Channel2 selected
594 * @retval HAL status
595 */
596 __weak HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel)
597 {
598 HAL_StatusTypeDef status = HAL_OK;
599
600 /* Check the parameters */
601 assert_param(IS_DAC_CHANNEL(Channel));
602
603 /* Disable the selected DAC channel DMA request */
604 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1 << Channel);
605
606 /* Disable the Peripharal */
607 __HAL_DAC_DISABLE(hdac, Channel);
608
609 /* Disable the DMA Channel */
610 /* Channel1 is used */
611 if (Channel == DAC_CHANNEL_1)
612 {
613 status = HAL_DMA_Abort(hdac->DMA_Handle1);
614 }
615 else /* Channel2 is used for */
616 {
617 status = HAL_DMA_Abort(hdac->DMA_Handle2);
618 }
619
620 /* Check if DMA Channel effectively disabled */
621 if (status != HAL_OK)
622 {
623 /* Update ADC state machine to error */
624 hdac->State = HAL_DAC_STATE_ERROR;
625 }
626 else
627 {
628 /* Change DAC state */
629 hdac->State = HAL_DAC_STATE_READY;
630 }
631
632 /* Return function status */
633 return status;
634 }
635
636 /**
637 * @brief Returns the last data output value of the selected DAC channel.
638 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
639 * the configuration information for the specified DAC.
640 * @param Channel: The selected DAC channel.
641 * This parameter can be one of the following values:
642 * @arg DAC_CHANNEL_1: DAC Channel1 selected
643 * @arg DAC_CHANNEL_2: DAC Channel2 selected
644 * @retval The selected DAC channel data output value.
645 */
646 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
647 {
648 /* Check the parameters */
649 assert_param(IS_DAC_CHANNEL(Channel));
650
651 /* Returns the DAC channel data output register value */
652 if(Channel == DAC_CHANNEL_1)
653 {
654 return hdac->Instance->DOR1;
655 }
656 else
657 {
658 return hdac->Instance->DOR2;
659 }
660 }
661
662 /**
663 * @brief Conversion complete callback in non blocking mode for Channel1
664 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
665 * the configuration information for the specified DAC.
666 * @retval None
667 */
668 __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac)
669 {
670 /* NOTE : This function Should not be modified, when the callback is needed,
671 the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file
672 */
673 }
674
675 /**
676 * @brief Conversion half DMA transfer callback in non blocking mode for Channel1
677 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
678 * the configuration information for the specified DAC.
679 * @retval None
680 */
681 __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac)
682 {
683 /* NOTE : This function Should not be modified, when the callback is needed,
684 the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file
685 */
686 }
687
688 /**
689 * @brief Error DAC callback for Channel1.
690 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
691 * the configuration information for the specified DAC.
692 * @retval None
693 */
694 __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
695 {
696 /* NOTE : This function Should not be modified, when the callback is needed,
697 the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file
698 */
699 }
700
701 /**
702 * @}
703 */
704
705 /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
706 * @brief Peripheral Control functions
707 *
708 @verbatim
709 ==============================================================================
710 ##### Peripheral Control functions #####
711 ==============================================================================
712 [..] This section provides functions allowing to:
713 (+) Configure channels.
714 (+) Set the specified data holding register value for DAC channel.
715
716 @endverbatim
717 * @{
718 */
719
720 /**
721 * @brief Configures the selected DAC channel.
722 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
723 * the configuration information for the specified DAC.
724 * @param sConfig: DAC configuration structure.
725 * @param Channel: The selected DAC channel.
726 * This parameter can be one of the following values:
727 * @arg DAC_CHANNEL_1: DAC Channel1 selected
728 * @arg DAC_CHANNEL_2: DAC Channel2 selected
729 * @retval HAL status
730 */
731 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel)
732 {
733 uint32_t tmpreg1 = 0;
734
735 /* Check the DAC parameters */
736 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
737 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
738 assert_param(IS_DAC_CHANNEL(Channel));
739
740 /* Process locked */
741 __HAL_LOCK(hdac);
742
743 /* Change DAC state */
744 hdac->State = HAL_DAC_STATE_BUSY;
745
746 /* Configure for the selected DAC channel: buffer output, trigger */
747 /* Set TSELx and TENx bits according to DAC_Trigger value */
748 /* Set BOFFx bit according to DAC_OutputBuffer value */
749 SET_BIT(tmpreg1, (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer));
750
751 /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
752 /* Calculate CR register value depending on DAC_Channel */
753 MODIFY_REG(hdac->Instance->CR,
754 ((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel,
755 tmpreg1 << Channel);
756
757 /* Disable wave generation */
758 hdac->Instance->CR &= ~(DAC_CR_WAVE1 << Channel);
759
760 /* Change DAC state */
761 hdac->State = HAL_DAC_STATE_READY;
762
763 /* Process unlocked */
764 __HAL_UNLOCK(hdac);
765
766 /* Return function status */
767 return HAL_OK;
768 }
769
770 /**
771 * @brief Set the specified data holding register value for DAC channel.
772 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
773 * the configuration information for the specified DAC.
774 * @param Channel: The selected DAC channel.
775 * This parameter can be one of the following values:
776 * @arg DAC_CHANNEL_1: DAC Channel1 selected
777 * @arg DAC_CHANNEL_2: DAC Channel2 selected
778 * @param Alignment: Specifies the data alignment.
779 * This parameter can be one of the following values:
780 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
781 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
782 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
783 * @param Data: Data to be loaded in the selected data holding register.
784 * @retval HAL status
785 */
786 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
787 {
788 __IO uint32_t tmp = 0;
789
790 /* Check the parameters */
791 assert_param(IS_DAC_CHANNEL(Channel));
792 assert_param(IS_DAC_ALIGN(Alignment));
793 assert_param(IS_DAC_DATA(Data));
794
795 tmp = (uint32_t)hdac->Instance;
796 if(Channel == DAC_CHANNEL_1)
797 {
798 tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
799 }
800 else
801 {
802 tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
803 }
804
805 /* Set the DAC channel selected data holding register */
806 *(__IO uint32_t *) tmp = Data;
807
808 /* Return function status */
809 return HAL_OK;
810 }
811
812 /**
813 * @}
814 */
815
816 /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
817 * @brief Peripheral State and Errors functions
818 *
819 @verbatim
820 ==============================================================================
821 ##### Peripheral State and Errors functions #####
822 ==============================================================================
823 [..]
824 This subsection provides functions allowing to
825 (+) Check the DAC state.
826 (+) Check the DAC Errors.
827
828 @endverbatim
829 * @{
830 */
831
832 /**
833 * @brief return the DAC state
834 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
835 * the configuration information for the specified DAC.
836 * @retval HAL state
837 */
838 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac)
839 {
840 /* Return DAC state */
841 return hdac->State;
842 }
843
844
845 /**
846 * @brief Return the DAC error code
847 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
848 * the configuration information for the specified DAC.
849 * @retval DAC Error Code
850 */
851 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac)
852 {
853 return hdac->ErrorCode;
854 }
855
856 /**
857 * @}
858 */
859
860 /**
861 * @}
862 */
863
864 /** @addtogroup DAC_Private_Functions
865 * @{
866 */
867
868 /**
869 * @brief DMA conversion complete callback.
870 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
871 * the configuration information for the specified DMA module.
872 * @retval None
873 */
874 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
875 {
876 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
877
878 HAL_DAC_ConvCpltCallbackCh1(hdac);
879
880 hdac->State = HAL_DAC_STATE_READY;
881 }
882
883 /**
884 * @brief DMA half transfer complete callback.
885 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
886 * the configuration information for the specified DMA module.
887 * @retval None
888 */
889 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
890 {
891 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
892 /* Conversion complete callback */
893 HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
894 }
895
896 /**
897 * @brief DMA error callback
898 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
899 * the configuration information for the specified DMA module.
900 * @retval None
901 */
902 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
903 {
904 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
905
906 /* Set DAC error code to DMA error */
907 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
908
909 HAL_DAC_ErrorCallbackCh1(hdac);
910
911 hdac->State = HAL_DAC_STATE_READY;
912 }
913
914 /**
915 * @}
916 */
917
918 #endif /* STM32F100xB || STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
919 #endif /* HAL_DAC_MODULE_ENABLED */
920
921 /**
922 * @}
923 */
924
925 /**
926 * @}
927 */
928
929 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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