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[tmk_keyboard.git] / tool / mbed / mbed-sdk / libraries / mbed / targets / cmsis / TARGET_STM / TARGET_STM32F1 / stm32f1xx_hal_i2c.c
1 /**
2 ******************************************************************************
3 * @file stm32f1xx_hal_i2c.c
4 * @author MCD Application Team
5 * @version V1.0.0
6 * @date 15-December-2014
7 * @brief I2C HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the Inter Integrated Circuit (I2C) peripheral:
10 * + Initialization and de-initialization functions
11 * + IO operation functions
12 * + Peripheral Control functions
13 * + Peripheral State functions
14 *
15 @verbatim
16 ==============================================================================
17 ##### How to use this driver #####
18 ==============================================================================
19 [..]
20 The I2C HAL driver can be used as follows:
21
22 (#) Declare a I2C_HandleTypeDef handle structure, for example:
23 I2C_HandleTypeDef hi2c;
24
25 (#)Initialize the I2C low level resources by implement the HAL_I2C_MspInit() API:
26 (##) Enable the I2Cx interface clock
27 (##) I2C pins configuration
28 (+++) Enable the clock for the I2C GPIOs
29 (+++) Configure I2C pins as alternate function open-drain
30 (##) NVIC configuration if you need to use interrupt process
31 (+++) Configure the I2Cx interrupt priority
32 (+++) Enable the NVIC I2C IRQ Channel
33 (##) DMA Configuration if you need to use DMA process
34 (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel
35 (+++) Enable the DMAx interface clock using
36 (+++) Configure the DMA handle parameters
37 (+++) Configure the DMA Tx or Rx channel
38 (+++) Associate the initilalized DMA handle to the hi2c DMA Tx or Rx handle
39 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
40 the DMA Tx or Rx channel
41
42 (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
43 Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
44
45 (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
46 (GPIO, CLOCK, NVIC...etc) by calling the customed HAL_I2C_MspInit(&hi2c) API.
47
48 (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
49
50 (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
51
52 *** Polling mode IO operation ***
53 =================================
54 [..]
55 (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
56 (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
57 (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
58 (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
59
60 *** Polling mode IO MEM operation ***
61 =====================================
62 [..]
63 (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
64 (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
65
66
67 *** Interrupt mode IO operation ***
68 ===================================
69 [..]
70 (+) The I2C interrupts should have the highest priority in the application in order
71 to make them uninterruptible.
72 (+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT()
73 (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
74 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
75 (+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT()
76 (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
77 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
78 (+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT()
79 (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
80 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
81 (+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT()
82 (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
83 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
84 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
85 add his own code by customization of function pointer HAL_I2C_ErrorCallback
86
87 *** Interrupt mode IO MEM operation ***
88 =======================================
89 [..]
90 (+) The I2C interrupts should have the highest priority in the application in order
91 to make them uninterruptible.
92 (+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using
93 HAL_I2C_Mem_Write_IT()
94 (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
95 add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
96 (+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using
97 HAL_I2C_Mem_Read_IT()
98 (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
99 add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
100 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
101 add his own code by customization of function pointer HAL_I2C_ErrorCallback
102
103 *** DMA mode IO operation ***
104 ==============================
105 [..]
106 (+) Transmit in master mode an amount of data in non blocking mode (DMA) using
107 HAL_I2C_Master_Transmit_DMA()
108 (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
109 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
110 (+) Receive in master mode an amount of data in non blocking mode (DMA) using
111 HAL_I2C_Master_Receive_DMA()
112 (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
113 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
114 (+) Transmit in slave mode an amount of data in non blocking mode (DMA) using
115 HAL_I2C_Slave_Transmit_DMA()
116 (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
117 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
118 (+) Receive in slave mode an amount of data in non blocking mode (DMA) using
119 HAL_I2C_Slave_Receive_DMA()
120 (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
121 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
122 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
123 add his own code by customization of function pointer HAL_I2C_ErrorCallback
124
125 *** DMA mode IO MEM operation ***
126 =================================
127 [..]
128 (+) Write an amount of data in no-blocking mode with DMA to a specific memory address using
129 HAL_I2C_Mem_Write_DMA()
130 (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
131 add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
132 (+) Read an amount of data in no-blocking mode with DMA from a specific memory address using
133 HAL_I2C_Mem_Read_DMA()
134 (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
135 add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
136 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
137 add his own code by customization of function pointer HAL_I2C_ErrorCallback
138
139
140 *** I2C HAL driver macros list ***
141 ==================================
142 [..]
143 Below the list of most used macros in I2C HAL driver.
144
145 (+) __HAL_I2C_ENABLE: Enable the I2C peripheral
146 (+) __HAL_I2C_DISABLE: Disable the I2C peripheral
147 (+) __HAL_I2C_GET_FLAG : Checks whether the specified I2C flag is set or not
148 (+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag
149 (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
150 (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
151 (@) You can refer to the I2C HAL driver header file for more useful macros
152
153
154 *** I2C Workarounds linked to Silicon Limitation ***
155 ====================================================
156 [..]
157 Below the list of all silicon limitations implemented for HAL on STM32F1xx product.
158 (@) See ErrataSheet to know full silicon limitation list of your product.
159
160 (#) Workarounds Implemented inside I2C HAL Driver
161 (##) Wrong data read into data register (Polling and Interrupt mode)
162 (##) Start cannot be generated after a misplaced Stop
163 (##) Some software events must be managed before the current byte is being transferred:
164 Workaround: Use DMA in general, except when the Master is receiving a single byte.
165 For Interupt mode, I2C should have the highest priority in the application.
166 (##) Mismatch on the "Setup time for a repeated Start condition" timing parameter:
167 Workaround: Reduce the frequency down to 88 kHz or use the I2C Fast-mode if
168 supported by the slave.
169 (##) Data valid time (tVD;DAT) violated without the OVR flag being set:
170 Workaround: If the slave device allows it, use the clock stretching mechanism
171 by programming NoStretchMode = I2C_NOSTRETCH_DISABLE in HAL_I2C_Init.
172
173 @endverbatim
174 ******************************************************************************
175 * @attention
176 *
177 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
178 *
179 * Redistribution and use in source and binary forms, with or without modification,
180 * are permitted provided that the following conditions are met:
181 * 1. Redistributions of source code must retain the above copyright notice,
182 * this list of conditions and the following disclaimer.
183 * 2. Redistributions in binary form must reproduce the above copyright notice,
184 * this list of conditions and the following disclaimer in the documentation
185 * and/or other materials provided with the distribution.
186 * 3. Neither the name of STMicroelectronics nor the names of its contributors
187 * may be used to endorse or promote products derived from this software
188 * without specific prior written permission.
189 *
190 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
191 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
192 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
193 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
194 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
195 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
196 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
197 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
198 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
199 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
200 *
201 ******************************************************************************
202 */
203
204 /* Includes ------------------------------------------------------------------*/
205 #include "stm32f1xx_hal.h"
206
207 /** @addtogroup STM32F1xx_HAL_Driver
208 * @{
209 */
210
211 /** @defgroup I2C I2C
212 * @brief I2C HAL module driver
213 * @{
214 */
215
216 #ifdef HAL_I2C_MODULE_ENABLED
217
218 /* Private typedef -----------------------------------------------------------*/
219 /* Private constants ---------------------------------------------------------*/
220 /** @addtogroup I2C_Private_Constants I2C Private Constants
221 * @{
222 */
223 #define I2C_TIMEOUT_FLAG ((uint32_t)35) /* 35 ms */
224 #define I2C_TIMEOUT_ADDR_SLAVE ((uint32_t)10000) /* 10 s */
225 /**
226 * @}
227 */
228
229 /* Private macro -------------------------------------------------------------*/
230 /* Private variables ---------------------------------------------------------*/
231 /* Private function prototypes -----------------------------------------------*/
232 /** @addtogroup I2C_Private_Functions I2C Private Functions
233 * @{
234 */
235 static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma);
236 static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma);
237 static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma);
238 static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma);
239 static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma);
240 static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma);
241 static void I2C_DMAError(DMA_HandleTypeDef *hdma);
242
243 static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout);
244 static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout);
245 static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
246 static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
247 static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
248 static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout);
249
250 static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
251 static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
252 static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
253 static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
254
255 static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
256 static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
257 static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
258 static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
259 static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c);
260 static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
261 static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
262
263 static uint32_t I2C_Configure_Speed(I2C_HandleTypeDef *hi2c, uint32_t I2CClkSrcFreq);
264 /**
265 * @}
266 */
267
268 /* Exported functions ---------------------------------------------------------*/
269
270 /** @defgroup I2C_Exported_Functions I2C Exported Functions
271 * @{
272 */
273
274 /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
275 * @brief Initialization and Configuration functions
276 *
277 @verbatim
278 ===============================================================================
279 ##### Initialization and de-initialization functions #####
280 ===============================================================================
281 [..] This subsection provides a set of functions allowing to initialize and
282 de-initialiaze the I2Cx peripheral:
283
284 (+) User must Implement HAL_I2C_MspInit() function in which he configures
285 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC).
286
287 (+) Call the function HAL_I2C_Init() to configure the selected device with
288 the selected configuration:
289 (++) Communication Speed
290 (++) Duty cycle
291 (++) Addressing mode
292 (++) Own Address 1
293 (++) Dual Addressing mode
294 (++) Own Address 2
295 (++) General call mode
296 (++) Nostretch mode
297
298 (+) Call the function HAL_I2C_DeInit() to restore the default configuration
299 of the selected I2Cx periperal.
300
301 @endverbatim
302 * @{
303 */
304
305 /**
306 * @brief Initializes the I2C according to the specified parameters
307 * in the I2C_InitTypeDef and create the associated handle.
308 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
309 * the configuration information for the specified I2C.
310 * @retval HAL status
311 */
312 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
313 {
314 uint32_t freqrange = 0;
315 uint32_t pclk1 = 0;
316
317 /* Check the I2C handle allocation */
318 if(hi2c == NULL)
319 {
320 return HAL_ERROR;
321 }
322
323 /* Check the parameters */
324 assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
325 assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
326 assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
327 assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
328 assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
329 assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
330 assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
331 assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
332 assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
333
334 if(hi2c->State == HAL_I2C_STATE_RESET)
335 {
336 /* Allocate lock resource and initialize it */
337 hi2c-> Lock = HAL_UNLOCKED;
338
339 /* Init the low level hardware : GPIO, CLOCK, NVIC */
340 HAL_I2C_MspInit(hi2c);
341 }
342
343 hi2c->State = HAL_I2C_STATE_BUSY;
344
345 /* Disable the selected I2C peripheral */
346 __HAL_I2C_DISABLE(hi2c);
347
348 /* Get PCLK1 frequency */
349 pclk1 = HAL_RCC_GetPCLK1Freq();
350
351 /* Calculate frequency range */
352 freqrange = I2C_FREQ_RANGE(pclk1);
353
354 /*---------------------------- I2Cx CR2 Configuration ----------------------*/
355 /* Configure I2Cx: Frequency range */
356 hi2c->Instance->CR2 = freqrange;
357
358 /*---------------------------- I2Cx TRISE Configuration --------------------*/
359 /* Configure I2Cx: Rise Time */
360 hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
361
362 /*---------------------------- I2Cx CCR Configuration ----------------------*/
363 /* Configure I2Cx: Speed */
364 hi2c->Instance->CCR = I2C_Configure_Speed(hi2c, pclk1);
365
366 /*---------------------------- I2Cx CR1 Configuration ----------------------*/
367 /* Configure I2Cx: Generalcall and NoStretch mode */
368 hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
369
370 /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
371 /* Configure I2Cx: Own Address1 and addressing mode */
372 hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1);
373
374 /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
375 /* Configure I2Cx: Dual mode and Own Address2 */
376 hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2);
377
378 /* Enable the selected I2C peripheral */
379 __HAL_I2C_ENABLE(hi2c);
380
381 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
382 hi2c->State = HAL_I2C_STATE_READY;
383
384 return HAL_OK;
385 }
386
387 /**
388 * @brief DeInitializes the I2C peripheral.
389 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
390 * the configuration information for the specified I2C.
391 * @retval HAL status
392 */
393 HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
394 {
395 /* Check the I2C handle allocation */
396 if(hi2c == NULL)
397 {
398 return HAL_ERROR;
399 }
400
401 /* Check the parameters */
402 assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
403
404 hi2c->State = HAL_I2C_STATE_BUSY;
405
406 /* Disable the I2C Peripheral Clock */
407 __HAL_I2C_DISABLE(hi2c);
408
409 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
410 HAL_I2C_MspDeInit(hi2c);
411
412 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
413
414 hi2c->State = HAL_I2C_STATE_RESET;
415
416 /* Release Lock */
417 __HAL_UNLOCK(hi2c);
418
419 return HAL_OK;
420 }
421
422 /**
423 * @brief I2C MSP Init.
424 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
425 * the configuration information for the specified I2C.
426 * @retval None
427 */
428 __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
429 {
430 /* NOTE : This function Should not be modified, when the callback is needed,
431 the HAL_I2C_MspInit could be implemented in the user file
432 */
433 }
434
435 /**
436 * @brief I2C MSP DeInit
437 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
438 * the configuration information for the specified I2C.
439 * @retval None
440 */
441 __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
442 {
443 /* NOTE : This function Should not be modified, when the callback is needed,
444 the HAL_I2C_MspDeInit could be implemented in the user file
445 */
446 }
447
448 /**
449 * @}
450 */
451
452 /** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions
453 * @brief Data transfers functions
454 *
455 @verbatim
456 ===============================================================================
457 ##### IO operation functions #####
458 ===============================================================================
459 [..]
460 This subsection provides a set of functions allowing to manage the I2C data
461 transfers.
462
463 (#) There are two modes of transfer:
464 (++) Blocking mode : The communication is performed in the polling mode.
465 The status of all data processing is returned by the same function
466 after finishing transfer.
467 (++) No-Blocking mode : The communication is performed using Interrupts
468 or DMA. These functions return the status of the transfer startup.
469 The end of the data processing will be indicated through the
470 dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
471 using DMA mode.
472
473 (#) Blocking mode functions are :
474 (++) HAL_I2C_Master_Transmit()
475 (++) HAL_I2C_Master_Receive()
476 (++) HAL_I2C_Slave_Transmit()
477 (++) HAL_I2C_Slave_Receive()
478 (++) HAL_I2C_Mem_Write()
479 (++) HAL_I2C_Mem_Read()
480 (++) HAL_I2C_IsDeviceReady()
481
482 (#) No-Blocking mode functions with Interrupt are :
483 (++) HAL_I2C_Master_Transmit_IT()
484 (++) HAL_I2C_Master_Receive_IT()
485 (++) HAL_I2C_Slave_Transmit_IT()
486 (++) HAL_I2C_Slave_Receive_IT()
487 (++) HAL_I2C_Mem_Write_IT()
488 (++) HAL_I2C_Mem_Read_IT()
489
490 (#) No-Blocking mode functions with DMA are :
491 (++) HAL_I2C_Master_Transmit_DMA()
492 (++) HAL_I2C_Master_Receive_DMA()
493 (++) HAL_I2C_Slave_Transmit_DMA()
494 (++) HAL_I2C_Slave_Receive_DMA()
495 (++) HAL_I2C_Mem_Write_DMA()
496 (++) HAL_I2C_Mem_Read_DMA()
497
498 (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
499 (++) HAL_I2C_MemTxCpltCallback()
500 (++) HAL_I2C_MemRxCpltCallback()
501 (++) HAL_I2C_MasterTxCpltCallback()
502 (++) HAL_I2C_MasterRxCpltCallback()
503 (++) HAL_I2C_SlaveTxCpltCallback()
504 (++) HAL_I2C_SlaveRxCpltCallback()
505 (++) HAL_I2C_ErrorCallback()
506
507 @endverbatim
508 * @{
509 */
510
511 /**
512 * @brief Transmits in master mode an amount of data in blocking mode.
513 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
514 * the configuration information for the specified I2C.
515 * @param DevAddress: Target device address
516 * @param pData: Pointer to data buffer
517 * @param Size: Amount of data to be sent
518 * @param Timeout: Timeout duration
519 * @retval HAL status
520 */
521 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
522 {
523 if(hi2c->State == HAL_I2C_STATE_READY)
524 {
525 if((pData == NULL) || (Size == 0))
526 {
527 return HAL_ERROR;
528 }
529
530 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
531 {
532 return HAL_BUSY;
533 }
534
535 /* Process Locked */
536 __HAL_LOCK(hi2c);
537
538 hi2c->State = HAL_I2C_STATE_BUSY_TX;
539 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
540
541 /* Send Slave Address */
542 if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout) != HAL_OK)
543 {
544 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
545 {
546 /* Process Unlocked */
547 __HAL_UNLOCK(hi2c);
548 return HAL_ERROR;
549 }
550 else
551 {
552 /* Process Unlocked */
553 __HAL_UNLOCK(hi2c);
554 return HAL_TIMEOUT;
555 }
556 }
557
558 /* Clear ADDR flag */
559 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
560
561 while(Size > 0)
562 {
563 /* Wait until TXE flag is set */
564 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
565 {
566 return HAL_TIMEOUT;
567 }
568
569 /* Write data to DR */
570 hi2c->Instance->DR = (*pData++);
571 Size--;
572
573 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
574 {
575 /* Write data to DR */
576 hi2c->Instance->DR = (*pData++);
577 Size--;
578 }
579 }
580
581 /* Wait until TXE flag is set */
582 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
583 {
584 return HAL_TIMEOUT;
585 }
586
587 /* Generate Stop */
588 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
589
590 /* Wait until BUSY flag is reset */
591 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
592 {
593 return HAL_TIMEOUT;
594 }
595
596 hi2c->State = HAL_I2C_STATE_READY;
597
598 /* Process Unlocked */
599 __HAL_UNLOCK(hi2c);
600
601 return HAL_OK;
602 }
603 else
604 {
605 return HAL_BUSY;
606 }
607 }
608
609 /**
610 * @brief Receives in master mode an amount of data in blocking mode.
611 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
612 * the configuration information for the specified I2C.
613 * @param DevAddress: Target device address
614 * @param pData: Pointer to data buffer
615 * @param Size: Amount of data to be sent
616 * @param Timeout: Timeout duration
617 * @retval HAL status
618 */
619 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
620 {
621 if(hi2c->State == HAL_I2C_STATE_READY)
622 {
623 if((pData == NULL) || (Size == 0))
624 {
625 return HAL_ERROR;
626 }
627
628 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
629 {
630 return HAL_BUSY;
631 }
632
633 /* Process Locked */
634 __HAL_LOCK(hi2c);
635
636 hi2c->State = HAL_I2C_STATE_BUSY_RX;
637 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
638
639 /* Send Slave Address */
640 if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout) != HAL_OK)
641 {
642 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
643 {
644 /* Process Unlocked */
645 __HAL_UNLOCK(hi2c);
646 return HAL_ERROR;
647 }
648 else
649 {
650 /* Process Unlocked */
651 __HAL_UNLOCK(hi2c);
652 return HAL_TIMEOUT;
653 }
654 }
655
656 if(Size == 1)
657 {
658 /* Disable Acknowledge */
659 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
660
661 /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
662 software sequence must complete before the current byte end of transfer */
663 __disable_irq();
664
665 /* Clear ADDR flag */
666 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
667
668 /* Generate Stop */
669 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
670
671 /* Re-enable IRQs */
672 __enable_irq();
673 }
674 else if(Size == 2)
675 {
676 /* Enable Pos */
677 SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
678
679 /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
680 software sequence must complete before the current byte end of transfer */
681 __disable_irq();
682
683 /* Clear ADDR flag */
684 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
685
686 /* Disable Acknowledge */
687 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
688
689 /* Re-enable IRQs */
690 __enable_irq();
691 }
692 else
693 {
694 /* Enable Acknowledge */
695 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
696
697 /* Clear ADDR flag */
698 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
699 }
700
701 while(Size > 0)
702 {
703 if(Size <= 3)
704 {
705 /* One byte */
706 if(Size == 1)
707 {
708 /* Wait until RXNE flag is set */
709 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
710 {
711 return HAL_TIMEOUT;
712 }
713
714 /* Read data from DR */
715 (*pData++) = hi2c->Instance->DR;
716 Size--;
717 }
718 /* Two bytes */
719 else if(Size == 2)
720 {
721 /* Wait until BTF flag is set */
722 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
723 {
724 return HAL_TIMEOUT;
725 }
726
727 /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
728 software sequence must complete before the current byte end of transfer */
729 __disable_irq();
730
731 /* Generate Stop */
732 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
733
734 /* Read data from DR */
735 (*pData++) = hi2c->Instance->DR;
736 Size--;
737
738 /* Re-enable IRQs */
739 __enable_irq();
740
741 /* Read data from DR */
742 (*pData++) = hi2c->Instance->DR;
743 Size--;
744 }
745 /* 3 Last bytes */
746 else
747 {
748 /* Wait until BTF flag is set */
749 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
750 {
751 return HAL_TIMEOUT;
752 }
753
754 /* Disable Acknowledge */
755 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
756
757 /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
758 software sequence must complete before the current byte end of transfer */
759 __disable_irq();
760
761 /* Read data from DR */
762 (*pData++) = hi2c->Instance->DR;
763 Size--;
764
765 /* Wait until BTF flag is set */
766 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
767 {
768 return HAL_TIMEOUT;
769 }
770
771 /* Generate Stop */
772 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
773
774 /* Read data from DR */
775 (*pData++) = hi2c->Instance->DR;
776 Size--;
777
778 /* Re-enable IRQs */
779 __enable_irq();
780
781 /* Wait until RXNE flag is set */
782 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
783 {
784 return HAL_TIMEOUT;
785 }
786
787 /* Read data from DR */
788 (*pData++) = hi2c->Instance->DR;
789 Size--;
790 }
791 }
792 else
793 {
794 /* Wait until RXNE flag is set */
795 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
796 {
797 return HAL_TIMEOUT;
798 }
799
800 /* Read data from DR */
801 (*pData++) = hi2c->Instance->DR;
802 Size--;
803
804 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
805 {
806 /* Read data from DR */
807 (*pData++) = hi2c->Instance->DR;
808 Size--;
809 }
810 }
811 }
812
813 /* Disable Pos */
814 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
815
816 /* Wait until BUSY flag is reset */
817 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
818 {
819 return HAL_TIMEOUT;
820 }
821
822 hi2c->State = HAL_I2C_STATE_READY;
823
824 /* Process Unlocked */
825 __HAL_UNLOCK(hi2c);
826
827 return HAL_OK;
828 }
829 else
830 {
831 return HAL_BUSY;
832 }
833 }
834
835 /**
836 * @brief Transmits in slave mode an amount of data in blocking mode.
837 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
838 * the configuration information for the specified I2C.
839 * @param pData: Pointer to data buffer
840 * @param Size: Amount of data to be sent
841 * @param Timeout: Timeout duration
842 * @retval HAL status
843 */
844 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
845 {
846 if(hi2c->State == HAL_I2C_STATE_READY)
847 {
848 if((pData == NULL) || (Size == 0))
849 {
850 return HAL_ERROR;
851 }
852
853 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
854 {
855 return HAL_BUSY;
856 }
857
858 /* Process Locked */
859 __HAL_LOCK(hi2c);
860
861 hi2c->State = HAL_I2C_STATE_BUSY_TX;
862 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
863
864 /* Enable Address Acknowledge */
865 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
866
867 /* Wait until ADDR flag is set */
868 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
869 {
870 return HAL_TIMEOUT;
871 }
872
873 /* Clear ADDR flag */
874 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
875
876 /* If 10bit addressing mode is selected */
877 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
878 {
879 /* Wait until ADDR flag is set */
880 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
881 {
882 return HAL_TIMEOUT;
883 }
884
885 /* Clear ADDR flag */
886 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
887 }
888
889 while(Size > 0)
890 {
891 /* Wait until TXE flag is set */
892 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
893 {
894 return HAL_TIMEOUT;
895 }
896
897 /* Write data to DR */
898 hi2c->Instance->DR = (*pData++);
899 Size--;
900
901 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
902 {
903 /* Write data to DR */
904 hi2c->Instance->DR = (*pData++);
905 Size--;
906 }
907 }
908
909 /* Wait until AF flag is set */
910 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout) != HAL_OK)
911 {
912 return HAL_TIMEOUT;
913 }
914
915 /* Clear AF flag */
916 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
917
918 /* Disable Address Acknowledge */
919 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
920
921 /* Wait until BUSY flag is reset */
922 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
923 {
924 return HAL_TIMEOUT;
925 }
926
927 hi2c->State = HAL_I2C_STATE_READY;
928
929 /* Process Unlocked */
930 __HAL_UNLOCK(hi2c);
931
932 return HAL_OK;
933 }
934 else
935 {
936 return HAL_BUSY;
937 }
938 }
939
940 /**
941 * @brief Receive in slave mode an amount of data in blocking mode
942 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
943 * the configuration information for the specified I2C.
944 * @param pData: Pointer to data buffer
945 * @param Size: Amount of data to be sent
946 * @param Timeout: Timeout duration
947 * @retval HAL status
948 */
949 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
950 {
951 if(hi2c->State == HAL_I2C_STATE_READY)
952 {
953 if((pData == NULL) || (Size == 0))
954 {
955 return HAL_ERROR;
956 }
957
958 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
959 {
960 return HAL_BUSY;
961 }
962
963 /* Process Locked */
964 __HAL_LOCK(hi2c);
965
966 hi2c->State = HAL_I2C_STATE_BUSY_RX;
967 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
968
969 /* Enable Address Acknowledge */
970 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
971
972 /* Wait until ADDR flag is set */
973 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
974 {
975 return HAL_TIMEOUT;
976 }
977
978 /* Clear ADDR flag */
979 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
980
981 while(Size > 0)
982 {
983 /* Wait until RXNE flag is set */
984 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
985 {
986 return HAL_TIMEOUT;
987 }
988
989 /* Read data from DR */
990 (*pData++) = hi2c->Instance->DR;
991 Size--;
992
993 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
994 {
995 /* Read data from DR */
996 (*pData++) = hi2c->Instance->DR;
997 Size--;
998 }
999 }
1000
1001 /* Wait until STOP flag is set */
1002 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK)
1003 {
1004 return HAL_TIMEOUT;
1005 }
1006
1007 /* Clear STOP flag */
1008 __HAL_I2C_CLEAR_STOPFLAG(hi2c);
1009
1010 /* Disable Address Acknowledge */
1011 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1012
1013 /* Wait until BUSY flag is reset */
1014 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
1015 {
1016 return HAL_TIMEOUT;
1017 }
1018
1019 hi2c->State = HAL_I2C_STATE_READY;
1020
1021 /* Process Unlocked */
1022 __HAL_UNLOCK(hi2c);
1023
1024 return HAL_OK;
1025 }
1026 else
1027 {
1028 return HAL_BUSY;
1029 }
1030 }
1031
1032
1033 /**
1034 * @brief Transmit in master mode an amount of data in no-blocking mode with Interrupt
1035 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
1036 * the configuration information for the specified I2C.
1037 * @param DevAddress: Target device address
1038 * @param pData: Pointer to data buffer
1039 * @param Size: Amount of data to be sent
1040 * @retval HAL status
1041 */
1042 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
1043 {
1044 if(hi2c->State == HAL_I2C_STATE_READY)
1045 {
1046 if((pData == NULL) || (Size == 0))
1047 {
1048 return HAL_ERROR;
1049 }
1050
1051 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1052 {
1053 return HAL_BUSY;
1054 }
1055
1056 /* Process Locked */
1057 __HAL_LOCK(hi2c);
1058
1059 hi2c->State = HAL_I2C_STATE_BUSY_TX;
1060 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1061
1062 hi2c->pBuffPtr = pData;
1063 hi2c->XferSize = Size;
1064 hi2c->XferCount = Size;
1065
1066 /* Send Slave Address */
1067 if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
1068 {
1069 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1070 {
1071 /* Process Unlocked */
1072 __HAL_UNLOCK(hi2c);
1073 return HAL_ERROR;
1074 }
1075 else
1076 {
1077 /* Process Unlocked */
1078 __HAL_UNLOCK(hi2c);
1079 return HAL_TIMEOUT;
1080 }
1081 }
1082
1083 /* Clear ADDR flag */
1084 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1085
1086 /* Process Unlocked */
1087 __HAL_UNLOCK(hi2c);
1088
1089 /* Note : The I2C interrupts must be enabled after unlocking current process
1090 to avoid the risk of I2C interrupt handle execution before current
1091 process unlock */
1092
1093 /* Enable EVT, BUF and ERR interrupt */
1094 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1095
1096 return HAL_OK;
1097 }
1098 else
1099 {
1100 return HAL_BUSY;
1101 }
1102 }
1103
1104 /**
1105 * @brief Receive in master mode an amount of data in no-blocking mode with Interrupt
1106 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
1107 * the configuration information for the specified I2C.
1108 * @param DevAddress: Target device address
1109 * @param pData: Pointer to data buffer
1110 * @param Size: Amount of data to be sent
1111 * @retval HAL status
1112 */
1113 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
1114 {
1115 if(hi2c->State == HAL_I2C_STATE_READY)
1116 {
1117 if((pData == NULL) || (Size == 0))
1118 {
1119 return HAL_ERROR;
1120 }
1121
1122 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1123 {
1124 return HAL_BUSY;
1125 }
1126
1127 /* Process Locked */
1128 __HAL_LOCK(hi2c);
1129
1130 hi2c->State = HAL_I2C_STATE_BUSY_RX;
1131 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1132
1133 hi2c->pBuffPtr = pData;
1134 hi2c->XferSize = Size;
1135 hi2c->XferCount = Size;
1136
1137 /* Send Slave Address */
1138 if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
1139 {
1140 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1141 {
1142 /* Process Unlocked */
1143 __HAL_UNLOCK(hi2c);
1144 return HAL_ERROR;
1145 }
1146 else
1147 {
1148 /* Process Unlocked */
1149 __HAL_UNLOCK(hi2c);
1150 return HAL_TIMEOUT;
1151 }
1152 }
1153
1154 if(hi2c->XferCount == 1)
1155 {
1156 /* Disable Acknowledge */
1157 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1158
1159 /* Clear ADDR flag */
1160 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1161
1162 /* Generate Stop */
1163 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
1164 }
1165 else if(hi2c->XferCount == 2)
1166 {
1167 /* Disable Acknowledge */
1168 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1169
1170 /* Enable Pos */
1171 SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
1172
1173 /* Clear ADDR flag */
1174 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1175 }
1176 else
1177 {
1178 /* Enable Acknowledge */
1179 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1180
1181 /* Clear ADDR flag */
1182 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1183 }
1184
1185 /* Process Unlocked */
1186 __HAL_UNLOCK(hi2c);
1187
1188 /* Note : The I2C interrupts must be enabled after unlocking current process
1189 to avoid the risk of I2C interrupt handle execution before current
1190 process unlock */
1191
1192 /* Enable EVT, BUF and ERR interrupt */
1193 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1194
1195 return HAL_OK;
1196 }
1197 else
1198 {
1199 return HAL_BUSY;
1200 }
1201 }
1202
1203 /**
1204 * @brief Transmit in slave mode an amount of data in no-blocking mode with Interrupt
1205 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
1206 * the configuration information for the specified I2C.
1207 * @param pData: Pointer to data buffer
1208 * @param Size: Amount of data to be sent
1209 * @retval HAL status
1210 */
1211 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
1212 {
1213 if(hi2c->State == HAL_I2C_STATE_READY)
1214 {
1215 if((pData == NULL) || (Size == 0))
1216 {
1217 return HAL_ERROR;
1218 }
1219
1220 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1221 {
1222 return HAL_BUSY;
1223 }
1224
1225 /* Process Locked */
1226 __HAL_LOCK(hi2c);
1227
1228 hi2c->State = HAL_I2C_STATE_BUSY_TX;
1229 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1230
1231 hi2c->pBuffPtr = pData;
1232 hi2c->XferSize = Size;
1233 hi2c->XferCount = Size;
1234
1235 /* Enable Address Acknowledge */
1236 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1237
1238 /* Process Unlocked */
1239 __HAL_UNLOCK(hi2c);
1240
1241 /* Note : The I2C interrupts must be enabled after unlocking current process
1242 to avoid the risk of I2C interrupt handle execution before current
1243 process unlock */
1244
1245 /* Enable EVT, BUF and ERR interrupt */
1246 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1247
1248 return HAL_OK;
1249 }
1250 else
1251 {
1252 return HAL_BUSY;
1253 }
1254 }
1255
1256 /**
1257 * @brief Receive in slave mode an amount of data in no-blocking mode with Interrupt
1258 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
1259 * the configuration information for the specified I2C.
1260 * @param pData: Pointer to data buffer
1261 * @param Size: Amount of data to be sent
1262 * @retval HAL status
1263 */
1264 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
1265 {
1266 if(hi2c->State == HAL_I2C_STATE_READY)
1267 {
1268 if((pData == NULL) || (Size == 0))
1269 {
1270 return HAL_ERROR;
1271 }
1272
1273 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1274 {
1275 return HAL_BUSY;
1276 }
1277
1278 /* Process Locked */
1279 __HAL_LOCK(hi2c);
1280
1281 hi2c->State = HAL_I2C_STATE_BUSY_RX;
1282 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1283
1284 hi2c->pBuffPtr = pData;
1285 hi2c->XferSize = Size;
1286 hi2c->XferCount = Size;
1287
1288 /* Enable Address Acknowledge */
1289 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1290
1291 /* Process Unlocked */
1292 __HAL_UNLOCK(hi2c);
1293
1294 /* Note : The I2C interrupts must be enabled after unlocking current process
1295 to avoid the risk of I2C interrupt handle execution before current
1296 process unlock */
1297
1298 /* Enable EVT, BUF and ERR interrupt */
1299 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1300
1301 return HAL_OK;
1302 }
1303 else
1304 {
1305 return HAL_BUSY;
1306 }
1307 }
1308
1309
1310 /**
1311 * @brief Transmit in master mode an amount of data in no-blocking mode with DMA
1312 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
1313 * the configuration information for the specified I2C.
1314 * @param DevAddress: Target device address
1315 * @param pData: Pointer to data buffer
1316 * @param Size: Amount of data to be sent
1317 * @retval HAL status
1318 */
1319 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
1320 {
1321 if(hi2c->State == HAL_I2C_STATE_READY)
1322 {
1323 if((pData == NULL) || (Size == 0))
1324 {
1325 return HAL_ERROR;
1326 }
1327
1328 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1329 {
1330 return HAL_BUSY;
1331 }
1332
1333 /* Process Locked */
1334 __HAL_LOCK(hi2c);
1335
1336 hi2c->State = HAL_I2C_STATE_BUSY_TX;
1337 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1338
1339 hi2c->pBuffPtr = pData;
1340 hi2c->XferSize = Size;
1341 hi2c->XferCount = Size;
1342
1343 /* Set the I2C DMA transfert complete callback */
1344 hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt;
1345
1346 /* Set the DMA error callback */
1347 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
1348
1349 /* Enable the DMA channel */
1350 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
1351
1352 /* Send Slave Address */
1353 if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
1354 {
1355 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1356 {
1357 /* Process Unlocked */
1358 __HAL_UNLOCK(hi2c);
1359 return HAL_ERROR;
1360 }
1361 else
1362 {
1363 /* Process Unlocked */
1364 __HAL_UNLOCK(hi2c);
1365 return HAL_TIMEOUT;
1366 }
1367 }
1368
1369 /* Enable DMA Request */
1370 SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
1371
1372 /* Clear ADDR flag */
1373 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1374
1375 /* Process Unlocked */
1376 __HAL_UNLOCK(hi2c);
1377
1378 return HAL_OK;
1379 }
1380 else
1381 {
1382 return HAL_BUSY;
1383 }
1384 }
1385
1386 /**
1387 * @brief Receive in master mode an amount of data in no-blocking mode with DMA
1388 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
1389 * the configuration information for the specified I2C.
1390 * @param DevAddress: Target device address
1391 * @param pData: Pointer to data buffer
1392 * @param Size: Amount of data to be sent
1393 * @retval HAL status
1394 */
1395 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
1396 {
1397 if(hi2c->State == HAL_I2C_STATE_READY)
1398 {
1399 if((pData == NULL) || (Size == 0))
1400 {
1401 return HAL_ERROR;
1402 }
1403
1404 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1405 {
1406 return HAL_BUSY;
1407 }
1408
1409 /* Process Locked */
1410 __HAL_LOCK(hi2c);
1411
1412 hi2c->State = HAL_I2C_STATE_BUSY_RX;
1413 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1414
1415 hi2c->pBuffPtr = pData;
1416 hi2c->XferSize = Size;
1417 hi2c->XferCount = Size;
1418
1419 /* Set the I2C DMA transfert complete callback */
1420 hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt;
1421
1422 /* Set the DMA error callback */
1423 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
1424
1425 /* Enable the DMA channel */
1426 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
1427
1428 /* Send Slave Address */
1429 if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
1430 {
1431 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1432 {
1433 /* Process Unlocked */
1434 __HAL_UNLOCK(hi2c);
1435 return HAL_ERROR;
1436 }
1437 else
1438 {
1439 /* Process Unlocked */
1440 __HAL_UNLOCK(hi2c);
1441 return HAL_TIMEOUT;
1442 }
1443 }
1444
1445 if(Size == 1)
1446 {
1447 /* Disable Acknowledge */
1448 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1449 }
1450 else
1451 {
1452 /* Enable Last DMA bit */
1453 SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
1454 }
1455
1456 /* Enable DMA Request */
1457 SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
1458
1459 /* Clear ADDR flag */
1460 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1461
1462 /* Process Unlocked */
1463 __HAL_UNLOCK(hi2c);
1464
1465 return HAL_OK;
1466 }
1467 else
1468 {
1469 return HAL_BUSY;
1470 }
1471 }
1472
1473 /**
1474 * @brief Transmit in slave mode an amount of data in no-blocking mode with DMA
1475 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
1476 * the configuration information for the specified I2C.
1477 * @param pData: Pointer to data buffer
1478 * @param Size: Amount of data to be sent
1479 * @retval HAL status
1480 */
1481 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
1482 {
1483 if(hi2c->State == HAL_I2C_STATE_READY)
1484 {
1485 if((pData == NULL) || (Size == 0))
1486 {
1487 return HAL_ERROR;
1488 }
1489
1490 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1491 {
1492 return HAL_BUSY;
1493 }
1494
1495 /* Process Locked */
1496 __HAL_LOCK(hi2c);
1497
1498 hi2c->State = HAL_I2C_STATE_BUSY_TX;
1499 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1500
1501 hi2c->pBuffPtr = pData;
1502 hi2c->XferSize = Size;
1503 hi2c->XferCount = Size;
1504
1505 /* Set the I2C DMA transfert complete callback */
1506 hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt;
1507
1508 /* Set the DMA error callback */
1509 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
1510
1511 /* Enable the DMA channel */
1512 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
1513
1514 /* Enable DMA Request */
1515 SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
1516
1517 /* Enable Address Acknowledge */
1518 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1519
1520 /* Wait until ADDR flag is set */
1521 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
1522 {
1523 return HAL_TIMEOUT;
1524 }
1525
1526 /* If 7bit addressing mode is selected */
1527 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
1528 {
1529 /* Clear ADDR flag */
1530 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1531 }
1532 else
1533 {
1534 /* Clear ADDR flag */
1535 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1536
1537 /* Wait until ADDR flag is set */
1538 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
1539 {
1540 return HAL_TIMEOUT;
1541 }
1542
1543 /* Clear ADDR flag */
1544 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1545 }
1546
1547 /* Process Unlocked */
1548 __HAL_UNLOCK(hi2c);
1549
1550 return HAL_OK;
1551 }
1552 else
1553 {
1554 return HAL_BUSY;
1555 }
1556 }
1557
1558 /**
1559 * @brief Receive in slave mode an amount of data in no-blocking mode with DMA
1560 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
1561 * the configuration information for the specified I2C.
1562 * @param pData: Pointer to data buffer
1563 * @param Size: Amount of data to be sent
1564 * @retval HAL status
1565 */
1566 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
1567 {
1568 if(hi2c->State == HAL_I2C_STATE_READY)
1569 {
1570 if((pData == NULL) || (Size == 0))
1571 {
1572 return HAL_ERROR;
1573 }
1574
1575 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1576 {
1577 return HAL_BUSY;
1578 }
1579
1580 /* Process Locked */
1581 __HAL_LOCK(hi2c);
1582
1583 hi2c->State = HAL_I2C_STATE_BUSY_RX;
1584 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1585
1586 hi2c->pBuffPtr = pData;
1587 hi2c->XferSize = Size;
1588 hi2c->XferCount = Size;
1589
1590 /* Set the I2C DMA transfert complete callback */
1591 hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt;
1592
1593 /* Set the DMA error callback */
1594 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
1595
1596 /* Enable the DMA channel */
1597 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
1598
1599 /* Enable DMA Request */
1600 SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
1601
1602 /* Enable Address Acknowledge */
1603 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1604
1605 /* Wait until ADDR flag is set */
1606 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
1607 {
1608 return HAL_TIMEOUT;
1609 }
1610
1611 /* Clear ADDR flag */
1612 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1613
1614 /* Process Unlocked */
1615 __HAL_UNLOCK(hi2c);
1616
1617 return HAL_OK;
1618 }
1619 else
1620 {
1621 return HAL_BUSY;
1622 }
1623 }
1624
1625
1626 /**
1627 * @brief Write an amount of data in blocking mode to a specific memory address
1628 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
1629 * the configuration information for the specified I2C.
1630 * @param DevAddress: Target device address
1631 * @param MemAddress: Internal memory address
1632 * @param MemAddSize: Size of internal memory address
1633 * @param pData: Pointer to data buffer
1634 * @param Size: Amount of data to be sent
1635 * @param Timeout: Timeout duration
1636 * @retval HAL status
1637 */
1638 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1639 {
1640 /* Check the parameters */
1641 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
1642
1643 if(hi2c->State == HAL_I2C_STATE_READY)
1644 {
1645 if((pData == NULL) || (Size == 0))
1646 {
1647 return HAL_ERROR;
1648 }
1649
1650 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1651 {
1652 return HAL_BUSY;
1653 }
1654
1655 /* Process Locked */
1656 __HAL_LOCK(hi2c);
1657
1658 hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
1659 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1660
1661 /* Send Slave Address and Memory Address */
1662 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
1663 {
1664 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1665 {
1666 /* Process Unlocked */
1667 __HAL_UNLOCK(hi2c);
1668 return HAL_ERROR;
1669 }
1670 else
1671 {
1672 /* Process Unlocked */
1673 __HAL_UNLOCK(hi2c);
1674 return HAL_TIMEOUT;
1675 }
1676 }
1677
1678 while(Size > 0)
1679 {
1680 /* Wait until TXE flag is set */
1681 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
1682 {
1683 return HAL_TIMEOUT;
1684 }
1685
1686 /* Write data to DR */
1687 hi2c->Instance->DR = (*pData++);
1688 Size--;
1689
1690 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
1691 {
1692 /* Write data to DR */
1693 hi2c->Instance->DR = (*pData++);
1694 Size--;
1695 }
1696 }
1697
1698 /* Wait until TXE flag is set */
1699 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
1700 {
1701 return HAL_TIMEOUT;
1702 }
1703
1704 /* Generate Stop */
1705 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
1706
1707 /* Wait until BUSY flag is reset */
1708 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
1709 {
1710 return HAL_TIMEOUT;
1711 }
1712
1713 hi2c->State = HAL_I2C_STATE_READY;
1714
1715 /* Process Unlocked */
1716 __HAL_UNLOCK(hi2c);
1717
1718 return HAL_OK;
1719 }
1720 else
1721 {
1722 return HAL_BUSY;
1723 }
1724 }
1725
1726 /**
1727 * @brief Read an amount of data in blocking mode from a specific memory address
1728 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
1729 * the configuration information for the specified I2C.
1730 * @param DevAddress: Target device address
1731 * @param MemAddress: Internal memory address
1732 * @param MemAddSize: Size of internal memory address
1733 * @param pData: Pointer to data buffer
1734 * @param Size: Amount of data to be sent
1735 * @param Timeout: Timeout duration
1736 * @retval HAL status
1737 */
1738 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1739 {
1740 /* Check the parameters */
1741 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
1742
1743 if(hi2c->State == HAL_I2C_STATE_READY)
1744 {
1745 if((pData == NULL) || (Size == 0))
1746 {
1747 return HAL_ERROR;
1748 }
1749
1750 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1751 {
1752 return HAL_BUSY;
1753 }
1754
1755 /* Process Locked */
1756 __HAL_LOCK(hi2c);
1757
1758 hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
1759 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1760
1761 /* Send Slave Address and Memory Address */
1762 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
1763 {
1764 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1765 {
1766 /* Process Unlocked */
1767 __HAL_UNLOCK(hi2c);
1768 return HAL_ERROR;
1769 }
1770 else
1771 {
1772 /* Process Unlocked */
1773 __HAL_UNLOCK(hi2c);
1774 return HAL_TIMEOUT;
1775 }
1776 }
1777
1778 if(Size == 1)
1779 {
1780 /* Disable Acknowledge */
1781 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1782
1783 /* Clear ADDR flag */
1784 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1785
1786 /* Generate Stop */
1787 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
1788 }
1789 else if(Size == 2)
1790 {
1791 /* Disable Acknowledge */
1792 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1793
1794 /* Enable Pos */
1795 SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
1796
1797 /* Clear ADDR flag */
1798 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1799 }
1800 else
1801 {
1802 /* Clear ADDR flag */
1803 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1804 }
1805
1806 while(Size > 0)
1807 {
1808 if(Size <= 3)
1809 {
1810 /* One byte */
1811 if(Size== 1)
1812 {
1813 /* Wait until RXNE flag is set */
1814 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
1815 {
1816 return HAL_TIMEOUT;
1817 }
1818
1819 /* Read data from DR */
1820 (*pData++) = hi2c->Instance->DR;
1821 Size--;
1822 }
1823 /* Two bytes */
1824 else if(Size == 2)
1825 {
1826 /* Wait until BTF flag is set */
1827 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
1828 {
1829 return HAL_TIMEOUT;
1830 }
1831
1832 /* Generate Stop */
1833 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
1834
1835 /* Read data from DR */
1836 (*pData++) = hi2c->Instance->DR;
1837 Size--;
1838
1839 /* Read data from DR */
1840 (*pData++) = hi2c->Instance->DR;
1841 Size--;
1842 }
1843 /* 3 Last bytes */
1844 else
1845 {
1846 /* Wait until BTF flag is set */
1847 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
1848 {
1849 return HAL_TIMEOUT;
1850 }
1851
1852 /* Disable Acknowledge */
1853 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1854
1855 /* Read data from DR */
1856 (*pData++) = hi2c->Instance->DR;
1857 Size--;
1858
1859 /* Wait until BTF flag is set */
1860 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
1861 {
1862 return HAL_TIMEOUT;
1863 }
1864
1865 /* Generate Stop */
1866 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
1867
1868 /* Read data from DR */
1869 (*pData++) = hi2c->Instance->DR;
1870 Size--;
1871
1872 /* Read data from DR */
1873 (*pData++) = hi2c->Instance->DR;
1874 Size--;
1875 }
1876 }
1877 else
1878 {
1879 /* Wait until RXNE flag is set */
1880 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
1881 {
1882 return HAL_TIMEOUT;
1883 }
1884
1885 /* Read data from DR */
1886 (*pData++) = hi2c->Instance->DR;
1887 Size--;
1888
1889 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
1890 {
1891 /* Read data from DR */
1892 (*pData++) = hi2c->Instance->DR;
1893 Size--;
1894 }
1895 }
1896 }
1897
1898 /* Disable Pos */
1899 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
1900
1901 /* Wait until BUSY flag is reset */
1902 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
1903 {
1904 return HAL_TIMEOUT;
1905 }
1906
1907 hi2c->State = HAL_I2C_STATE_READY;
1908
1909 /* Process Unlocked */
1910 __HAL_UNLOCK(hi2c);
1911
1912 return HAL_OK;
1913 }
1914 else
1915 {
1916 return HAL_BUSY;
1917 }
1918 }
1919
1920
1921 /**
1922 * @brief Write an amount of data in no-blocking mode with Interrupt to a specific memory address
1923 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
1924 * the configuration information for the specified I2C.
1925 * @param DevAddress: Target device address
1926 * @param MemAddress: Internal memory address
1927 * @param MemAddSize: Size of internal memory address
1928 * @param pData: Pointer to data buffer
1929 * @param Size: Amount of data to be sent
1930 * @retval HAL status
1931 */
1932 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
1933 {
1934 /* Check the parameters */
1935 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
1936
1937 if(hi2c->State == HAL_I2C_STATE_READY)
1938 {
1939 if((pData == NULL) || (Size == 0))
1940 {
1941 return HAL_ERROR;
1942 }
1943
1944 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1945 {
1946 return HAL_BUSY;
1947 }
1948
1949 /* Process Locked */
1950 __HAL_LOCK(hi2c);
1951
1952 hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
1953 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1954
1955 hi2c->pBuffPtr = pData;
1956 hi2c->XferSize = Size;
1957 hi2c->XferCount = Size;
1958
1959 /* Send Slave Address and Memory Address */
1960 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
1961 {
1962 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1963 {
1964 /* Process Unlocked */
1965 __HAL_UNLOCK(hi2c);
1966 return HAL_ERROR;
1967 }
1968 else
1969 {
1970 /* Process Unlocked */
1971 __HAL_UNLOCK(hi2c);
1972 return HAL_TIMEOUT;
1973 }
1974 }
1975
1976 /* Process Unlocked */
1977 __HAL_UNLOCK(hi2c);
1978
1979 /* Note : The I2C interrupts must be enabled after unlocking current process
1980 to avoid the risk of I2C interrupt handle execution before current
1981 process unlock */
1982
1983 /* Enable EVT, BUF and ERR interrupt */
1984 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1985
1986 return HAL_OK;
1987 }
1988 else
1989 {
1990 return HAL_BUSY;
1991 }
1992 }
1993
1994 /**
1995 * @brief Read an amount of data in no-blocking mode with Interrupt from a specific memory address
1996 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
1997 * the configuration information for the specified I2C.
1998 * @param DevAddress: Target device address
1999 * @param MemAddress: Internal memory address
2000 * @param MemAddSize: Size of internal memory address
2001 * @param pData: Pointer to data buffer
2002 * @param Size: Amount of data to be sent
2003 * @retval HAL status
2004 */
2005 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
2006 {
2007 /* Check the parameters */
2008 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
2009
2010 if(hi2c->State == HAL_I2C_STATE_READY)
2011 {
2012 if((pData == NULL) || (Size == 0))
2013 {
2014 return HAL_ERROR;
2015 }
2016
2017 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
2018 {
2019 return HAL_BUSY;
2020 }
2021
2022 /* Process Locked */
2023 __HAL_LOCK(hi2c);
2024
2025 hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
2026 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2027
2028 hi2c->pBuffPtr = pData;
2029 hi2c->XferSize = Size;
2030 hi2c->XferCount = Size;
2031
2032 /* Send Slave Address and Memory Address */
2033 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
2034 {
2035 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
2036 {
2037 /* Process Unlocked */
2038 __HAL_UNLOCK(hi2c);
2039 return HAL_ERROR;
2040 }
2041 else
2042 {
2043 /* Process Unlocked */
2044 __HAL_UNLOCK(hi2c);
2045 return HAL_TIMEOUT;
2046 }
2047 }
2048
2049 if(hi2c->XferCount == 1)
2050 {
2051 /* Disable Acknowledge */
2052 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
2053
2054 /* Clear ADDR flag */
2055 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2056
2057 /* Generate Stop */
2058 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
2059 }
2060 else if(hi2c->XferCount == 2)
2061 {
2062 /* Disable Acknowledge */
2063 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
2064
2065 /* Enable Pos */
2066 SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
2067
2068 /* Clear ADDR flag */
2069 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2070 }
2071 else
2072 {
2073 /* Enable Acknowledge */
2074 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
2075
2076 /* Clear ADDR flag */
2077 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2078 }
2079
2080 /* Process Unlocked */
2081 __HAL_UNLOCK(hi2c);
2082
2083 /* Note : The I2C interrupts must be enabled after unlocking current process
2084 to avoid the risk of I2C interrupt handle execution before current
2085 process unlock */
2086
2087 /* Enable EVT, BUF and ERR interrupt */
2088 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2089
2090 return HAL_OK;
2091 }
2092 else
2093 {
2094 return HAL_BUSY;
2095 }
2096 }
2097
2098
2099 /**
2100 * @brief Write an amount of data in no-blocking mode with DMA to a specific memory address
2101 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2102 * the configuration information for the specified I2C.
2103 * @param DevAddress: Target device address
2104 * @param MemAddress: Internal memory address
2105 * @param MemAddSize: Size of internal memory address
2106 * @param pData: Pointer to data buffer
2107 * @param Size: Amount of data to be sent
2108 * @retval HAL status
2109 */
2110 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
2111 {
2112 /* Check the parameters */
2113 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
2114
2115 if(hi2c->State == HAL_I2C_STATE_READY)
2116 {
2117 if((pData == NULL) || (Size == 0))
2118 {
2119 return HAL_ERROR;
2120 }
2121
2122 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
2123 {
2124 return HAL_BUSY;
2125 }
2126
2127 /* Process Locked */
2128 __HAL_LOCK(hi2c);
2129
2130 hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
2131 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2132
2133 hi2c->pBuffPtr = pData;
2134 hi2c->XferSize = Size;
2135 hi2c->XferCount = Size;
2136
2137 /* Set the I2C DMA transfert complete callback */
2138 hi2c->hdmatx->XferCpltCallback = I2C_DMAMemTransmitCplt;
2139
2140 /* Set the DMA error callback */
2141 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
2142
2143 /* Enable the DMA channel */
2144 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
2145
2146 /* Send Slave Address and Memory Address */
2147 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
2148 {
2149 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
2150 {
2151 /* Process Unlocked */
2152 __HAL_UNLOCK(hi2c);
2153 return HAL_ERROR;
2154 }
2155 else
2156 {
2157 /* Process Unlocked */
2158 __HAL_UNLOCK(hi2c);
2159 return HAL_TIMEOUT;
2160 }
2161 }
2162
2163 /* Enable DMA Request */
2164 SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
2165
2166 /* Process Unlocked */
2167 __HAL_UNLOCK(hi2c);
2168
2169 return HAL_OK;
2170 }
2171 else
2172 {
2173 return HAL_BUSY;
2174 }
2175 }
2176
2177 /**
2178 * @brief Reads an amount of data in no-blocking mode with DMA from a specific memory address.
2179 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2180 * the configuration information for the specified I2C.
2181 * @param DevAddress: Target device address
2182 * @param MemAddress: Internal memory address
2183 * @param MemAddSize: Size of internal memory address
2184 * @param pData: Pointer to data buffer
2185 * @param Size: Amount of data to be read
2186 * @retval HAL status
2187 */
2188 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
2189 {
2190 /* Check the parameters */
2191 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
2192
2193 if(hi2c->State == HAL_I2C_STATE_READY)
2194 {
2195 if((pData == NULL) || (Size == 0))
2196 {
2197 return HAL_ERROR;
2198 }
2199
2200 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
2201 {
2202 return HAL_BUSY;
2203 }
2204
2205 /* Process Locked */
2206 __HAL_LOCK(hi2c);
2207
2208 hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
2209 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2210
2211 hi2c->pBuffPtr = pData;
2212 hi2c->XferSize = Size;
2213 hi2c->XferCount = Size;
2214
2215 /* Set the I2C DMA transfert complete callback */
2216 hi2c->hdmarx->XferCpltCallback = I2C_DMAMemReceiveCplt;
2217
2218 /* Set the DMA error callback */
2219 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
2220
2221 /* Enable the DMA channel */
2222 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
2223
2224 /* Send Slave Address and Memory Address */
2225 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
2226 {
2227 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
2228 {
2229 /* Process Unlocked */
2230 __HAL_UNLOCK(hi2c);
2231 return HAL_ERROR;
2232 }
2233 else
2234 {
2235 /* Process Unlocked */
2236 __HAL_UNLOCK(hi2c);
2237 return HAL_TIMEOUT;
2238 }
2239 }
2240
2241 if(Size == 1)
2242 {
2243 /* Disable Acknowledge */
2244 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
2245 }
2246 else
2247 {
2248 /* Enable Last DMA bit */
2249 SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
2250 }
2251
2252 /* Enable DMA Request */
2253 SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
2254
2255 /* Clear ADDR flag */
2256 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2257
2258 /* Process Unlocked */
2259 __HAL_UNLOCK(hi2c);
2260
2261 return HAL_OK;
2262 }
2263 else
2264 {
2265 return HAL_BUSY;
2266 }
2267 }
2268
2269
2270 /**
2271 * @brief Checks if target device is ready for communication.
2272 * @note This function is used with Memory devices
2273 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2274 * the configuration information for the specified I2C.
2275 * @param DevAddress: Target device address
2276 * @param Trials: Number of trials
2277 * @param Timeout: Timeout duration
2278 * @retval HAL status
2279 */
2280 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
2281 {
2282 uint32_t tickstart = 0, tmp1 = 0, tmp2 = 0, tmp3 = 0, I2C_Trials = 1;
2283
2284 if(hi2c->State == HAL_I2C_STATE_READY)
2285 {
2286 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
2287 {
2288 return HAL_BUSY;
2289 }
2290
2291 /* Process Locked */
2292 __HAL_LOCK(hi2c);
2293
2294 hi2c->State = HAL_I2C_STATE_BUSY;
2295 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2296
2297 do
2298 {
2299 /* Generate Start */
2300 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
2301
2302 /* Wait until SB flag is set */
2303 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
2304 {
2305 return HAL_TIMEOUT;
2306 }
2307
2308 /* Send slave address */
2309 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
2310
2311 /* Wait until ADDR or AF flag are set */
2312 /* Get tick */
2313 tickstart = HAL_GetTick();
2314
2315 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
2316 tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
2317 tmp3 = hi2c->State;
2318 while((tmp1 == RESET) && (tmp2 == RESET) && (tmp3 != HAL_I2C_STATE_TIMEOUT))
2319 {
2320 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
2321 {
2322 hi2c->State = HAL_I2C_STATE_TIMEOUT;
2323 }
2324 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
2325 tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
2326 tmp3 = hi2c->State;
2327 }
2328
2329 hi2c->State = HAL_I2C_STATE_READY;
2330
2331 /* Check if the ADDR flag has been set */
2332 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
2333 {
2334 /* Generate Stop */
2335 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
2336
2337 /* Clear ADDR Flag */
2338 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2339
2340 /* Wait until BUSY flag is reset */
2341 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
2342 {
2343 return HAL_TIMEOUT;
2344 }
2345
2346 hi2c->State = HAL_I2C_STATE_READY;
2347
2348 /* Process Unlocked */
2349 __HAL_UNLOCK(hi2c);
2350
2351 return HAL_OK;
2352 }
2353 else
2354 {
2355 /* Generate Stop */
2356 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
2357
2358 /* Clear AF Flag */
2359 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
2360
2361 /* Wait until BUSY flag is reset */
2362 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
2363 {
2364 return HAL_TIMEOUT;
2365 }
2366 }
2367 }while(I2C_Trials++ < Trials);
2368
2369 hi2c->State = HAL_I2C_STATE_READY;
2370
2371 /* Process Unlocked */
2372 __HAL_UNLOCK(hi2c);
2373
2374 return HAL_ERROR;
2375 }
2376 else
2377 {
2378 return HAL_BUSY;
2379 }
2380 }
2381 /**
2382 * @}
2383 */
2384
2385 /** @defgroup IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
2386 * @{
2387 */
2388
2389 /**
2390 * @brief This function handles I2C event interrupt request.
2391 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2392 * the configuration information for the specified I2C.
2393 * @retval None
2394 */
2395 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
2396 {
2397 uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0, tmp4 = 0;
2398 /* Master mode selected */
2399 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_MSL) == SET)
2400 {
2401 /* I2C in mode Transmitter -----------------------------------------------*/
2402 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == SET)
2403 {
2404 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE);
2405 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
2406 tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
2407 tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
2408 /* TXE set and BTF reset -----------------------------------------------*/
2409 if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
2410 {
2411 I2C_MasterTransmit_TXE(hi2c);
2412 }
2413 /* BTF set -------------------------------------------------------------*/
2414 else if((tmp3 == SET) && (tmp4 == SET))
2415 {
2416 I2C_MasterTransmit_BTF(hi2c);
2417 }
2418 }
2419 /* I2C in mode Receiver --------------------------------------------------*/
2420 else
2421 {
2422 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE);
2423 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
2424 tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
2425 tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
2426 /* RXNE set and BTF reset -----------------------------------------------*/
2427 if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
2428 {
2429 I2C_MasterReceive_RXNE(hi2c);
2430 }
2431 /* BTF set -------------------------------------------------------------*/
2432 else if((tmp3 == SET) && (tmp4 == SET))
2433 {
2434 I2C_MasterReceive_BTF(hi2c);
2435 }
2436 }
2437 }
2438 /* Slave mode selected */
2439 else
2440 {
2441 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
2442 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_EVT));
2443 tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF);
2444 tmp4 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA);
2445 /* ADDR set --------------------------------------------------------------*/
2446 if((tmp1 == SET) && (tmp2 == SET))
2447 {
2448 I2C_Slave_ADDR(hi2c);
2449 }
2450 /* STOPF set --------------------------------------------------------------*/
2451 else if((tmp3 == SET) && (tmp2 == SET))
2452 {
2453 I2C_Slave_STOPF(hi2c);
2454 }
2455 /* I2C in mode Transmitter -----------------------------------------------*/
2456 else if(tmp4 == SET)
2457 {
2458 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE);
2459 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
2460 tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
2461 tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
2462 /* TXE set and BTF reset -----------------------------------------------*/
2463 if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
2464 {
2465 I2C_SlaveTransmit_TXE(hi2c);
2466 }
2467 /* BTF set -------------------------------------------------------------*/
2468 else if((tmp3 == SET) && (tmp4 == SET))
2469 {
2470 I2C_SlaveTransmit_BTF(hi2c);
2471 }
2472 }
2473 /* I2C in mode Receiver --------------------------------------------------*/
2474 else
2475 {
2476 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE);
2477 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
2478 tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
2479 tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
2480 /* RXNE set and BTF reset ----------------------------------------------*/
2481 if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
2482 {
2483 I2C_SlaveReceive_RXNE(hi2c);
2484 }
2485 /* BTF set -------------------------------------------------------------*/
2486 else if((tmp3 == SET) && (tmp4 == SET))
2487 {
2488 I2C_SlaveReceive_BTF(hi2c);
2489 }
2490 }
2491 }
2492 }
2493
2494 /**
2495 * @brief This function handles I2C error interrupt request.
2496 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2497 * the configuration information for I2C module
2498 * @retval HAL status
2499 */
2500 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
2501 {
2502 uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0;
2503
2504 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BERR);
2505 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
2506 /* I2C Bus error interrupt occurred ----------------------------------------*/
2507 if((tmp1 == SET) && (tmp2 == SET))
2508 {
2509 hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;
2510
2511 /* Clear BERR flag */
2512 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
2513
2514 /* Workaround: Start cannot be generated after a misplaced Stop */
2515 SET_BIT(hi2c->Instance->CR1, I2C_CR1_SWRST);
2516 }
2517
2518 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ARLO);
2519 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
2520 /* I2C Arbitration Loss error interrupt occurred ---------------------------*/
2521 if((tmp1 == SET) && (tmp2 == SET))
2522 {
2523 hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;
2524
2525 /* Clear ARLO flag */
2526 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
2527 }
2528
2529 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
2530 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
2531 /* I2C Acknowledge failure error interrupt occurred ------------------------*/
2532 if((tmp1 == SET) && (tmp2 == SET))
2533 {
2534 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_MSL);
2535 tmp2 = hi2c->XferCount;
2536 tmp3 = hi2c->State;
2537 if((tmp1 == RESET) && (tmp2 == 0) && (tmp3 == HAL_I2C_STATE_BUSY_TX))
2538 {
2539 I2C_Slave_AF(hi2c);
2540 }
2541 else
2542 {
2543 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
2544 /* Clear AF flag */
2545 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
2546 }
2547 }
2548
2549 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_OVR);
2550 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
2551 /* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
2552 if((tmp1 == SET) && (tmp2 == SET))
2553 {
2554 hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;
2555 /* Clear OVR flag */
2556 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
2557 }
2558
2559 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
2560 {
2561 hi2c->State = HAL_I2C_STATE_READY;
2562
2563 /* Disable Pos bit in I2C CR1 when error occured in Master/Mem Receive IT Process */
2564 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
2565
2566 HAL_I2C_ErrorCallback(hi2c);
2567 }
2568 }
2569
2570 /**
2571 * @brief Master Tx Transfer completed callbacks.
2572 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2573 * the configuration information for the specified I2C.
2574 * @retval None
2575 */
2576 __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
2577 {
2578 /* NOTE : This function Should not be modified, when the callback is needed,
2579 the HAL_I2C_TxCpltCallback could be implemented in the user file
2580 */
2581 }
2582
2583 /**
2584 * @brief Master Rx Transfer completed callbacks.
2585 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2586 * the configuration information for the specified I2C.
2587 * @retval None
2588 */
2589 __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
2590 {
2591 /* NOTE : This function Should not be modified, when the callback is needed,
2592 the HAL_I2C_TxCpltCallback could be implemented in the user file
2593 */
2594 }
2595
2596 /** @brief Slave Tx Transfer completed callbacks.
2597 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2598 * the configuration information for the specified I2C.
2599 * @retval None
2600 */
2601 __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
2602 {
2603 /* NOTE : This function Should not be modified, when the callback is needed,
2604 the HAL_I2C_TxCpltCallback could be implemented in the user file
2605 */
2606 }
2607
2608 /**
2609 * @brief Slave Rx Transfer completed callbacks.
2610 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2611 * the configuration information for the specified I2C.
2612 * @retval None
2613 */
2614 __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
2615 {
2616 /* NOTE : This function Should not be modified, when the callback is needed,
2617 the HAL_I2C_TxCpltCallback could be implemented in the user file
2618 */
2619 }
2620
2621 /**
2622 * @brief Memory Tx Transfer completed callbacks.
2623 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2624 * the configuration information for the specified I2C.
2625 * @retval None
2626 */
2627 __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
2628 {
2629 /* NOTE : This function Should not be modified, when the callback is needed,
2630 the HAL_I2C_TxCpltCallback could be implemented in the user file
2631 */
2632 }
2633
2634 /**
2635 * @brief Memory Rx Transfer completed callbacks.
2636 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2637 * the configuration information for the specified I2C.
2638 * @retval None
2639 */
2640 __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
2641 {
2642 /* NOTE : This function Should not be modified, when the callback is needed,
2643 the HAL_I2C_TxCpltCallback could be implemented in the user file
2644 */
2645 }
2646
2647 /**
2648 * @brief I2C error callbacks.
2649 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2650 * the configuration information for the specified I2C.
2651 * @retval None
2652 */
2653 __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
2654 {
2655 /* NOTE : This function Should not be modified, when the callback is needed,
2656 the HAL_I2C_ErrorCallback could be implemented in the user file
2657 */
2658 }
2659
2660 /**
2661 * @}
2662 */
2663
2664
2665 /** @defgroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions
2666 * @brief Peripheral State and Errors functions
2667 *
2668 @verbatim
2669 ===============================================================================
2670 ##### Peripheral State and Errors functions #####
2671 ===============================================================================
2672 [..]
2673 This subsection permits to get in run-time the status of the peripheral
2674 and the data flow.
2675
2676 @endverbatim
2677 * @{
2678 */
2679
2680 /**
2681 * @brief Returns the I2C state.
2682 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2683 * the configuration information for the specified I2C.
2684 * @retval HAL state
2685 */
2686 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
2687 {
2688 return hi2c->State;
2689 }
2690
2691 /**
2692 * @brief Return the I2C error code
2693 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2694 * the configuration information for the specified I2C.
2695 * @retval I2C Error Code
2696 */
2697 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
2698 {
2699 return hi2c->ErrorCode;
2700 }
2701
2702 /**
2703 * @}
2704 */
2705
2706 /**
2707 * @}
2708 */
2709
2710 /** @addtogroup I2C_Private_Functions
2711 * @{
2712 */
2713
2714 /**
2715 * @brief Handle TXE flag for Master Transmit Mode
2716 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2717 * the configuration information for the specified I2C.
2718 * @retval HAL status
2719 */
2720 static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
2721 {
2722 /* Write data to DR */
2723 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
2724 hi2c->XferCount--;
2725
2726 if(hi2c->XferCount == 0)
2727 {
2728 /* Disable BUF interrupt */
2729 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
2730 }
2731
2732 return HAL_OK;
2733 }
2734
2735 /**
2736 * @brief Handle BTF flag for Master Transmit Mode
2737 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2738 * the configuration information for the specified I2C.
2739 * @retval HAL status
2740 */
2741 static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
2742 {
2743 if(hi2c->XferCount != 0)
2744 {
2745 /* Write data to DR */
2746 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
2747 hi2c->XferCount--;
2748 }
2749 else
2750 {
2751 /* Disable EVT, BUF and ERR interrupt */
2752 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2753
2754 /* Generate Stop */
2755 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
2756
2757 /* Wait until BUSY flag is reset */
2758 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
2759 {
2760 return HAL_TIMEOUT;
2761 }
2762
2763 if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX)
2764 {
2765 hi2c->State = HAL_I2C_STATE_READY;
2766
2767 HAL_I2C_MemTxCpltCallback(hi2c);
2768 }
2769 else
2770 {
2771 hi2c->State = HAL_I2C_STATE_READY;
2772
2773 HAL_I2C_MasterTxCpltCallback(hi2c);
2774 }
2775 }
2776 return HAL_OK;
2777 }
2778
2779 /**
2780 * @brief Handle RXNE flag for Master Receive Mode
2781 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2782 * the configuration information for the specified I2C.
2783 * @retval HAL status
2784 */
2785 static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
2786 {
2787 uint32_t tmp = 0;
2788
2789 tmp = hi2c->XferCount;
2790 if(tmp > 3)
2791 {
2792 /* Read data from DR */
2793 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2794 hi2c->XferCount--;
2795 }
2796 else if((tmp == 2) || (tmp == 3))
2797 {
2798 /* Disable BUF interrupt */
2799 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
2800 }
2801 else
2802 {
2803 /* Disable EVT, BUF and ERR interrupt */
2804 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2805
2806 /* Read data from DR */
2807 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2808 hi2c->XferCount--;
2809
2810 /* Wait until BUSY flag is reset */
2811 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
2812 {
2813 return HAL_TIMEOUT;
2814 }
2815
2816 /* Disable Pos */
2817 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
2818
2819 if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)
2820 {
2821 hi2c->State = HAL_I2C_STATE_READY;
2822
2823 HAL_I2C_MemRxCpltCallback(hi2c);
2824 }
2825 else
2826 {
2827 hi2c->State = HAL_I2C_STATE_READY;
2828
2829 HAL_I2C_MasterRxCpltCallback(hi2c);
2830 }
2831 }
2832 return HAL_OK;
2833 }
2834
2835 /**
2836 * @brief Handle BTF flag for Master Receive Mode
2837 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2838 * the configuration information for the specified I2C.
2839 * @retval HAL status
2840 */
2841 static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
2842 {
2843 if(hi2c->XferCount == 3)
2844 {
2845 /* Disable Acknowledge */
2846 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
2847
2848 /* Read data from DR */
2849 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2850 hi2c->XferCount--;
2851 }
2852 else if(hi2c->XferCount == 2)
2853 {
2854 /* Generate Stop */
2855 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
2856
2857 /* Disable EVT and ERR interrupt */
2858 /* Workaround - Wong data read into data register */
2859 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
2860
2861 /* Read data from DR */
2862 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2863 hi2c->XferCount--;
2864
2865 /* Read data from DR */
2866 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2867 hi2c->XferCount--;
2868
2869 /* Wait until BUSY flag is reset */
2870 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
2871 {
2872 return HAL_TIMEOUT;
2873 }
2874
2875 /* Disable Pos */
2876 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
2877
2878 if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)
2879 {
2880 hi2c->State = HAL_I2C_STATE_READY;
2881
2882 HAL_I2C_MemRxCpltCallback(hi2c);
2883 }
2884 else
2885 {
2886 hi2c->State = HAL_I2C_STATE_READY;
2887
2888 HAL_I2C_MasterRxCpltCallback(hi2c);
2889 }
2890 }
2891 else
2892 {
2893 /* Read data from DR */
2894 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2895 hi2c->XferCount--;
2896 }
2897 return HAL_OK;
2898 }
2899
2900 /**
2901 * @brief Handle TXE flag for Slave Transmit Mode
2902 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2903 * the configuration information for the specified I2C.
2904 * @retval HAL status
2905 */
2906 static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
2907 {
2908 if(hi2c->XferCount != 0)
2909 {
2910 /* Write data to DR */
2911 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
2912 hi2c->XferCount--;
2913 }
2914 return HAL_OK;
2915 }
2916
2917 /**
2918 * @brief Handle BTF flag for Slave Transmit Mode
2919 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2920 * the configuration information for the specified I2C.
2921 * @retval HAL status
2922 */
2923 static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
2924 {
2925 if(hi2c->XferCount != 0)
2926 {
2927 /* Write data to DR */
2928 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
2929 hi2c->XferCount--;
2930 }
2931 return HAL_OK;
2932 }
2933
2934 /**
2935 * @brief Handle RXNE flag for Slave Receive Mode
2936 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2937 * the configuration information for the specified I2C.
2938 * @retval HAL status
2939 */
2940 static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
2941 {
2942 if(hi2c->XferCount != 0)
2943 {
2944 /* Read data from DR */
2945 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2946 hi2c->XferCount--;
2947 }
2948 return HAL_OK;
2949 }
2950
2951 /**
2952 * @brief Handle BTF flag for Slave Receive Mode
2953 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2954 * the configuration information for the specified I2C.
2955 * @retval HAL status
2956 */
2957 static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
2958 {
2959 if(hi2c->XferCount != 0)
2960 {
2961 /* Read data from DR */
2962 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2963 hi2c->XferCount--;
2964 }
2965 return HAL_OK;
2966 }
2967
2968 /**
2969 * @brief Handle ADD flag for Slave
2970 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2971 * the configuration information for the specified I2C.
2972 * @retval HAL status
2973 */
2974 static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c)
2975 {
2976 /* Clear ADDR flag */
2977 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2978
2979 return HAL_OK;
2980 }
2981
2982 /**
2983 * @brief Handle STOPF flag for Slave Mode
2984 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2985 * the configuration information for the specified I2C.
2986 * @retval HAL status
2987 */
2988 static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
2989 {
2990 /* Disable EVT, BUF and ERR interrupt */
2991 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2992
2993 /* Clear STOPF flag */
2994 __HAL_I2C_CLEAR_STOPFLAG(hi2c);
2995
2996 /* Disable Acknowledge */
2997 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
2998
2999 /* Wait until BUSY flag is reset */
3000 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3001 {
3002 return HAL_TIMEOUT;
3003 }
3004
3005 hi2c->State = HAL_I2C_STATE_READY;
3006
3007 HAL_I2C_SlaveRxCpltCallback(hi2c);
3008
3009 return HAL_OK;
3010 }
3011
3012 /**
3013 * @brief Handle Acknowledge Failed for Slave Mode
3014 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
3015 * the configuration information for the specified I2C.
3016 * @retval HAL status
3017 */
3018 static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
3019 {
3020 /* Disable EVT, BUF and ERR interrupt */
3021 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
3022
3023 /* Clear AF flag */
3024 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
3025
3026 /* Disable Acknowledge */
3027 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3028
3029 /* Wait until BUSY flag is reset */
3030 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3031 {
3032 return HAL_TIMEOUT;
3033 }
3034
3035 hi2c->State = HAL_I2C_STATE_READY;
3036
3037 HAL_I2C_SlaveTxCpltCallback(hi2c);
3038
3039 return HAL_OK;
3040 }
3041
3042 /**
3043 * @brief Master sends target device address followed by internal memory address for write request.
3044 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
3045 * the configuration information for the specified I2C.
3046 * @param DevAddress: Target device address
3047 * @param Timeout: Timeout duration
3048 * @retval HAL status
3049 */
3050 static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout)
3051 {
3052 /* Generate Start */
3053 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
3054
3055 /* Wait until SB flag is set */
3056 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3057 {
3058 return HAL_TIMEOUT;
3059 }
3060
3061 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
3062 {
3063 /* Send slave address */
3064 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
3065 }
3066 else
3067 {
3068 /* Send header of slave address */
3069 hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
3070
3071 /* Wait until ADD10 flag is set */
3072 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout) != HAL_OK)
3073 {
3074 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3075 {
3076 return HAL_ERROR;
3077 }
3078 else
3079 {
3080 return HAL_TIMEOUT;
3081 }
3082 }
3083
3084 /* Send slave address */
3085 hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
3086 }
3087
3088 /* Wait until ADDR flag is set */
3089 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3090 {
3091 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3092 {
3093 return HAL_ERROR;
3094 }
3095 else
3096 {
3097 return HAL_TIMEOUT;
3098 }
3099 }
3100
3101 return HAL_OK;
3102 }
3103
3104 /**
3105 * @brief Master sends target device address followed by internal memory address for read request.
3106 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
3107 * the configuration information for the specified I2C.
3108 * @param DevAddress: Target device address
3109 * @param Timeout: Timeout duration
3110 * @retval HAL status
3111 */
3112 static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout)
3113 {
3114 /* Enable Acknowledge */
3115 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3116
3117 /* Generate Start */
3118 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
3119
3120 /* Wait until SB flag is set */
3121 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3122 {
3123 return HAL_TIMEOUT;
3124 }
3125
3126 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
3127 {
3128 /* Send slave address */
3129 hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
3130 }
3131 else
3132 {
3133 /* Send header of slave address */
3134 hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
3135
3136 /* Wait until ADD10 flag is set */
3137 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout) != HAL_OK)
3138 {
3139 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3140 {
3141 return HAL_ERROR;
3142 }
3143 else
3144 {
3145 return HAL_TIMEOUT;
3146 }
3147 }
3148
3149 /* Send slave address */
3150 hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
3151
3152 /* Wait until ADDR flag is set */
3153 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3154 {
3155 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3156 {
3157 return HAL_ERROR;
3158 }
3159 else
3160 {
3161 return HAL_TIMEOUT;
3162 }
3163 }
3164
3165 /* Clear ADDR flag */
3166 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
3167
3168 /* Generate Restart */
3169 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
3170
3171 /* Wait until SB flag is set */
3172 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3173 {
3174 return HAL_TIMEOUT;
3175 }
3176
3177 /* Send header of slave address */
3178 hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
3179 }
3180
3181 /* Wait until ADDR flag is set */
3182 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3183 {
3184 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3185 {
3186 return HAL_ERROR;
3187 }
3188 else
3189 {
3190 return HAL_TIMEOUT;
3191 }
3192 }
3193
3194 return HAL_OK;
3195 }
3196
3197 /**
3198 * @brief Master sends target device address followed by internal memory address for write request.
3199 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
3200 * the configuration information for the specified I2C.
3201 * @param DevAddress: Target device address
3202 * @param MemAddress: Internal memory address
3203 * @param MemAddSize: Size of internal memory address
3204 * @param Timeout: Timeout duration
3205 * @retval HAL status
3206 */
3207 static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
3208 {
3209 /* Generate Start */
3210 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
3211
3212 /* Wait until SB flag is set */
3213 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3214 {
3215 return HAL_TIMEOUT;
3216 }
3217
3218 /* Send slave address */
3219 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
3220
3221 /* Wait until ADDR flag is set */
3222 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3223 {
3224 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3225 {
3226 return HAL_ERROR;
3227 }
3228 else
3229 {
3230 return HAL_TIMEOUT;
3231 }
3232 }
3233
3234 /* Clear ADDR flag */
3235 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
3236
3237 /* Wait until TXE flag is set */
3238 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3239 {
3240 return HAL_TIMEOUT;
3241 }
3242
3243 /* If Memory address size is 8Bit */
3244 if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
3245 {
3246 /* Send Memory Address */
3247 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
3248 }
3249 /* If Memory address size is 16Bit */
3250 else
3251 {
3252 /* Send MSB of Memory Address */
3253 hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
3254
3255 /* Wait until TXE flag is set */
3256 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3257 {
3258 return HAL_TIMEOUT;
3259 }
3260
3261 /* Send LSB of Memory Address */
3262 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
3263 }
3264
3265 return HAL_OK;
3266 }
3267
3268 /**
3269 * @brief Master sends target device address followed by internal memory address for read request.
3270 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
3271 * the configuration information for the specified I2C.
3272 * @param DevAddress: Target device address
3273 * @param MemAddress: Internal memory address
3274 * @param MemAddSize: Size of internal memory address
3275 * @param Timeout: Timeout duration
3276 * @retval HAL status
3277 */
3278 static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
3279 {
3280 /* Enable Acknowledge */
3281 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3282
3283 /* Generate Start */
3284 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
3285
3286 /* Wait until SB flag is set */
3287 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3288 {
3289 return HAL_TIMEOUT;
3290 }
3291
3292 /* Send slave address */
3293 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
3294
3295 /* Wait until ADDR flag is set */
3296 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3297 {
3298 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3299 {
3300 return HAL_ERROR;
3301 }
3302 else
3303 {
3304 return HAL_TIMEOUT;
3305 }
3306 }
3307
3308 /* Clear ADDR flag */
3309 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
3310
3311 /* Wait until TXE flag is set */
3312 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3313 {
3314 return HAL_TIMEOUT;
3315 }
3316
3317 /* If Memory address size is 8Bit */
3318 if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
3319 {
3320 /* Send Memory Address */
3321 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
3322 }
3323 /* If Memory address size is 16Bit */
3324 else
3325 {
3326 /* Send MSB of Memory Address */
3327 hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
3328
3329 /* Wait until TXE flag is set */
3330 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3331 {
3332 return HAL_TIMEOUT;
3333 }
3334
3335 /* Send LSB of Memory Address */
3336 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
3337 }
3338
3339 /* Wait until TXE flag is set */
3340 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3341 {
3342 return HAL_TIMEOUT;
3343 }
3344
3345 /* Generate Restart */
3346 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
3347
3348 /* Wait until SB flag is set */
3349 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3350 {
3351 return HAL_TIMEOUT;
3352 }
3353
3354 /* Send slave address */
3355 hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
3356
3357 /* Wait until ADDR flag is set */
3358 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3359 {
3360 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3361 {
3362 return HAL_ERROR;
3363 }
3364 else
3365 {
3366 return HAL_TIMEOUT;
3367 }
3368 }
3369
3370 return HAL_OK;
3371 }
3372
3373 /**
3374 * @brief DMA I2C master transmit process complete callback.
3375 * @param hdma: DMA handle
3376 * @retval None
3377 */
3378 static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma)
3379 {
3380 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3381
3382 /* Wait until BTF flag is reset */
3383 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
3384 {
3385 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3386 }
3387
3388 /* Generate Stop */
3389 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
3390
3391 /* Disable DMA Request */
3392 CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
3393
3394 hi2c->XferCount = 0;
3395
3396 /* Wait until BUSY flag is reset */
3397 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3398 {
3399 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3400 }
3401
3402 hi2c->State = HAL_I2C_STATE_READY;
3403
3404 /* Check if Errors has been detected during transfer */
3405 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3406 {
3407 HAL_I2C_ErrorCallback(hi2c);
3408 }
3409 else
3410 {
3411 HAL_I2C_MasterTxCpltCallback(hi2c);
3412 }
3413 }
3414
3415 /**
3416 * @brief DMA I2C slave transmit process complete callback.
3417 * @param hdma: DMA handle
3418 * @retval None
3419 */
3420 static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma)
3421 {
3422 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3423
3424 /* Wait until AF flag is reset */
3425 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
3426 {
3427 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3428 }
3429
3430 /* Clear AF flag */
3431 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
3432
3433 /* Disable Address Acknowledge */
3434 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3435
3436 /* Disable DMA Request */
3437 CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
3438
3439 hi2c->XferCount = 0;
3440
3441 /* Wait until BUSY flag is reset */
3442 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3443 {
3444 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3445 }
3446
3447 hi2c->State = HAL_I2C_STATE_READY;
3448
3449 /* Check if Errors has been detected during transfer */
3450 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3451 {
3452 HAL_I2C_ErrorCallback(hi2c);
3453 }
3454 else
3455 {
3456 HAL_I2C_SlaveTxCpltCallback(hi2c);
3457 }
3458 }
3459
3460 /**
3461 * @brief DMA I2C master receive process complete callback
3462 * @param hdma: DMA handle
3463 * @retval None
3464 */
3465 static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma)
3466 {
3467 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3468
3469 /* Generate Stop */
3470 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
3471
3472 /* Disable Last DMA */
3473 CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
3474
3475 /* Disable Acknowledge */
3476 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3477
3478 /* Disable DMA Request */
3479 CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
3480
3481 hi2c->XferCount = 0;
3482
3483 /* Wait until BUSY flag is reset */
3484 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3485 {
3486 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3487 }
3488
3489 hi2c->State = HAL_I2C_STATE_READY;
3490
3491 /* Check if Errors has been detected during transfer */
3492 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3493 {
3494 HAL_I2C_ErrorCallback(hi2c);
3495 }
3496 else
3497 {
3498 HAL_I2C_MasterRxCpltCallback(hi2c);
3499 }
3500 }
3501
3502 /**
3503 * @brief DMA I2C slave receive process complete callback.
3504 * @param hdma: DMA handle
3505 * @retval None
3506 */
3507 static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma)
3508 {
3509 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3510
3511 /* Wait until STOPF flag is reset */
3512 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
3513 {
3514 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3515 }
3516
3517 /* Clear STOPF flag */
3518 __HAL_I2C_CLEAR_STOPFLAG(hi2c);
3519
3520 /* Disable Address Acknowledge */
3521 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3522
3523 /* Disable DMA Request */
3524 CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
3525
3526 hi2c->XferCount = 0;
3527
3528 /* Wait until BUSY flag is reset */
3529 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3530 {
3531 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3532 }
3533
3534 hi2c->State = HAL_I2C_STATE_READY;
3535
3536 /* Check if Errors has been detected during transfer */
3537 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3538 {
3539 HAL_I2C_ErrorCallback(hi2c);
3540 }
3541 else
3542 {
3543 HAL_I2C_SlaveRxCpltCallback(hi2c);
3544 }
3545 }
3546
3547 /**
3548 * @brief DMA I2C Memory Write process complete callback
3549 * @param hdma: DMA handle
3550 * @retval None
3551 */
3552 static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma)
3553 {
3554 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3555
3556 /* Wait until BTF flag is reset */
3557 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
3558 {
3559 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3560 }
3561
3562 /* Generate Stop */
3563 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
3564
3565 /* Disable DMA Request */
3566 CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
3567
3568 hi2c->XferCount = 0;
3569
3570 /* Wait until BUSY flag is reset */
3571 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3572 {
3573 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3574 }
3575
3576 hi2c->State = HAL_I2C_STATE_READY;
3577
3578 /* Check if Errors has been detected during transfer */
3579 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3580 {
3581 HAL_I2C_ErrorCallback(hi2c);
3582 }
3583 else
3584 {
3585 HAL_I2C_MemTxCpltCallback(hi2c);
3586 }
3587 }
3588
3589 /**
3590 * @brief DMA I2C Memory Read process complete callback
3591 * @param hdma: DMA handle
3592 * @retval None
3593 */
3594 static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma)
3595 {
3596 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3597
3598 /* Generate Stop */
3599 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
3600
3601 /* Disable Last DMA */
3602 CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
3603
3604 /* Disable Acknowledge */
3605 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3606
3607 /* Disable DMA Request */
3608 CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
3609
3610 hi2c->XferCount = 0;
3611
3612 /* Wait until BUSY flag is reset */
3613 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3614 {
3615 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3616 }
3617
3618 hi2c->State = HAL_I2C_STATE_READY;
3619
3620 /* Check if Errors has been detected during transfer */
3621 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3622 {
3623 HAL_I2C_ErrorCallback(hi2c);
3624 }
3625 else
3626 {
3627 HAL_I2C_MemRxCpltCallback(hi2c);
3628 }
3629 }
3630
3631 /**
3632 * @brief I2C Configuration Speed function
3633 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
3634 * the configuration information for the specified I2C.
3635 * @param I2CClkSrcFreq: PCLK frequency from RCC.
3636 * @retval CCR Speed: Speed to set in I2C CCR Register
3637 */
3638 static uint32_t I2C_Configure_Speed(I2C_HandleTypeDef *hi2c, uint32_t I2CClkSrcFreq)
3639 {
3640 uint32_t tmp1 = 0;
3641
3642 /* Clock Standard Mode */
3643 if(hi2c->Init.ClockSpeed <= I2C_STANDARD_MODE_MAX_CLK)
3644 {
3645 /* Calculate Value to be set in CCR register */
3646 tmp1 = (I2CClkSrcFreq/(hi2c->Init.ClockSpeed << 1));
3647
3648 /* The minimum allowed value set in CCR register is 0x04 for Standard Mode */
3649 if( (tmp1 & I2C_CCR_CCR) < 4 )
3650 {
3651 return 4;
3652 }
3653 else
3654 {
3655 return tmp1;
3656 }
3657 }
3658 else
3659 {
3660 /* Clock Fast Mode */
3661 tmp1 = I2C_CCR_FS;
3662
3663 /* Duty Cylce tLow/tHigh = 2 */
3664 if(hi2c->Init.DutyCycle == I2C_DUTYCYCLE_2)
3665 {
3666 tmp1 |= (I2CClkSrcFreq/(hi2c->Init.ClockSpeed * 3)) | I2C_DUTYCYCLE_2;
3667 }
3668 else /* Duty Cylce tLow/tHigh = 16/9 */
3669 {
3670 tmp1 |= (I2CClkSrcFreq/(hi2c->Init.ClockSpeed * 25)) | I2C_DUTYCYCLE_16_9;
3671 }
3672
3673 /* The minimum allowed value set in CCR register is 0x01 for Fast Mode */
3674 if( (tmp1 & I2C_CCR_CCR) < 1 )
3675 {
3676 return 1;
3677 }
3678 else
3679 {
3680 return tmp1;
3681 }
3682 }
3683 }
3684
3685 /**
3686 * @brief DMA I2C communication error callback.
3687 * @param hdma: DMA handle
3688 * @retval None
3689 */
3690 static void I2C_DMAError(DMA_HandleTypeDef *hdma)
3691 {
3692 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3693
3694 /* Disable Acknowledge */
3695 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3696
3697 hi2c->XferCount = 0;
3698
3699 hi2c->State = HAL_I2C_STATE_READY;
3700
3701 hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
3702
3703 HAL_I2C_ErrorCallback(hi2c);
3704 }
3705
3706 /**
3707 * @brief This function handles I2C Communication Timeout.
3708 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
3709 * the configuration information for the specified I2C.
3710 * @param Flag: specifies the I2C flag to check.
3711 * @param Status: The new Flag status (SET or RESET).
3712 * @param Timeout: Timeout duration
3713 * @retval HAL status
3714 */
3715 static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
3716 {
3717 uint32_t tickstart = 0;
3718
3719 /* Get tick */
3720 tickstart = HAL_GetTick();
3721
3722 /* Wait until flag is set */
3723 if(Status == RESET)
3724 {
3725 while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
3726 {
3727 /* Check for the Timeout */
3728 if(Timeout != HAL_MAX_DELAY)
3729 {
3730 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
3731 {
3732 hi2c->State= HAL_I2C_STATE_READY;
3733
3734 /* Process Unlocked */
3735 __HAL_UNLOCK(hi2c);
3736
3737 return HAL_TIMEOUT;
3738 }
3739 }
3740 }
3741 }
3742 else
3743 {
3744 while(__HAL_I2C_GET_FLAG(hi2c, Flag) != RESET)
3745 {
3746 /* Check for the Timeout */
3747 if(Timeout != HAL_MAX_DELAY)
3748 {
3749 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
3750 {
3751 hi2c->State= HAL_I2C_STATE_READY;
3752
3753 /* Process Unlocked */
3754 __HAL_UNLOCK(hi2c);
3755
3756 return HAL_TIMEOUT;
3757 }
3758 }
3759 }
3760 }
3761 return HAL_OK;
3762 }
3763
3764 /**
3765 * @brief This function handles I2C Communication Timeout for Master addressing phase.
3766 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
3767 * the configuration information for the specified I2C.
3768 * @param Flag: specifies the I2C flag to check.
3769 * @param Timeout: Timeout duration
3770 * @retval HAL status
3771 */
3772 static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout)
3773 {
3774 uint32_t tickstart = 0;
3775
3776 /* Get tick */
3777 tickstart = HAL_GetTick();
3778
3779 while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
3780 {
3781 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
3782 {
3783 /* Generate Stop */
3784 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
3785
3786 /* Clear AF Flag */
3787 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
3788
3789 hi2c->ErrorCode = HAL_I2C_ERROR_AF;
3790 hi2c->State= HAL_I2C_STATE_READY;
3791
3792 /* Process Unlocked */
3793 __HAL_UNLOCK(hi2c);
3794
3795 return HAL_ERROR;
3796 }
3797
3798 /* Check for the Timeout */
3799 if(Timeout != HAL_MAX_DELAY)
3800 {
3801 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
3802 {
3803 hi2c->State= HAL_I2C_STATE_READY;
3804
3805 /* Process Unlocked */
3806 __HAL_UNLOCK(hi2c);
3807
3808 return HAL_TIMEOUT;
3809 }
3810 }
3811 }
3812 return HAL_OK;
3813 }
3814
3815 /**
3816 * @}
3817 */
3818
3819 #endif /* HAL_I2C_MODULE_ENABLED */
3820
3821 /**
3822 * @}
3823 */
3824
3825 /**
3826 * @}
3827 */
3828
3829 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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