tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal_spi.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f1xx_hal_spi.h
   4   * @author  MCD Application Team
   5   * @version V1.0.0
   6   * @date    15-December-2014
   7   * @brief   Header file of SPI HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32F1xx_HAL_SPI_H
  40 #define __STM32F1xx_HAL_SPI_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 /* Includes ------------------------------------------------------------------*/
  47 #include "stm32f1xx_hal_def.h"
  48
  49 /** @addtogroup STM32F1xx_HAL_Driver
  50   * @{
  51   */
  52
  53 /** @addtogroup SPI
  54   * @{
  55   */
  56
  57 /* Exported types ------------------------------------------------------------*/
  58 /** @defgroup SPI_Exported_Types SPI Exported Types
  59   * @{
  60   */
  61
  62 /**
  63   * @brief  SPI Configuration Structure definition
  64   */
  65 typedef struct
  66 {
  67   uint32_t Mode;               /*!< Specifies the SPI operating mode.
  68                                     This parameter can be a value of @ref SPI_mode */
  69
  70   uint32_t Direction;          /*!< Specifies the SPI Directional mode state.
  71                                     This parameter can be a value of @ref SPI_Direction_mode */
  72
  73   uint32_t DataSize;           /*!< Specifies the SPI data size.
  74                                     This parameter can be a value of @ref SPI_data_size */
  75
  76   uint32_t CLKPolarity;        /*!< Specifies the serial clock steady state.
  77                                     This parameter can be a value of @ref SPI_Clock_Polarity */
  78
  79   uint32_t CLKPhase;           /*!< Specifies the clock active edge for the bit capture.
  80                                     This parameter can be a value of @ref SPI_Clock_Phase */
  81
  82   uint32_t NSS;                /*!< Specifies whether the NSS signal is managed by
  83                                     hardware (NSS pin) or by software using the SSI bit.
  84                                     This parameter can be a value of @ref SPI_Slave_Select_management */
  85
  86   uint32_t BaudRatePrescaler;  /*!< Specifies the Baud Rate prescaler value which will be
  87                                     used to configure the transmit and receive SCK clock.
  88                                     This parameter can be a value of @ref SPI_BaudRate_Prescaler
  89                                     @note The communication clock is derived from the master
  90                                     clock. The slave clock does not need to be set */
  91
  92   uint32_t FirstBit;           /*!< Specifies whether data transfers start from MSB or LSB bit.
  93                                     This parameter can be a value of @ref SPI_MSB_LSB_transmission */
  94
  95   uint32_t TIMode;             /*!< Specifies if the TI mode is enabled or not.
  96                                     This parameter can be a value of @ref SPI_TI_mode */
  97
  98   uint32_t CRCCalculation;     /*!< Specifies if the CRC calculation is enabled or not.
  99                                     This parameter can be a value of @ref SPI_CRC_Calculation */
 100
 101   uint32_t CRCPolynomial;      /*!< Specifies the polynomial used for the CRC calculation.
 102                                     This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
 103
 104 }SPI_InitTypeDef;
 105
 106 /**
 107   * @brief  HAL SPI State structure definition
 108   */
 109 typedef enum
 110 {
 111   HAL_SPI_STATE_RESET      = 0x00,  /*!< SPI not yet initialized or disabled                */
 112   HAL_SPI_STATE_READY      = 0x01,  /*!< SPI initialized and ready for use                  */
 113   HAL_SPI_STATE_BUSY       = 0x02,  /*!< SPI process is ongoing                             */
 114   HAL_SPI_STATE_BUSY_TX    = 0x12,  /*!< Data Transmission process is ongoing               */
 115   HAL_SPI_STATE_BUSY_RX    = 0x22,  /*!< Data Reception process is ongoing                  */
 116   HAL_SPI_STATE_BUSY_TX_RX = 0x32,  /*!< Data Transmission and Reception process is ongoing */
 117   HAL_SPI_STATE_ERROR      = 0x03   /*!< SPI error state                                    */
 118
 119 }HAL_SPI_StateTypeDef;
 120
 121
 122 /**
 123   * @brief  SPI handle Structure definition
 124   */
 125 typedef struct __SPI_HandleTypeDef
 126 {
 127   SPI_TypeDef                *Instance;    /*!< SPI registers base address */
 128
 129   SPI_InitTypeDef            Init;         /*!< SPI communication parameters */
 130
 131   uint8_t                    *pTxBuffPtr;  /*!< Pointer to SPI Tx transfer Buffer */
 132
 133   uint16_t                   TxXferSize;   /*!< SPI Tx transfer size */
 134
 135   uint16_t                   TxXferCount;  /*!< SPI Tx Transfer Counter */
 136
 137   uint8_t                    *pRxBuffPtr;  /*!< Pointer to SPI Rx transfer Buffer */
 138
 139   uint16_t                   RxXferSize;   /*!< SPI Rx transfer size */
 140
 141   uint16_t                   RxXferCount;  /*!< SPI Rx Transfer Counter */
 142
 143   DMA_HandleTypeDef          *hdmatx;      /*!< SPI Tx DMA handle parameters */
 144
 145   DMA_HandleTypeDef          *hdmarx;      /*!< SPI Rx DMA handle parameters */
 146
 147   void                       (*RxISR)(struct __SPI_HandleTypeDef * hspi); /*!< function pointer on Rx ISR */
 148
 149   void                       (*TxISR)(struct __SPI_HandleTypeDef * hspi); /*!< function pointer on Tx ISR */
 150
 151   HAL_LockTypeDef            Lock;         /*!< SPI locking object */
 152
 153   __IO HAL_SPI_StateTypeDef  State;        /*!< SPI communication state */
 154
 155   __IO uint32_t  ErrorCode;    /*!< SPI Error code */
 156
 157 }SPI_HandleTypeDef;
 158 /**
 159   * @}
 160   */
 161
 162
 163 /* Exported constants --------------------------------------------------------*/
 164
 165 /** @defgroup SPI_Exported_Constants SPI Exported Constants
 166   * @{
 167   */
 168
 169 /** @defgroup SPI_Error_Codes SPI Error Codes
 170   * @{
 171   */
 172 #define HAL_SPI_ERROR_NONE      ((uint32_t)0x00)    /*!< No error             */
 173 #define HAL_SPI_ERROR_MODF      ((uint32_t)0x01)    /*!< MODF error           */
 174 #define HAL_SPI_ERROR_CRC       ((uint32_t)0x02)    /*!< CRC error            */
 175 #define HAL_SPI_ERROR_OVR       ((uint32_t)0x04)    /*!< OVR error            */
 176 #define HAL_SPI_ERROR_DMA       ((uint32_t)0x08)    /*!< DMA transfer error   */
 177 #define HAL_SPI_ERROR_FLAG      ((uint32_t)0x10)    /*!< Flag: RXNE,TXE, BSY  */
 178 /**
 179   * @}
 180   */
 181
 182
 183
 184
 185 /** @defgroup SPI_mode SPI mode
 186   * @{
 187   */
 188 #define SPI_MODE_SLAVE                  ((uint32_t)0x00000000)
 189 #define SPI_MODE_MASTER                 (SPI_CR1_MSTR | SPI_CR1_SSI)
 190
 191 /**
 192   * @}
 193   */
 194
 195 /** @defgroup SPI_Direction_mode SPI Direction mode
 196   * @{
 197   */
 198 #define SPI_DIRECTION_2LINES            ((uint32_t)0x00000000)
 199 #define SPI_DIRECTION_2LINES_RXONLY     SPI_CR1_RXONLY
 200 #define SPI_DIRECTION_1LINE             SPI_CR1_BIDIMODE
 201
 202 /**
 203   * @}
 204   */
 205
 206 /** @defgroup SPI_data_size SPI data size
 207   * @{
 208   */
 209 #define SPI_DATASIZE_8BIT               ((uint32_t)0x00000000)
 210 #define SPI_DATASIZE_16BIT              SPI_CR1_DFF
 211
 212 /**
 213   * @}
 214   */
 215
 216 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity
 217   * @{
 218   */
 219 #define SPI_POLARITY_LOW                ((uint32_t)0x00000000)
 220 #define SPI_POLARITY_HIGH               SPI_CR1_CPOL
 221
 222 /**
 223   * @}
 224   */
 225
 226 /** @defgroup SPI_Clock_Phase SPI Clock Phase
 227   * @{
 228   */
 229 #define SPI_PHASE_1EDGE                 ((uint32_t)0x00000000)
 230 #define SPI_PHASE_2EDGE                 SPI_CR1_CPHA
 231
 232 /**
 233   * @}
 234   */
 235
 236 /** @defgroup SPI_Slave_Select_management SPI Slave Select management
 237   * @{
 238   */
 239 #define SPI_NSS_SOFT                    SPI_CR1_SSM
 240 #define SPI_NSS_HARD_INPUT              ((uint32_t)0x00000000)
 241 #define SPI_NSS_HARD_OUTPUT             ((uint32_t)(SPI_CR2_SSOE << 16))
 242
 243 /**
 244   * @}
 245   */
 246
 247 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
 248   * @{
 249   */
 250 #define SPI_BAUDRATEPRESCALER_2         ((uint32_t)0x00000000)
 251 #define SPI_BAUDRATEPRESCALER_4         ((uint32_t)SPI_CR1_BR_0)
 252 #define SPI_BAUDRATEPRESCALER_8         ((uint32_t)SPI_CR1_BR_1)
 253 #define SPI_BAUDRATEPRESCALER_16        ((uint32_t)SPI_CR1_BR_1 | SPI_CR1_BR_0)
 254 #define SPI_BAUDRATEPRESCALER_32        ((uint32_t)SPI_CR1_BR_2)
 255 #define SPI_BAUDRATEPRESCALER_64        ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_0)
 256 #define SPI_BAUDRATEPRESCALER_128       ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_1)
 257 #define SPI_BAUDRATEPRESCALER_256       ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0)
 258
 259 /**
 260   * @}
 261   */
 262
 263 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB transmission
 264   * @{
 265   */
 266 #define SPI_FIRSTBIT_MSB                ((uint32_t)0x00000000)
 267 #define SPI_FIRSTBIT_LSB                SPI_CR1_LSBFIRST
 268
 269 /**
 270   * @}
 271   */
 272
 273 /** @defgroup SPI_TI_mode SPI TI mode disable
 274   * @brief  SPI TI Mode not supported for STM32F1xx family
 275   * @{
 276   */
 277 #define SPI_TIMODE_DISABLE             ((uint32_t)0x00000000)
 278
 279 /**
 280   * @}
 281   */
 282
 283 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation
 284   * @{
 285   */
 286 #define SPI_CRCCALCULATION_DISABLE      ((uint32_t)0x00000000)
 287 #define SPI_CRCCALCULATION_ENABLE       SPI_CR1_CRCEN
 288
 289 /**
 290   * @}
 291   */
 292
 293 /** @defgroup SPI_Interrupt_configuration_definition SPI Interrupt configuration definition
 294   * @{
 295   */
 296 #define SPI_IT_TXE                      SPI_CR2_TXEIE
 297 #define SPI_IT_RXNE                     SPI_CR2_RXNEIE
 298 #define SPI_IT_ERR                      SPI_CR2_ERRIE
 299 /**
 300   * @}
 301   */
 302
 303 /** @defgroup SPI_Flag_definition SPI Flag definition
 304   * @{
 305   */
 306 #define SPI_FLAG_RXNE                   SPI_SR_RXNE
 307 #define SPI_FLAG_TXE                    SPI_SR_TXE
 308 #define SPI_FLAG_CRCERR                 SPI_SR_CRCERR
 309 #define SPI_FLAG_MODF                   SPI_SR_MODF
 310 #define SPI_FLAG_OVR                    SPI_SR_OVR
 311 #define SPI_FLAG_BSY                    SPI_SR_BSY
 312
 313 /**
 314   * @}
 315   */
 316
 317 /**
 318   * @}
 319   */
 320
 321
 322 /* Private constants ---------------------------------------------------------*/
 323 /** @defgroup SPI_Private_Constants SPI Private Constants
 324   * @{
 325   */
 326 #define SPI_INVALID_CRC_ERROR     0          /* CRC error wrongly detected */
 327 #define SPI_VALID_CRC_ERROR       1          /* CRC error is true */
 328 /**
 329   * @}
 330   */
 331
 332
 333 /* Exported macro ------------------------------------------------------------*/
 334 /** @defgroup SPI_Exported_Macros SPI Exported Macros
 335   * @{
 336   */
 337
 338 /** @brief Reset SPI handle state
 339   * @param  __HANDLE__: specifies the SPI handle.
 340   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 341   * @retval None
 342   */
 343 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
 344
 345 /** @brief  Enable the specified SPI interrupts.
 346   * @param  __HANDLE__: specifies the SPI handle.
 347   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 348   * @param  __INTERRUPT__: specifies the interrupt source to enable.
 349   *         This parameter can be one of the following values:
 350   *            @arg SPI_IT_TXE: Tx buffer empty interrupt enable
 351   *            @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
 352   *            @arg SPI_IT_ERR: Error interrupt enable
 353   * @retval None
 354   */
 355 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__)   SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
 356
 357 /** @brief  Disable the specified SPI interrupts.
 358   * @param  __HANDLE__: specifies the SPI handle.
 359   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 360   * @param  __INTERRUPT__: specifies the interrupt source to disable.
 361   *         This parameter can be one of the following values:
 362   *            @arg SPI_IT_TXE: Tx buffer empty interrupt enable
 363   *            @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
 364   *            @arg SPI_IT_ERR: Error interrupt enable
 365   * @retval None
 366   */
 367 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__)  CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
 368
 369 /** @brief  Check if the specified SPI interrupt source is enabled or disabled.
 370   * @param  __HANDLE__: specifies the SPI handle.
 371   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 372   * @param  __INTERRUPT__: specifies the SPI interrupt source to check.
 373   *          This parameter can be one of the following values:
 374   *             @arg SPI_IT_TXE: Tx buffer empty interrupt enable
 375   *             @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
 376   *             @arg SPI_IT_ERR: Error interrupt enable
 377   * @retval The new state of __IT__ (TRUE or FALSE).
 378   */
 379 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
 380
 381 /** @brief  Check whether the specified SPI flag is set or not.
 382   * @param  __HANDLE__: specifies the SPI handle.
 383   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 384   * @param  __FLAG__: specifies the flag to check.
 385   *         This parameter can be one of the following values:
 386   *            @arg SPI_FLAG_RXNE: Receive buffer not empty flag
 387   *            @arg SPI_FLAG_TXE: Transmit buffer empty flag
 388   *            @arg SPI_FLAG_CRCERR: CRC error flag
 389   *            @arg SPI_FLAG_MODF: Mode fault flag
 390   *            @arg SPI_FLAG_OVR: Overrun flag
 391   *            @arg SPI_FLAG_BSY: Busy flag
 392   * @retval The new state of __FLAG__ (TRUE or FALSE).
 393   */
 394 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
 395
 396 /** @brief  Clear the SPI CRCERR pending flag.
 397   * @param  __HANDLE__: specifies the SPI handle.
 398   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 399   * @retval None
 400   */
 401 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = ~(SPI_FLAG_CRCERR))
 402
 403 /** @brief  Clear the SPI MODF pending flag.
 404   * @param  __HANDLE__: specifies the SPI handle.
 405   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 406   * @retval None
 407   */
 408 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__)                      \
 409 do{                                                               \
 410     __IO uint32_t tmpreg;                                         \
 411     tmpreg = (__HANDLE__)->Instance->SR;                          \
 412     tmpreg = CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE); \
 413     UNUSED(tmpreg);                                               \
 414 }while(0)
 415
 416 /** @brief  Clear the SPI OVR pending flag.
 417   * @param  __HANDLE__: specifies the SPI handle.
 418   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 419   * @retval None
 420   */
 421 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__)                \
 422 do{                                                        \
 423     __IO uint32_t tmpreg;                                  \
 424     tmpreg = (__HANDLE__)->Instance->DR;                   \
 425     tmpreg = (__HANDLE__)->Instance->SR;                   \
 426     UNUSED(tmpreg);                                        \
 427 }while(0)
 428
 429
 430 /** @brief  Enables the SPI.
 431   * @param  __HANDLE__: specifies the SPI Handle.
 432   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 433   * @retval None
 434   */
 435 #define __HAL_SPI_ENABLE(__HANDLE__)  SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)
 436
 437 /** @brief  Disables the SPI.
 438   * @param  __HANDLE__: specifies the SPI Handle.
 439   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 440   * @retval None
 441   */
 442 #define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)
 443
 444 /**
 445   * @}
 446   */
 447
 448
 449 /* Private macros -----------------------------------------------------------*/
 450 /** @defgroup SPI_Private_Macros SPI Private Macros
 451   * @{
 452   */
 453
 454 /** @brief  Checks if SPI Mode parameter is in allowed range.
 455   * @param  __MODE__: specifies the SPI Mode.
 456   *         This parameter can be a value of @ref SPI_mode
 457   * @retval None
 458   */
 459 #define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_SLAVE) || ((__MODE__) == SPI_MODE_MASTER))
 460
 461 /** @brief  Checks if SPI Direction Mode parameter is in allowed range.
 462   * @param  __MODE__: specifies the SPI Direction Mode.
 463   *         This parameter can be a value of @ref SPI_Direction_mode
 464   * @retval None
 465   */
 466 #define IS_SPI_DIRECTION_MODE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES)        || \
 467                                          ((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \
 468                                          ((__MODE__) == SPI_DIRECTION_1LINE))
 469
 470 /** @brief  Checks if SPI Direction Mode parameter is 1 or 2 lines.
 471   * @param  __MODE__: specifies the SPI Direction Mode.
 472   * @retval None
 473   */
 474 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES)  || \
 475                                                     ((__MODE__) == SPI_DIRECTION_1LINE))
 476
 477 /** @brief  Checks if SPI Direction Mode parameter is 2 lines.
 478   * @param  __MODE__: specifies the SPI Direction Mode.
 479   * @retval None
 480   */
 481 #define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES)
 482
 483 /** @brief  Checks if SPI Data Size parameter is in allowed range.
 484   * @param  __DATASIZE__: specifies the SPI Data Size.
 485   *         This parameter can be a value of @ref SPI_data_size
 486   * @retval None
 487   */
 488 #define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) == SPI_DATASIZE_16BIT) || \
 489                                        ((__DATASIZE__) == SPI_DATASIZE_8BIT))
 490
 491 /** @brief  Checks if SPI Serial clock steady state parameter is in allowed range.
 492   * @param  __CPOL__: specifies the SPI serial clock steady state.
 493   *         This parameter can be a value of @ref SPI_Clock_Polarity
 494   * @retval None
 495   */
 496 #define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \
 497                                ((__CPOL__) == SPI_POLARITY_HIGH))
 498
 499 /** @brief  Checks if SPI Clock Phase parameter is in allowed range.
 500   * @param  __CPHA__: specifies the SPI Clock Phase.
 501   *         This parameter can be a value of @ref SPI_Clock_Phase
 502   * @retval None
 503   */
 504 #define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \
 505                                ((__CPHA__) == SPI_PHASE_2EDGE))
 506
 507 /** @brief  Checks if SPI Slave select parameter is in allowed range.
 508   * @param  __NSS__: specifies the SPI Slave Slelect management parameter.
 509   *         This parameter can be a value of @ref SPI_Slave_Select_management
 510   * @retval None
 511   */
 512 #define IS_SPI_NSS(__NSS__) (((__NSS__) == SPI_NSS_SOFT)       || \
 513                              ((__NSS__) == SPI_NSS_HARD_INPUT) || \
 514                              ((__NSS__) == SPI_NSS_HARD_OUTPUT))
 515
 516 /** @brief  Checks if SPI Baudrate prescaler parameter is in allowed range.
 517   * @param  __PRESCALER__: specifies the SPI Baudrate prescaler.
 518   *         This parameter can be a value of @ref SPI_BaudRate_Prescaler
 519   * @retval None
 520   */
 521 #define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2)   || \
 522                                                   ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4)   || \
 523                                                   ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8)   || \
 524                                                   ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16)  || \
 525                                                   ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32)  || \
 526                                                   ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64)  || \
 527                                                   ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) || \
 528                                                   ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256))
 529
 530 /** @brief  Checks if SPI MSB LSB transmission parameter is in allowed range.
 531   * @param  __BIT__: specifies the SPI MSB LSB transmission (whether data transfer starts from MSB or LSB bit).
 532   *         This parameter can be a value of @ref SPI_MSB_LSB_transmission
 533   * @retval None
 534   */
 535 #define IS_SPI_FIRST_BIT(__BIT__) (((__BIT__) == SPI_FIRSTBIT_MSB) || \
 536                                    ((__BIT__) == SPI_FIRSTBIT_LSB))
 537
 538 /** @brief  Checks if SPI TI mode parameter is in allowed range.
 539   * @param  __MODE__: specifies the SPI TI mode.
 540   *         This parameter can be a value of @ref SPI_TI_mode
 541   * @retval None
 542   */
 543 #define IS_SPI_TIMODE(__MODE__) ((__MODE__) == SPI_TIMODE_DISABLE)
 544
 545 /** @brief  Checks if SPI CRC calculation enabled state is in allowed range.
 546   * @param  __CALCULATION__: specifies the SPI CRC calculation enable state.
 547   *         This parameter can be a value of @ref SPI_CRC_Calculation
 548   * @retval None
 549   */
 550 #define IS_SPI_CRC_CALCULATION(__CALCULATION__) (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) || \
 551                                                  ((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE))
 552
 553 /** @brief  Checks if SPI polynomial value to be used for the CRC calculation, is in allowed range.
 554   * @param  __POLYNOMIAL__: specifies the SPI polynomial value to be used for the CRC calculation.
 555   *         This parameter must be a number between Min_Data = 0 and Max_Data = 65535
 556   * @retval None
 557   */
 558 #define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1) && ((__POLYNOMIAL__) <= 0xFFFF))
 559
 560 /** @brief  Sets the SPI transmit-only mode.
 561   * @param  __HANDLE__: specifies the SPI Handle.
 562   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 563   * @retval None
 564   */
 565 #define SPI_1LINE_TX(__HANDLE__)  SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE)
 566
 567 /** @brief  Sets the SPI receive-only mode.
 568   * @param  __HANDLE__: specifies the SPI Handle.
 569   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 570   * @retval None
 571   */
 572 #define SPI_1LINE_RX(__HANDLE__)  CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE)
 573
 574 /** @brief  Resets the CRC calculation of the SPI.
 575   * @param  __HANDLE__: specifies the SPI Handle.
 576   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 577   * @retval None
 578   */
 579 #define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\
 580                                      SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0)
 581
 582 /**
 583   * @}
 584   */
 585
 586 /* Exported functions --------------------------------------------------------*/
 587 /** @addtogroup SPI_Exported_Functions
 588   * @{
 589   */
 590
 591 /* Initialization/de-initialization functions  **********************************/
 592 /** @addtogroup SPI_Exported_Functions_Group1
 593   * @{
 594   */
 595 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
 596 HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
 597 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
 598 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
 599 /**
 600   * @}
 601   */
 602
 603 /* I/O operation functions  *****************************************************/
 604 /** @addtogroup SPI_Exported_Functions_Group2
 605   * @{
 606   */
 607 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
 608 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
 609 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
 610 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
 611 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
 612 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
 613 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
 614 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
 615 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
 616 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
 617 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
 618 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
 619
 620 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
 621 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
 622 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
 623 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
 624 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
 625 void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
 626 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
 627 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
 628 /**
 629   * @}
 630   */
 631
 632
 633 /* Peripheral State and Control functions  **************************************/
 634 /** @addtogroup SPI_Exported_Functions_Group3
 635   * @{
 636   */
 637 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
 638 uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
 639
 640 /**
 641   * @}
 642   */
 643
 644 /**
 645   * @}
 646   */
 647
 648
 649 /* Private functions --------------------------------------------------------*/
 650 /** @addtogroup SPI_Private_Functions
 651   * @{
 652   */
 653 uint8_t SPI_ISCRCErrorValid(SPI_HandleTypeDef *hspi);
 654
 655 /**
 656   * @}
 657   */
 658
 659
 660 /**
 661   * @}
 662   */
 663
 664 /**
 665   * @}
 666   */
 667
 668 #ifdef __cplusplus
 669 }
 670 #endif
 671
 672 #endif /* __STM32F1xx_HAL_SPI_H */
 673
 674 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/