tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_can.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f3xx_hal_can.h
   4   * @author  MCD Application Team
   5   * @version V1.1.0
   6   * @date    12-Sept-2014
   7   * @brief   Header file of CAN HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32F3xx_CAN_H
  40 #define __STM32F3xx_CAN_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
  47     defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
  48     defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
  49     defined(STM32F302x8)                                                 || \
  50     defined(STM32F373xC) || defined(STM32F378xx)
  51
  52 /* Includes ------------------------------------------------------------------*/
  53 #include "stm32f3xx_hal_def.h"
  54
  55 /** @addtogroup STM32F3xx_HAL_Driver
  56   * @{
  57   */
  58
  59 /** @addtogroup CAN
  60   * @{
  61   */
  62
  63 /* Exported types ------------------------------------------------------------*/
  64 /** @defgroup CAN_Exported_Types CAN Exported Types
  65   * @{
  66   */
  67 /**
  68   * @brief  HAL State structures definition
  69   */
  70 typedef enum
  71 {
  72   HAL_CAN_STATE_RESET             = 0x00,  /*!< CAN not yet initialized or disabled */
  73   HAL_CAN_STATE_READY             = 0x01,  /*!< CAN initialized and ready for use   */
  74   HAL_CAN_STATE_BUSY              = 0x02,  /*!< CAN process is ongoing              */
  75   HAL_CAN_STATE_BUSY_TX           = 0x12,  /*!< CAN process is ongoing              */
  76   HAL_CAN_STATE_BUSY_RX           = 0x22,  /*!< CAN process is ongoing              */
  77   HAL_CAN_STATE_BUSY_TX_RX        = 0x32,  /*!< CAN process is ongoing              */
  78   HAL_CAN_STATE_TIMEOUT           = 0x03,  /*!< CAN in Timeout state                */
  79   HAL_CAN_STATE_ERROR             = 0x04   /*!< CAN error state                     */
  80
  81 }HAL_CAN_StateTypeDef;
  82
  83 /**
  84   * @brief  HAL CAN Error Code structure definition
  85   */
  86 typedef enum
  87 {
  88   HAL_CAN_ERROR_NONE              = 0x00,  /*!< No error             */
  89   HAL_CAN_ERROR_EWG               = 0x01,  /*!< EWG error            */
  90   HAL_CAN_ERROR_EPV               = 0x02,  /*!< EPV error            */
  91   HAL_CAN_ERROR_BOF               = 0x04,  /*!< BOF error            */
  92   HAL_CAN_ERROR_STF               = 0x08,  /*!< Stuff error          */
  93   HAL_CAN_ERROR_FOR               = 0x10,  /*!< Form error           */
  94   HAL_CAN_ERROR_ACK               = 0x20,  /*!< Acknowledgment error */
  95   HAL_CAN_ERROR_BR                = 0x40,  /*!< Bit recessive        */
  96   HAL_CAN_ERROR_BD                = 0x80,  /*!< LEC dominant         */
  97   HAL_CAN_ERROR_CRC               = 0x100  /*!< LEC transfer error   */
  98 }HAL_CAN_ErrorTypeDef;
  99
 100 /**
 101   * @brief  CAN init structure definition
 102   */
 103 typedef struct
 104 {
 105   uint32_t Prescaler;  /*!< Specifies the length of a time quantum.
 106                             This parameter must be a number between Min_Data = 1 and Max_Data = 1024. */
 107
 108   uint32_t Mode;       /*!< Specifies the CAN operating mode.
 109                             This parameter can be a value of @ref CAN_operating_mode */
 110
 111   uint32_t SJW;        /*!< Specifies the maximum number of time quanta
 112                             the CAN hardware is allowed to lengthen or
 113                             shorten a bit to perform resynchronization.
 114                             This parameter can be a value of @ref CAN_synchronisation_jump_width */
 115
 116   uint32_t BS1;        /*!< Specifies the number of time quanta in Bit Segment 1.
 117                             This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
 118
 119   uint32_t BS2;        /*!< Specifies the number of time quanta in Bit Segment 2.
 120                             This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
 121
 122   uint32_t TTCM;       /*!< Enable or disable the time triggered communication mode.
 123                             This parameter can be set to ENABLE or DISABLE. */
 124
 125   uint32_t ABOM;       /*!< Enable or disable the automatic bus-off management.
 126                             This parameter can be set to ENABLE or DISABLE. */
 127
 128   uint32_t AWUM;       /*!< Enable or disable the automatic wake-up mode.
 129                             This parameter can be set to ENABLE or DISABLE. */
 130
 131   uint32_t NART;       /*!< Enable or disable the non-automatic retransmission mode.
 132                             This parameter can be set to ENABLE or DISABLE. */
 133
 134   uint32_t RFLM;       /*!< Enable or disable the Receive FIFO Locked mode.
 135                             This parameter can be set to ENABLE or DISABLE. */
 136
 137   uint32_t TXFP;       /*!< Enable or disable the transmit FIFO priority.
 138                             This parameter can be set to ENABLE or DISABLE. */
 139 }CAN_InitTypeDef;
 140
 141 /**
 142   * @brief  CAN filter configuration structure definition
 143   */
 144 typedef struct
 145 {
 146   uint32_t FilterIdHigh;          /*!< Specifies the filter identification number (MSBs for a 32-bit
 147                                        configuration, first one for a 16-bit configuration).
 148                                        This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
 149
 150   uint32_t FilterIdLow;           /*!< Specifies the filter identification number (LSBs for a 32-bit
 151                                        configuration, second one for a 16-bit configuration).
 152                                        This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
 153
 154   uint32_t FilterMaskIdHigh;      /*!< Specifies the filter mask number or identification number,
 155                                        according to the mode (MSBs for a 32-bit configuration,
 156                                        first one for a 16-bit configuration).
 157                                        This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
 158
 159   uint32_t FilterMaskIdLow;       /*!< Specifies the filter mask number or identification number,
 160                                        according to the mode (LSBs for a 32-bit configuration,
 161                                        second one for a 16-bit configuration).
 162                                        This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
 163
 164   uint32_t FilterFIFOAssignment;  /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter.
 165                                        This parameter can be a value of @ref CAN_filter_FIFO */
 166
 167   uint32_t FilterNumber;          /*!< Specifies the filter which will be initialized.
 168                                        This parameter must be a number between Min_Data = 0 and Max_Data = 27. */
 169
 170   uint32_t FilterMode;            /*!< Specifies the filter mode to be initialized.
 171                                        This parameter can be a value of @ref CAN_filter_mode */
 172
 173   uint32_t FilterScale;           /*!< Specifies the filter scale.
 174                                        This parameter can be a value of @ref CAN_filter_scale */
 175
 176   uint32_t FilterActivation;      /*!< Enable or disable the filter.
 177                                        This parameter can be set to ENABLE or DISABLE. */
 178
 179   uint32_t BankNumber;            /*!< Select the start slave bank filter
 180                                        This parameter must be a number between Min_Data = 0 and Max_Data = 28. */
 181
 182 }CAN_FilterConfTypeDef;
 183
 184 /**
 185   * @brief  CAN Tx message structure definition
 186   */
 187 typedef struct
 188 {
 189   uint32_t StdId;    /*!< Specifies the standard identifier.
 190                           This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */
 191
 192   uint32_t ExtId;    /*!< Specifies the extended identifier.
 193                           This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */
 194
 195   uint32_t IDE;      /*!< Specifies the type of identifier for the message that will be transmitted.
 196                           This parameter can be a value of @ref CAN_identifier_type */
 197
 198   uint32_t RTR;      /*!< Specifies the type of frame for the message that will be transmitted.
 199                           This parameter can be a value of @ref CAN_remote_transmission_request */
 200
 201   uint32_t DLC;      /*!< Specifies the length of the frame that will be transmitted.
 202                           This parameter must be a number between Min_Data = 0 and Max_Data = 8. */
 203
 204   uint32_t Data[8];  /*!< Contains the data to be transmitted.
 205                           This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */
 206
 207 }CanTxMsgTypeDef;
 208
 209 /**
 210   * @brief  CAN Rx message structure definition
 211   */
 212 typedef struct
 213 {
 214   uint32_t StdId;       /*!< Specifies the standard identifier.
 215                              This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */
 216
 217   uint32_t ExtId;       /*!< Specifies the extended identifier.
 218                              This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */
 219
 220   uint32_t IDE;         /*!< Specifies the type of identifier for the message that will be received.
 221                              This parameter can be a value of @ref CAN_identifier_type */
 222
 223   uint32_t RTR;         /*!< Specifies the type of frame for the received message.
 224                              This parameter can be a value of @ref CAN_remote_transmission_request */
 225
 226   uint32_t DLC;         /*!< Specifies the length of the frame that will be received.
 227                              This parameter must be a number between Min_Data = 0 and Max_Data = 8. */
 228
 229   uint32_t Data[8];     /*!< Contains the data to be received.
 230                              This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */
 231
 232   uint32_t FMI;         /*!< Specifies the index of the filter the message stored in the mailbox passes through.
 233                              This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */
 234
 235   uint32_t FIFONumber;  /*!< Specifies the receive FIFO number.
 236                              This parameter can be CAN_FIFO0 or CAN_FIFO1 */
 237
 238 }CanRxMsgTypeDef;
 239
 240 /**
 241   * @brief  CAN handle Structure definition
 242   */
 243 typedef struct
 244 {
 245   CAN_TypeDef                 *Instance;  /*!< Register base address          */
 246
 247   CAN_InitTypeDef             Init;       /*!< CAN required parameters        */
 248
 249   CanTxMsgTypeDef*            pTxMsg;     /*!< Pointer to transmit structure  */
 250
 251   CanRxMsgTypeDef*            pRxMsg;     /*!< Pointer to reception structure */
 252
 253   HAL_LockTypeDef             Lock;       /*!< CAN locking object             */
 254
 255   __IO HAL_CAN_StateTypeDef   State;      /*!< CAN communication state        */
 256
 257   __IO HAL_CAN_ErrorTypeDef   ErrorCode;  /*!< CAN Error code                 */
 258
 259 }CAN_HandleTypeDef;
 260 /**
 261   * @}
 262   */
 263 /* Exported constants --------------------------------------------------------*/
 264
 265 /** @defgroup CAN_Exported_Constants CAN Exported Constants
 266   * @{
 267   */
 268
 269 /** @defgroup CAN_InitStatus CAN initialization Status
 270   * @{
 271   */
 272 #define CAN_INITSTATUS_FAILED       ((uint32_t)0x00000000)  /*!< CAN initialization failed */
 273 #define CAN_INITSTATUS_SUCCESS      ((uint32_t)0x00000001)  /*!< CAN initialization OK */
 274 /**
 275   * @}
 276   */
 277
 278 /** @defgroup CAN_operating_mode CAN Operating Mode
 279   * @{
 280   */
 281 #define CAN_MODE_NORMAL             ((uint32_t)0x00000000)                     /*!< Normal mode   */
 282 #define CAN_MODE_LOOPBACK           ((uint32_t)CAN_BTR_LBKM)                   /*!< Loopback mode */
 283 #define CAN_MODE_SILENT             ((uint32_t)CAN_BTR_SILM)                   /*!< Silent mode   */
 284 #define CAN_MODE_SILENT_LOOPBACK    ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM))  /*!< Loopback combined with silent mode */
 285
 286 #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \
 287                            ((MODE) == CAN_MODE_LOOPBACK)|| \
 288                            ((MODE) == CAN_MODE_SILENT) || \
 289                            ((MODE) == CAN_MODE_SILENT_LOOPBACK))
 290 /**
 291   * @}
 292   */
 293
 294
 295 /** @defgroup CAN_synchronisation_jump_width CAN Synchronization Jump Width
 296   * @{
 297   */
 298 #define CAN_SJW_1TQ                 ((uint32_t)0x00000000)     /*!< 1 time quantum */
 299 #define CAN_SJW_2TQ                 ((uint32_t)CAN_BTR_SJW_0)  /*!< 2 time quantum */
 300 #define CAN_SJW_3TQ                 ((uint32_t)CAN_BTR_SJW_1)  /*!< 3 time quantum */
 301 #define CAN_SJW_4TQ                 ((uint32_t)CAN_BTR_SJW)    /*!< 4 time quantum */
 302
 303 #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ)|| \
 304                          ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ))
 305 /**
 306   * @}
 307   */
 308
 309 /** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in Bit Segment 1
 310   * @{
 311   */
 312 #define CAN_BS1_1TQ                 ((uint32_t)0x00000000)                                       /*!< 1 time quantum  */
 313 #define CAN_BS1_2TQ                 ((uint32_t)CAN_BTR_TS1_0)                                    /*!< 2 time quantum  */
 314 #define CAN_BS1_3TQ                 ((uint32_t)CAN_BTR_TS1_1)                                    /*!< 3 time quantum  */
 315 #define CAN_BS1_4TQ                 ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0))                  /*!< 4 time quantum  */
 316 #define CAN_BS1_5TQ                 ((uint32_t)CAN_BTR_TS1_2)                                    /*!< 5 time quantum  */
 317 #define CAN_BS1_6TQ                 ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0))                  /*!< 6 time quantum  */
 318 #define CAN_BS1_7TQ                 ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1))                  /*!< 7 time quantum  */
 319 #define CAN_BS1_8TQ                 ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0))  /*!< 8 time quantum  */
 320 #define CAN_BS1_9TQ                 ((uint32_t)CAN_BTR_TS1_3)                                    /*!< 9 time quantum  */
 321 #define CAN_BS1_10TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0))                  /*!< 10 time quantum */
 322 #define CAN_BS1_11TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1))                  /*!< 11 time quantum */
 323 #define CAN_BS1_12TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0))  /*!< 12 time quantum */
 324 #define CAN_BS1_13TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2))                  /*!< 13 time quantum */
 325 #define CAN_BS1_14TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0))  /*!< 14 time quantum */
 326 #define CAN_BS1_15TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1))  /*!< 15 time quantum */
 327 #define CAN_BS1_16TQ                ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */
 328
 329 #define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ)
 330 /**
 331   * @}
 332   */
 333
 334 /** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in Bit Segment 2
 335   * @{
 336   */
 337 #define CAN_BS2_1TQ                 ((uint32_t)0x00000000)                       /*!< 1 time quantum */
 338 #define CAN_BS2_2TQ                 ((uint32_t)CAN_BTR_TS2_0)                    /*!< 2 time quantum */
 339 #define CAN_BS2_3TQ                 ((uint32_t)CAN_BTR_TS2_1)                    /*!< 3 time quantum */
 340 #define CAN_BS2_4TQ                 ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0))  /*!< 4 time quantum */
 341 #define CAN_BS2_5TQ                 ((uint32_t)CAN_BTR_TS2_2)                    /*!< 5 time quantum */
 342 #define CAN_BS2_6TQ                 ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0))  /*!< 6 time quantum */
 343 #define CAN_BS2_7TQ                 ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1))  /*!< 7 time quantum */
 344 #define CAN_BS2_8TQ                 ((uint32_t)CAN_BTR_TS2)                      /*!< 8 time quantum */
 345
 346 #define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ)
 347 /**
 348   * @}
 349   */
 350
 351 /** @defgroup CAN_clock_prescaler CAN Clock Prescaler
 352   * @{
 353   */
 354 #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024))
 355 /**
 356   * @}
 357   */
 358
 359 /** @defgroup CAN_filter_number CAN Filter Number
 360   * @{
 361   */
 362 #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27)
 363 /**
 364   * @}
 365   */
 366
 367 /** @defgroup CAN_filter_mode CAN Filter Mode
 368   * @{
 369   */
 370 #define CAN_FILTERMODE_IDMASK       ((uint8_t)0x00)  /*!< Identifier mask mode */
 371 #define CAN_FILTERMODE_IDLIST       ((uint8_t)0x01)  /*!< Identifier list mode */
 372
 373 #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \
 374                                   ((MODE) == CAN_FILTERMODE_IDLIST))
 375 /**
 376   * @}
 377   */
 378
 379 /** @defgroup CAN_filter_scale CAN Filter Scale
 380   * @{
 381   */
 382 #define CAN_FILTERSCALE_16BIT       ((uint8_t)0x00)  /*!< Two 16-bit filters */
 383 #define CAN_FILTERSCALE_32BIT       ((uint8_t)0x01)  /*!< One 32-bit filter  */
 384
 385 #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \
 386                                     ((SCALE) == CAN_FILTERSCALE_32BIT))
 387 /**
 388   * @}
 389   */
 390
 391 /** @defgroup CAN_filter_FIFO CAN Filter FIFO
 392   * @{
 393   */
 394 #define CAN_FILTER_FIFO0             ((uint8_t)0x00)  /*!< Filter FIFO 0 assignment for filter x */
 395 #define CAN_FILTER_FIFO1             ((uint8_t)0x01)  /*!< Filter FIFO 1 assignment for filter x */
 396
 397 #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \
 398                                   ((FIFO) == CAN_FILTER_FIFO1))
 399
 400 /* Legacy defines */
 401 #define CAN_FilterFIFO0  CAN_FILTER_FIFO0
 402 #define CAN_FilterFIFO1  CAN_FILTER_FIFO1
 403 /**
 404   * @}
 405   */
 406
 407 /** @defgroup CAN_Start_bank_filter_for_slave_CAN CAN Start Bank Filter For Slave CAN
 408   * @{
 409   */
 410 #define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28)
 411 /**
 412   * @}
 413   */
 414
 415 /** @defgroup CAN_Tx CAN Tx
 416   * @{
 417   */
 418 #define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02))
 419 #define IS_CAN_STDID(STDID)   ((STDID) <= ((uint32_t)0x7FF))
 420 #define IS_CAN_EXTID(EXTID)   ((EXTID) <= ((uint32_t)0x1FFFFFFF))
 421 #define IS_CAN_DLC(DLC)       ((DLC) <= ((uint8_t)0x08))
 422 /**
 423   * @}
 424   */
 425
 426 /** @defgroup CAN_identifier_type CAN Identifier Type
 427   * @{
 428   */
 429 #define CAN_ID_STD             ((uint32_t)0x00000000)  /*!< Standard Id */
 430 #define CAN_ID_EXT             ((uint32_t)0x00000004)  /*!< Extended Id */
 431 #define IS_CAN_IDTYPE(IDTYPE)  (((IDTYPE) == CAN_ID_STD) || \
 432                                 ((IDTYPE) == CAN_ID_EXT))
 433 /**
 434   * @}
 435   */
 436
 437 /** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request
 438   * @{
 439   */
 440 #define CAN_RTR_DATA                ((uint32_t)0x00000000)  /*!< Data frame */
 441 #define CAN_RTR_REMOTE              ((uint32_t)0x00000002)  /*!< Remote frame */
 442 #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE))
 443
 444 /**
 445   * @}
 446   */
 447
 448 /** @defgroup CAN_transmit_constants CAN Transmit Constants
 449   * @{
 450   */
 451 #define CAN_TXSTATUS_FAILED         ((uint8_t)0x00)  /*!< CAN transmission failed */
 452 #define CAN_TXSTATUS_OK             ((uint8_t)0x01)  /*!< CAN transmission succeeded */
 453 #define CAN_TXSTATUS_PENDING        ((uint8_t)0x02)  /*!< CAN transmission pending */
 454 #define CAN_TXSTATUS_NOMAILBOX      ((uint8_t)0x04)  /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */
 455
 456 /**
 457   * @}
 458   */
 459
 460 /** @defgroup CAN_receive_FIFO_number_constants CAN Receive FIFO Number
 461   * @{
 462   */
 463 #define CAN_FIFO0                   ((uint8_t)0x00)  /*!< CAN FIFO 0 used to receive */
 464 #define CAN_FIFO1                   ((uint8_t)0x01)  /*!< CAN FIFO 1 used to receive */
 465
 466 #define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1))
 467 /**
 468   * @}
 469   */
 470
 471 /** @defgroup CAN_flags CAN Flags
 472   * @{
 473   */
 474 /* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus()
 475    and CAN_ClearFlag() functions. */
 476 /* If the flag is 0x1XXXXXXX, it means that it can only be used with
 477    CAN_GetFlagStatus() function.  */
 478
 479 /* Transmit Flags */
 480 #define CAN_FLAG_RQCP0             ((uint32_t)0x00000500)  /*!< Request MailBox0 flag         */
 481 #define CAN_FLAG_RQCP1             ((uint32_t)0x00000508)  /*!< Request MailBox1 flag         */
 482 #define CAN_FLAG_RQCP2             ((uint32_t)0x00000510)  /*!< Request MailBox2 flag         */
 483 #define CAN_FLAG_TXOK0             ((uint32_t)0x00000501)  /*!< Transmission OK MailBox0 flag */
 484 #define CAN_FLAG_TXOK1             ((uint32_t)0x00000509)  /*!< Transmission OK MailBox1 flag */
 485 #define CAN_FLAG_TXOK2             ((uint32_t)0x00000511)  /*!< Transmission OK MailBox2 flag */
 486 #define CAN_FLAG_TME0              ((uint32_t)0x0000051A)  /*!< Transmit mailbox 0 empty flag */
 487 #define CAN_FLAG_TME1              ((uint32_t)0x0000051B)  /*!< Transmit mailbox 0 empty flag */
 488 #define CAN_FLAG_TME2              ((uint32_t)0x0000051C)  /*!< Transmit mailbox 0 empty flag */
 489
 490 /* Receive Flags */
 491 #define CAN_FLAG_FF0               ((uint32_t)0x00000203)  /*!< FIFO 0 Full flag    */
 492 #define CAN_FLAG_FOV0              ((uint32_t)0x00000204)  /*!< FIFO 0 Overrun flag */
 493
 494 #define CAN_FLAG_FF1               ((uint32_t)0x00000403)  /*!< FIFO 1 Full flag    */
 495 #define CAN_FLAG_FOV1              ((uint32_t)0x00000404)  /*!< FIFO 1 Overrun flag */
 496
 497 /* Operating Mode Flags */
 498 #define CAN_FLAG_WKU               ((uint32_t)0x00000103)  /*!< Wake up flag           */
 499 #define CAN_FLAG_SLAK              ((uint32_t)0x00000101)  /*!< Sleep acknowledge flag */
 500 #define CAN_FLAG_SLAKI             ((uint32_t)0x00000104)  /*!< Sleep acknowledge flag */
 501 /* @note When SLAK interrupt is disabled (SLKIE=0), no polling on SLAKI is possible.
 502          In this case the SLAK bit can be polled.*/
 503
 504 /* Error Flags */
 505 #define CAN_FLAG_EWG               ((uint32_t)0x00000300)  /*!< Error warning flag   */
 506 #define CAN_FLAG_EPV               ((uint32_t)0x00000301)  /*!< Error passive flag   */
 507 #define CAN_FLAG_BOF               ((uint32_t)0x00000302)  /*!< Bus-Off flag         */
 508
 509 #define IS_CAN_GET_FLAG(FLAG) (((FLAG) == CAN_FLAG_RQCP2) || ((FLAG) == CAN_FLAG_BOF)   || \
 510                                ((FLAG) == CAN_FLAG_EPV)   || ((FLAG) == CAN_FLAG_EWG)   || \
 511                                ((FLAG) == CAN_FLAG_WKU)   || ((FLAG) == CAN_FLAG_FOV0)  || \
 512                                ((FLAG) == CAN_FLAG_FF0)   || ((FLAG) == CAN_FLAG_SLAK)  || \
 513                                ((FLAG) == CAN_FLAG_FOV1)  || ((FLAG) == CAN_FLAG_FF1)   || \
 514                                ((FLAG) == CAN_FLAG_RQCP1) || ((FLAG) == CAN_FLAG_RQCP0))
 515
 516
 517 #define IS_CAN_CLEAR_FLAG(FLAG)(((FLAG) == CAN_FLAG_RQCP2) || ((FLAG) == CAN_FLAG_RQCP1) || \
 518                                 ((FLAG) == CAN_FLAG_RQCP0) || ((FLAG) == CAN_FLAG_FF0)   || \
 519                                 ((FLAG) == CAN_FLAG_FOV0)  || ((FLAG) == CAN_FLAG_FF1)   || \
 520                                 ((FLAG) == CAN_FLAG_FOV1)  || ((FLAG) == CAN_FLAG_WKU))
 521 /**
 522   * @}
 523   */
 524
 525
 526 /** @defgroup CAN_interrupts CAN Interrupts
 527   * @{
 528   */
 529 #define CAN_IT_TME                  ((uint32_t)CAN_IER_TMEIE)   /*!< Transmit mailbox empty interrupt */
 530
 531 /* Receive Interrupts */
 532 #define CAN_IT_FMP0                 ((uint32_t)CAN_IER_FMPIE0)  /*!< FIFO 0 message pending interrupt */
 533 #define CAN_IT_FF0                  ((uint32_t)CAN_IER_FFIE0)   /*!< FIFO 0 full interrupt            */
 534 #define CAN_IT_FOV0                 ((uint32_t)CAN_IER_FOVIE0)  /*!< FIFO 0 overrun interrupt         */
 535 #define CAN_IT_FMP1                 ((uint32_t)CAN_IER_FMPIE1)  /*!< FIFO 1 message pending interrupt */
 536 #define CAN_IT_FF1                  ((uint32_t)CAN_IER_FFIE1)   /*!< FIFO 1 full interrupt            */
 537 #define CAN_IT_FOV1                 ((uint32_t)CAN_IER_FOVIE1)  /*!< FIFO 1 overrun interrupt         */
 538
 539 /* Operating Mode Interrupts */
 540 #define CAN_IT_WKU                  ((uint32_t)CAN_IER_WKUIE)  /*!< Wake-up interrupt           */
 541 #define CAN_IT_SLK                  ((uint32_t)CAN_IER_SLKIE)  /*!< Sleep acknowledge interrupt */
 542
 543 /* Error Interrupts */
 544 #define CAN_IT_EWG                  ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt   */
 545 #define CAN_IT_EPV                  ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt   */
 546 #define CAN_IT_BOF                  ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt         */
 547 #define CAN_IT_LEC                  ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */
 548 #define CAN_IT_ERR                  ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt           */
 549
 550 /* Flags named as Interrupts : kept only for FW compatibility */
 551 #define CAN_IT_RQCP0   CAN_IT_TME
 552 #define CAN_IT_RQCP1   CAN_IT_TME
 553 #define CAN_IT_RQCP2   CAN_IT_TME
 554
 555 #define IS_CAN_IT(IT)        (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FMP0)  ||\
 556                              ((IT) == CAN_IT_FF0)  || ((IT) == CAN_IT_FOV0)  ||\
 557                              ((IT) == CAN_IT_FMP1) || ((IT) == CAN_IT_FF1)   ||\
 558                              ((IT) == CAN_IT_FOV1) || ((IT) == CAN_IT_EWG)   ||\
 559                              ((IT) == CAN_IT_EPV)  || ((IT) == CAN_IT_BOF)   ||\
 560                              ((IT) == CAN_IT_LEC)  || ((IT) == CAN_IT_ERR)   ||\
 561                              ((IT) == CAN_IT_WKU)  || ((IT) == CAN_IT_SLK))
 562
 563 #define IS_CAN_CLEAR_IT(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FF0)    ||\
 564                              ((IT) == CAN_IT_FOV0)|| ((IT) == CAN_IT_FF1)    ||\
 565                              ((IT) == CAN_IT_FOV1)|| ((IT) == CAN_IT_EWG)    ||\
 566                              ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF)    ||\
 567                              ((IT) == CAN_IT_LEC) || ((IT) == CAN_IT_ERR)    ||\
 568                              ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK))
 569 /**
 570   * @}
 571   */
 572
 573 /* Time out for INAK bit */
 574 #define INAK_TIMEOUT      ((uint32_t)0x00FFFFFF)
 575 /* Time out for SLAK bit */
 576 #define SLAK_TIMEOUT      ((uint32_t)0x00FFFFFF)
 577
 578 /* Mailboxes definition */
 579 #define CAN_TXMAILBOX_0   ((uint8_t)0x00)
 580 #define CAN_TXMAILBOX_1   ((uint8_t)0x01)
 581 #define CAN_TXMAILBOX_2   ((uint8_t)0x02)
 582
 583 /**
 584   * @}
 585   */
 586
 587 /* Exported macros -----------------------------------------------------------*/
 588 /** @defgroup CAN_Exported_Macro CAN Exported Macros
 589   * @{
 590   */
 591
 592 /** @brief  Reset CAN handle state
 593   * @param  __HANDLE__: CAN handle.
 594   * @retval None
 595   */
 596 #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
 597
 598 /**
 599   * @brief  Enable the specified CAN interrupts
 600   * @param  __HANDLE__: CAN handle.
 601   * @param  __INTERRUPT__: CAN Interrupt.
 602   * @retval None.
 603   */
 604 #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
 605
 606 /**
 607   * @brief  Disable the specified CAN interrupts
 608   * @param  __HANDLE__: CAN handle.
 609   * @param  __INTERRUPT__: CAN Interrupt.
 610   * @retval None.
 611   */
 612 #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
 613
 614 /**
 615   * @brief  Return the number of pending received messages.
 616   * @param  __HANDLE__: CAN handle.
 617   * @param  __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
 618   * @retval The number of pending message.
 619   */
 620 #define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
 621 ((uint8_t)((__HANDLE__)->Instance->RF0R&(uint32_t)0x03)) : ((uint8_t)((__HANDLE__)->Instance->RF1R&(uint32_t)0x03)))
 622
 623 /** @brief  Check whether the specified CAN flag is set or not.
 624   * @param  __HANDLE__: specifies the CAN Handle.
 625   * @param  __FLAG__: specifies the flag to check.
 626   *         This parameter can be one of the following values:
 627   *            @arg CAN_TSR_RQCP0: Request MailBox0 Flag
 628   *            @arg CAN_TSR_RQCP1: Request MailBox1 Flag
 629   *            @arg CAN_TSR_RQCP2: Request MailBox2 Flag
 630   *            @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
 631   *            @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
 632   *            @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
 633   *            @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
 634   *            @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
 635   *            @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
 636   *            @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
 637   *            @arg CAN_FLAG_FF0: FIFO 0 Full Flag
 638   *            @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
 639   *            @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
 640   *            @arg CAN_FLAG_FF1: FIFO 1 Full Flag
 641   *            @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
 642   *            @arg CAN_FLAG_WKU: Wake up Flag
 643   *            @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
 644   *            @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
 645   *            @arg CAN_FLAG_EWG: Error Warning Flag
 646   *            @arg CAN_FLAG_EPV: Error Passive Flag
 647   *            @arg CAN_FLAG_BOF: Bus-Off Flag
 648   * @retval The new state of __FLAG__ (TRUE or FALSE).
 649   */
 650 #define CAN_FLAG_MASK  ((uint32_t)0x000000FF)
 651 #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
 652 ((((__FLAG__) >> 8) == 5)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
 653  (((__FLAG__) >> 8) == 2)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
 654  (((__FLAG__) >> 8) == 4)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
 655  (((__FLAG__) >> 8) == 1)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
 656  ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))))
 657
 658 /** @brief  Clear the specified CAN pending flag.
 659   * @param  __HANDLE__: specifies the CAN Handle.
 660   * @param  __FLAG__: specifies the flag to check.
 661   *         This parameter can be one of the following values:
 662   *            @arg CAN_TSR_RQCP0: Request MailBox0 Flag
 663   *            @arg CAN_TSR_RQCP1: Request MailBox1 Flag
 664   *            @arg CAN_TSR_RQCP2: Request MailBox2 Flag
 665   *            @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
 666   *            @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
 667   *            @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
 668   *            @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
 669   *            @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
 670   *            @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
 671   *            @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
 672   *            @arg CAN_FLAG_FF0: FIFO 0 Full Flag
 673   *            @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
 674   *            @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
 675   *            @arg CAN_FLAG_FF1: FIFO 1 Full Flag
 676   *            @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
 677   *            @arg CAN_FLAG_WKU: Wake up Flag
 678   *            @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
 679   * @retval The new state of __FLAG__ (TRUE or FALSE).
 680   */
 681 #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
 682 ((((__FLAG__) >> 8U) == 5)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
 683  (((__FLAG__) >> 8U) == 2)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
 684  (((__FLAG__) >> 8U) == 4)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
 685  (((__FLAG__) >> 8U) == 1)? (((__HANDLE__)->Instance->MSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0)
 686
 687
 688 /** @brief  Check if the specified CAN interrupt source is enabled or disabled.
 689   * @param  __HANDLE__: specifies the CAN Handle.
 690   * @param  __INTERRUPT__: specifies the CAN interrupt source to check.
 691   *         This parameter can be one of the following values:
 692   *            @arg CAN_IT_TME: Transmit mailbox empty interrupt enable
 693   *            @arg CAN_IT_FMP0: FIFO0 message pending interrupt enablev
 694   *            @arg CAN_IT_FMP1: FIFO1 message pending interrupt enable
 695   * @retval The new state of __IT__ (TRUE or FALSE).
 696   */
 697 #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
 698
 699 /**
 700   * @brief  Check the transmission status of a CAN Frame.
 701   * @param  __HANDLE__: specifies the CAN Handle.
 702   * @param  __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
 703   * @retval The new status of transmission  (TRUE or FALSE).
 704   */
 705 #define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\
 706 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) == (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) :\
 707  ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) == (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) :\
 708  ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)))
 709
 710
 711
 712 /**
 713   * @brief  Release the specified receive FIFO.
 714   * @param  __HANDLE__: CAN handle.
 715   * @param  __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
 716   * @retval None.
 717   */
 718 #define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
 719 ((__HANDLE__)->Instance->RF0R |= CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R |= CAN_RF1R_RFOM1))
 720
 721 /**
 722   * @brief  Cancel a transmit request.
 723   * @param  __HANDLE__: specifies the CAN Handle.
 724   * @param  __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
 725   * @retval None.
 726   */
 727 #define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\
 728 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ0) :\
 729  ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ1) :\
 730  ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ2))
 731
 732 /**
 733   * @brief  Enable or disables the DBG Freeze for CAN.
 734   * @param  __HANDLE__: specifies the CAN Handle.
 735   * @param  __NEWSTATE__: new state of the CAN peripheral.
 736   *         This parameter can be: ENABLE (CAN reception/transmission is frozen
 737   *         during debug. Reception FIFOs can still be accessed/controlled normally)
 738   *         or DISABLE (CAN is working during debug).
 739   * @retval None
 740   */
 741 #define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \
 742 ((__HANDLE__)->Instance->MCR |= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF))
 743
 744 /**
 745  * @}
 746  */
 747
 748 /* Exported functions --------------------------------------------------------*/
 749 /** @addtogroup CAN_Exported_Functions CAN Exported Functions
 750   * @{
 751   */
 752
 753 /** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions
 754  *  @brief    Initialization and Configuration functions
 755  * @{
 756  */
 757 /* addtogroup and de-initialization functions *****************************/
 758 HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan);
 759 HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig);
 760 HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan);
 761 void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan);
 762 void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan);
 763 /**
 764  * @}
 765  */
 766
 767 /** @addtogroup CAN_Exported_Functions_Group2 Input and Output operation functions
 768  *  @brief    I/O operation functions
 769  * @{
 770  */
 771 /* IO operation functions *****************************************************/
 772 HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout);
 773 HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan);
 774 HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout);
 775 HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber);
 776 HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan);
 777 HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
 778 void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan);
 779 void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan);
 780 void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan);
 781 void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
 782 /**
 783  * @}
 784  */
 785
 786 /** @addtogroup CAN_Exported_Functions_Group3 Peripheral State and Error functions
 787  *  @brief   CAN Peripheral State functions
 788  * @{
 789  */
 790 /* Peripheral State and Error functions ***************************************/
 791 uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
 792 HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan);
 793 /**
 794  * @}
 795  */
 796
 797 /**
 798  * @}
 799  */
 800
 801 /**
 802   * @}
 803   */
 804
 805 /**
 806   * @}
 807   */
 808
 809 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
 810        /* STM32F302xC || STM32F303xC || STM32F358xx || */
 811        /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
 812        /* STM32F302x8                               || */
 813        /* STM32F373xC || STM32F378xx                   */
 814
 815 #ifdef __cplusplus
 816 }
 817 #endif
 818
 819 #endif /* __STM32F3xx_CAN_H */
 820
 821
 822 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/