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1 /**
2 ******************************************************************************
3 * @file stm32f3xx_hal_dma_ex.h
4 * @author MCD Application Team
5 * @version V1.1.0
6 * @date 12-Sept-2014
7 * @brief Header file of DMA HAL Extended module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F3xx_HAL_DMA_EX_H
40 #define __STM32F3xx_HAL_DMA_EX_H
41
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32f3xx_hal_def.h"
48
49 /** @addtogroup STM32F3xx_HAL_Driver
50 * @{
51 */
52
53 /** @addtogroup DMAEx DMA Extended HAL module driver
54 * @{
55 */
56
57 /* Exported types ------------------------------------------------------------*/
58 /* Exported constants --------------------------------------------------------*/
59 /* Exported macros -----------------------------------------------------------*/
60 /** @defgroup DMAEx_Exported_Macros DMA Extended Exported Macros
61 * @{
62 */
63 /* Interrupt & Flag management */
64
65 /**
66 * @brief Returns the current DMA Channel transfer complete flag.
67 * @param __HANDLE__: DMA handle
68 * @retval The specified transfer complete flag index.
69 */
70
71 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
72 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
73 defined(STM32F373xC) || defined(STM32F378xx)
74 /** @defgroup STM32F302xE_STM32F303xE_STM32F398xx_STM32F302xC_STM32F303xC_STM32F3058xx_STM32F373xC_STM32F378xx Product devices
75 * @{
76 */
77 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
78 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
79 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
80 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
81 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
82 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
83 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
84 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TC7 :\
85 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\
86 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\
87 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\
88 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\
89 DMA_FLAG_TC5)
90
91 /**
92 * @brief Returns the current DMA Channel half transfer complete flag.
93 * @param __HANDLE__: DMA handle
94 * @retval The specified half transfer complete flag index.
95 */
96 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
97 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
98 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
99 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
100 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
101 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
102 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
103 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_HT7 :\
104 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\
105 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\
106 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\
107 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\
108 DMA_FLAG_HT5)
109
110 /**
111 * @brief Returns the current DMA Channel transfer error flag.
112 * @param __HANDLE__: DMA handle
113 * @retval The specified transfer error flag index.
114 */
115 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
116 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
117 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
118 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
119 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
120 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
121 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
122 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TE7 :\
123 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\
124 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\
125 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\
126 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\
127 DMA_FLAG_TE5)
128
129 /**
130 * @brief Get the DMA Channel pending flags.
131 * @param __HANDLE__: DMA handle
132 * @param __FLAG__: Get the specified flag.
133 * This parameter can be any combination of the following values:
134 * @arg DMA_FLAG_TCx: Transfer complete flag
135 * @arg DMA_FLAG_HTx: Half transfer complete flag
136 * @arg DMA_FLAG_TEx: Transfer error flag
137 * Where x can be 0, 1, 2, 3, 4, 5, 6 or 7 to select the DMA Channel flag.
138 * @retval The state of FLAG (SET or RESET).
139 */
140
141 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\
142 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->ISR & (__FLAG__)) :\
143 (DMA1->ISR & (__FLAG__)))
144
145 /**
146 * @brief Clears the DMA Channel pending flags.
147 * @param __HANDLE__: DMA handle
148 * @param __FLAG__: specifies the flag to clear.
149 * This parameter can be any combination of the following values:
150 * @arg DMA_FLAG_TCx: Transfer complete flag
151 * @arg DMA_FLAG_HTx: Half transfer complete flag
152 * @arg DMA_FLAG_TEx: Transfer error flag
153 * Where x can be 0, 1, 2, 3, 4, 5, 6 or 7 to select the DMA Channel flag.
154 * @retval None
155 */
156 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \
157 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->IFCR = (__FLAG__)) :\
158 (DMA1->IFCR = (__FLAG__)))
159
160 /**
161 * @}
162 */
163
164 #else
165
166 /** @defgroup STM32F301x8_STM32F302x8_STM32F318xx_STM32F303x8_STM32F334x8_STM32F328xx Product devices
167 * @{
168 */
169 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
170 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
171 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
172 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
173 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
174 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
175 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
176 DMA_FLAG_TC7)
177
178 /**
179 * @brief Returns the current DMA Channel half transfer complete flag.
180 * @param __HANDLE__: DMA handle
181 * @retval The specified half transfer complete flag index.
182 */
183 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
184 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
185 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
186 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
187 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
188 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
189 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
190 DMA_FLAG_HT7)
191
192 /**
193 * @brief Returns the current DMA Channel transfer error flag.
194 * @param __HANDLE__: DMA handle
195 * @retval The specified transfer error flag index.
196 */
197 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
198 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
199 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
200 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
201 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
202 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
203 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
204 DMA_FLAG_TE7)
205
206 /**
207 * @brief Get the DMA Channel pending flags.
208 * @param __HANDLE__: DMA handle
209 * @param __FLAG__: Get the specified flag.
210 * This parameter can be any combination of the following values:
211 * @arg DMA_FLAG_TCx: Transfer complete flag
212 * @arg DMA_FLAG_HTx: Half transfer complete flag
213 * @arg DMA_FLAG_TEx: Transfer error flag
214 * Where x can be 0, 1, 2, 3, 4, 5, 6 or 7 to select the DMA Channel flag.
215 * @retval The state of FLAG (SET or RESET).
216 */
217
218 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (DMA1->ISR & (__FLAG__))
219
220 /**
221 * @brief Clears the DMA Channel pending flags.
222 * @param __HANDLE__: DMA handle
223 * @param __FLAG__: specifies the flag to clear.
224 * This parameter can be any combination of the following values:
225 * @arg DMA_FLAG_TCx: Transfer complete flag
226 * @arg DMA_FLAG_HTx: Half transfer complete flag
227 * @arg DMA_FLAG_TEx: Transfer error flag
228 * Where x can be 0, 1, 2, 3, 4, 5, 6 or 7 to select the DMA Channel flag.
229 * @retval None
230 */
231 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR |= (__FLAG__))
232
233 /**
234 * @}
235 */
236
237 #endif
238
239 /**
240 * @}
241 */
242
243 /**
244 * @}
245 */
246
247 /**
248 * @}
249 */
250
251 #ifdef __cplusplus
252 }
253 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
254 /* STM32F302xC || STM32F303xC || STM32F358xx || */
255 /* STM32F373xC || STM32F378xx */
256
257 #endif /* __STM32F3xx_HAL_DMA_H */
258
259 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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