tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pcd.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f3xx_hal_pcd.h
   4   * @author  MCD Application Team
   5   * @version V1.1.0
   6   * @date    12-Sept-2014
   7   * @brief   Header file of PCD HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32F3xx_HAL_PCD_H
  40 #define __STM32F3xx_HAL_PCD_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 #if defined(STM32F302xE) || defined(STM32F303xE) || \
  47     defined(STM32F302xC) || defined(STM32F303xC) || \
  48     defined(STM32F302x8)                         || \
  49     defined(STM32F373xC)
  50
  51 /* Includes ------------------------------------------------------------------*/
  52 #include "stm32f3xx_hal_def.h"
  53
  54 /** @addtogroup STM32F3xx_HAL_Driver
  55   * @{
  56   */
  57
  58 /** @addtogroup PCD
  59   * @{
  60   */
  61
  62 /* Exported types ------------------------------------------------------------*/
  63 /** @defgroup PCD_Exported_Types PCD Exported Types
  64   * @{
  65   */
  66
  67    /**
  68   * @brief  PCD State structures definition
  69   */
  70 typedef enum
  71 {
  72   PCD_READY    = 0x00,
  73   PCD_ERROR    = 0x01,
  74   PCD_BUSY     = 0x02,
  75   PCD_TIMEOUT  = 0x03
  76 } PCD_StateTypeDef;
  77
  78 typedef enum
  79 {
  80   /* double buffered endpoint direction */
  81   PCD_EP_DBUF_OUT,
  82   PCD_EP_DBUF_IN,
  83   PCD_EP_DBUF_ERR,
  84 }PCD_EP_DBUF_DIR;
  85
  86 /* endpoint buffer number */
  87 typedef enum
  88 {
  89   PCD_EP_NOBUF,
  90   PCD_EP_BUF0,
  91   PCD_EP_BUF1
  92 }PCD_EP_BUF_NUM;
  93
  94 /**
  95   * @brief  PCD Initialization Structure definition
  96   */
  97 typedef struct
  98 {
  99   uint32_t dev_endpoints;        /*!< Device Endpoints number.
 100                                       This parameter depends on the used USB core.
 101                                       This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
 102
 103   uint32_t speed;                /*!< USB Core speed.
 104                                       This parameter can be any value of @ref USB_Core_Speed                 */
 105
 106   uint32_t ep0_mps;              /*!< Set the Endpoint 0 Max Packet size.
 107                                       This parameter can be any value of @ref USB_EP0_MPS                    */
 108
 109   uint32_t phy_itface;           /*!< Select the used PHY interface.
 110                                       This parameter can be any value of @ref USB_Core_PHY                   */
 111
 112   uint32_t Sof_enable;           /*!< Enable or disable the output of the SOF signal.                        */
 113
 114   uint32_t low_power_enable;       /*!< Enable or disable Low Power mode                                      */
 115
 116   uint32_t lpm_enable;             /*!< Enable or disable Battery charging.                                  */
 117
 118   uint32_t battery_charging_enable; /*!< Enable or disable Battery charging.                                  */
 119
 120 }PCD_InitTypeDef;
 121
 122 typedef struct
 123 {
 124   uint8_t   num;            /*!< Endpoint number
 125                                 This parameter must be a number between Min_Data = 1 and Max_Data = 15    */
 126
 127   uint8_t   is_in;          /*!< Endpoint direction
 128                                 This parameter must be a number between Min_Data = 0 and Max_Data = 1     */
 129
 130   uint8_t   is_stall;       /*!< Endpoint stall condition
 131                                 This parameter must be a number between Min_Data = 0 and Max_Data = 1     */
 132
 133   uint8_t   type;           /*!< Endpoint type
 134                                  This parameter can be any value of @ref USB_EP_Type                      */
 135
 136   uint16_t  pmaadress;      /*!< PMA Address
 137                                  This parameter can be any value between Min_addr = 0 and Max_addr = 1K   */
 138
 139
 140   uint16_t  pmaaddr0;       /*!< PMA Address0
 141                                  This parameter can be any value between Min_addr = 0 and Max_addr = 1K   */
 142
 143
 144   uint16_t  pmaaddr1;        /*!< PMA Address1
 145                                  This parameter can be any value between Min_addr = 0 and Max_addr = 1K   */
 146
 147
 148   uint8_t   doublebuffer;    /*!< Double buffer enable
 149                                  This parameter can be 0 or 1                                             */
 150
 151   uint32_t  maxpacket;      /*!< Endpoint Max packet size
 152                                  This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
 153
 154   uint8_t   *xfer_buff;     /*!< Pointer to transfer buffer                                               */
 155
 156
 157   uint32_t  xfer_len;       /*!< Current transfer length                                                  */
 158
 159   uint32_t  xfer_count;     /*!< Partial transfer length in case of multi packet transfer                 */
 160
 161 }PCD_EPTypeDef;
 162
 163 typedef   USB_TypeDef PCD_TypeDef;
 164
 165 /**
 166   * @brief  PCD Handle Structure definition
 167   */
 168 typedef struct
 169 {
 170   PCD_TypeDef             *Instance;   /*!< Register base address              */
 171   PCD_InitTypeDef         Init;       /*!< PCD required parameters            */
 172   __IO uint8_t            USB_Address; /*!< USB Address            */
 173   PCD_EPTypeDef           IN_ep[8];  /*!< IN endpoint parameters             */
 174   PCD_EPTypeDef           OUT_ep[8]; /*!< OUT endpoint parameters            */
 175   HAL_LockTypeDef         Lock;       /*!< PCD peripheral status              */
 176   __IO PCD_StateTypeDef   State;      /*!< PCD communication state            */
 177   uint32_t                Setup[12];  /*!< Setup packet buffer                */
 178   void                    *pData;      /*!< Pointer to upper stack Handler     */
 179
 180 } PCD_HandleTypeDef;
 181
 182 /**
 183   * @}
 184   */
 185
 186 #include "stm32f3xx_hal_pcd_ex.h"
 187 /* Exported constants --------------------------------------------------------*/
 188 /** @defgroup PCD_Exported_Constants PCD Exported Constants
 189   * @{
 190   */
 191
 192 /** @defgroup USB_Core_Speed USB Core Speed
 193   * @{
 194   */
 195 #define PCD_SPEED_HIGH               0 /* Not Supported */
 196 #define PCD_SPEED_FULL               2
 197 /**
 198   * @}
 199   */
 200
 201 /** @defgroup USB_Core_PHY USB Core PHY
 202   * @{
 203   */
 204 #define PCD_PHY_EMBEDDED             2
 205 /**
 206   * @}
 207   */
 208
 209 /** @defgroup USB_EP0_MPS USB EP0 MPS
 210   * @{
 211   */
 212 #define DEP0CTL_MPS_64                         0
 213 #define DEP0CTL_MPS_32                         1
 214 #define DEP0CTL_MPS_16                         2
 215 #define DEP0CTL_MPS_8                          3
 216
 217 #define PCD_EP0MPS_64                          DEP0CTL_MPS_64
 218 #define PCD_EP0MPS_32                          DEP0CTL_MPS_32
 219 #define PCD_EP0MPS_16                          DEP0CTL_MPS_16
 220 #define PCD_EP0MPS_08                          DEP0CTL_MPS_8
 221 /**
 222   * @}
 223   */
 224
 225 /** @defgroup USB_EP_Type USB EP Type
 226   * @{
 227   */
 228 #define PCD_EP_TYPE_CTRL                                 0
 229 #define PCD_EP_TYPE_ISOC                                 1
 230 #define PCD_EP_TYPE_BULK                                 2
 231 #define PCD_EP_TYPE_INTR                                 3
 232 /**
 233   * @}
 234   */
 235
 236 /** @defgroup USB_ENDP USB ENDP
 237   * @{
 238   */
 239
 240 #define PCD_ENDP0                             ((uint8_t)0)
 241 #define PCD_ENDP1                             ((uint8_t)1)
 242 #define PCD_ENDP2                             ((uint8_t)2)
 243 #define PCD_ENDP3                             ((uint8_t)3)
 244 #define PCD_ENDP4                             ((uint8_t)4)
 245 #define PCD_ENDP5                             ((uint8_t)5)
 246 #define PCD_ENDP6                             ((uint8_t)6)
 247 #define PCD_ENDP7                             ((uint8_t)7)
 248
 249 /*  Endpoint Kind */
 250 #define PCD_SNG_BUF                                      0
 251 #define PCD_DBL_BUF                                      1
 252
 253 #define IS_PCD_ALL_INSTANCE                              IS_USB_ALL_INSTANCE
 254
 255 /**
 256   * @}
 257   */
 258
 259 /**
 260   * @}
 261   */
 262
 263 /* Exported macros -----------------------------------------------------------*/
 264
 265 /** @defgroup PCD_Exported_Macros PCD Exported Macros
 266  *  @brief macros to handle interrupts and specific clock configurations
 267  * @{
 268  */
 269 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__)      ((((__HANDLE__)->Instance->ISTR) & (__INTERRUPT__)) == (__INTERRUPT__))
 270 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)    (((__HANDLE__)->Instance->ISTR) = ~(__INTERRUPT__))
 271
 272 #define  USB_EXTI_LINE_WAKEUP              ((uint32_t)0x00040000)  /*!< External interrupt line 18 Connected to the USB FS EXTI Line */
 273
 274 #define __HAL_USB_EXTI_ENABLE_IT()                 EXTI->IMR |= USB_EXTI_LINE_WAKEUP
 275 #define __HAL_USB_EXTI_DISABLE_IT()                EXTI->IMR &= ~(USB_EXTI_LINE_WAKEUP)
 276 #define __HAL_USB_EXTI_GENERATE_SWIT(__EXTILINE__) (EXTI->SWIER |= (__EXTILINE__))
 277
 278 #define __HAL_USB_EXTI_GET_FLAG()                  EXTI->PR & (USB_EXTI_LINE_WAKEUP)
 279 #define __HAL_USB_EXTI_CLEAR_FLAG()                EXTI->PR = USB_EXTI_LINE_WAKEUP
 280
 281 #define __HAL_USB_EXTI_SET_RISING_EDGE_TRIGGER()   do {\
 282                                                      EXTI->FTSR &= ~(USB_EXTI_LINE_WAKEUP);\
 283                                                      EXTI->RTSR |= USB_EXTI_LINE_WAKEUP;\
 284                                                    } while(0)
 285
 286 #define __HAL_USB_EXTI_SET_FALLING_EDGE_TRIGGER()  do {\
 287                                                      EXTI->FTSR |= (USB_EXTI_LINE_WAKEUP);\
 288                                                      EXTI->RTSR &= ~(USB_EXTI_LINE_WAKEUP);\
 289                                                    } while(0)
 290
 291 #define __HAL_USB_EXTI_SET_FALLINGRISING_TRIGGER() do {\
 292                                                      EXTI->RTSR &= ~(USB_EXTI_LINE_WAKEUP);\
 293                                                      EXTI->FTSR &= ~(USB_EXTI_LINE_WAKEUP);\
 294                                                      EXTI->RTSR |= USB_EXTI_LINE_WAKEUP;\
 295                                                      EXTI->FTSR |= USB_EXTI_LINE_WAKEUP;\
 296                                                    } while(0)
 297 /**
 298   * @}
 299   */
 300
 301 /* Internal macros -----------------------------------------------------------*/
 302
 303 /** @defgroup PCD_Private_Macros PCD Private Macros
 304  *  @brief macros to handle interrupts and specific clock configurations
 305   * @{
 306   */
 307
 308 /* SetENDPOINT */
 309 #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue)  (*(&USBx->EP0R + bEpNum * 2)= (uint16_t)wRegValue)
 310
 311 /* GetENDPOINT */
 312 #define PCD_GET_ENDPOINT(USBx, bEpNum)        (*(&USBx->EP0R + bEpNum * 2))
 313
 314
 315
 316 /**
 317   * @brief  sets the type in the endpoint register(bits EP_TYPE[1:0])
 318   * @param  USBx: USB peripheral instance register address.
 319   * @param  bEpNum: Endpoint Number.
 320   * @param  wType: Endpoint Type.
 321   * @retval None
 322   */
 323 #define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT(USBx, bEpNum,\
 324                                   ((PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EP_T_MASK) | wType )))
 325
 326 /**
 327   * @brief  gets the type in the endpoint register(bits EP_TYPE[1:0])
 328   * @param  USBx: USB peripheral instance register address.
 329   * @param  bEpNum: Endpoint Number.
 330   * @retval Endpoint Type
 331   */
 332 #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EP_T_FIELD)
 333
 334
 335 /**
 336   * @brief free buffer used from the application realizing it to the line
 337           toggles bit SW_BUF in the double buffered endpoint register
 338   * @param  USBx: USB peripheral instance register address.
 339   * @param  bEpNum: Endpoint Number.
 340   * @param  bDir: Direction
 341   * @retval None
 342   */
 343 #define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
 344 {\
 345   if (bDir == PCD_EP_DBUF_OUT)\
 346   { /* OUT double buffered endpoint */\
 347     PCD_TX_DTOG(USBx, bEpNum);\
 348   }\
 349   else if (bDir == PCD_EP_DBUF_IN)\
 350   { /* IN double buffered endpoint */\
 351     PCD_RX_DTOG(USBx, bEpNum);\
 352   }\
 353 }
 354
 355 /**
 356   * @brief gets direction of the double buffered endpoint
 357   * @param   USBx: USB peripheral instance register address.
 358   * @param   bEpNum: Endpoint Number.
 359   * @retval EP_DBUF_OUT, EP_DBUF_IN,
 360   *         EP_DBUF_ERR if the endpoint counter not yet programmed.
 361   */
 362 #define PCD_GET_DB_DIR(USBx, bEpNum)\
 363 {\
 364   if ((uint16_t)(*PCD_EP_RX_CNT(USBx, bEpNum) & 0xFC00) != 0)\
 365     return(PCD_EP_DBUF_OUT);\
 366   else if (((uint16_t)(*PCD_EP_TX_CNT(USBx, bEpNum)) & 0x03FF) != 0)\
 367     return(PCD_EP_DBUF_IN);\
 368   else\
 369     return(PCD_EP_DBUF_ERR);\
 370 }
 371
 372 /**
 373   * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
 374   * @param  USBx: USB peripheral instance register address.
 375   * @param  bEpNum: Endpoint Number.
 376   * @param  wState: new state
 377   * @retval None
 378   */
 379 #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) {\
 380    register uint16_t _wRegVal;       \
 381    \
 382     _wRegVal = PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPTX_DTOGMASK;\
 383    /* toggle first bit ? */     \
 384    if((USB_EPTX_DTOG1 & wState)!= 0)      \
 385      _wRegVal ^= USB_EPTX_DTOG1;        \
 386    /* toggle second bit ?  */         \
 387    if((USB_EPTX_DTOG2 & wState)!= 0)      \
 388      _wRegVal ^= USB_EPTX_DTOG2;        \
 389    PCD_SET_ENDPOINT(USBx, bEpNum, (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX));    \
 390   } /* PCD_SET_EP_TX_STATUS */
 391
 392 /**
 393   * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
 394   * @param  USBx: USB peripheral instance register address.
 395   * @param  bEpNum: Endpoint Number.
 396   * @param  wState: new state
 397   * @retval None
 398   */
 399 #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
 400     register uint16_t _wRegVal;   \
 401     \
 402     _wRegVal = PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPRX_DTOGMASK;\
 403     /* toggle first bit ? */  \
 404     if((USB_EPRX_DTOG1 & wState)!= 0) \
 405       _wRegVal ^= USB_EPRX_DTOG1;  \
 406     /* toggle second bit ? */  \
 407     if((USB_EPRX_DTOG2 & wState)!= 0) \
 408       _wRegVal ^= USB_EPRX_DTOG2;  \
 409     PCD_SET_ENDPOINT(USBx, bEpNum, (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
 410   } /* PCD_SET_EP_RX_STATUS */
 411
 412 /**
 413   * @brief  sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
 414   * @param  USBx: USB peripheral instance register address.
 415   * @param  bEpNum: Endpoint Number.
 416   * @param  wStaterx: new state.
 417   * @param  wStatetx: new state.
 418   * @retval None
 419   */
 420 #define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\
 421     register uint32_t _wRegVal;   \
 422     \
 423     _wRegVal = PCD_GET_ENDPOINT(USBx, bEpNum) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\
 424     /* toggle first bit ? */  \
 425     if((USB_EPRX_DTOG1 & wStaterx)!= 0) \
 426       _wRegVal ^= USB_EPRX_DTOG1;  \
 427     /* toggle second bit ? */  \
 428     if((USB_EPRX_DTOG2 & wStaterx)!= 0) \
 429       _wRegVal ^= USB_EPRX_DTOG2;  \
 430     /* toggle first bit ? */     \
 431     if((USB_EPTX_DTOG1 & wStatetx)!= 0)      \
 432       _wRegVal ^= USB_EPTX_DTOG1;        \
 433     /* toggle second bit ?  */         \
 434     if((USB_EPTX_DTOG2 & wStatetx)!= 0)      \
 435       _wRegVal ^= USB_EPTX_DTOG2;        \
 436     PCD_SET_ENDPOINT(USBx, bEpNum, _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX);    \
 437   } /* PCD_SET_EP_TXRX_STATUS */
 438
 439 /**
 440   * @brief  gets the status for tx/rx transfer (bits STAT_TX[1:0]
 441   *         /STAT_RX[1:0])
 442   * @param  USBx: USB peripheral instance register address.
 443   * @param  bEpNum: Endpoint Number.
 444   * @retval status
 445   */
 446 #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPTX_STAT)
 447
 448 #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPRX_STAT)
 449
 450 /**
 451   * @brief  sets directly the VALID tx/rx-status into the endpoint register
 452   * @param  USBx: USB peripheral instance register address.
 453   * @param  bEpNum: Endpoint Number.
 454   * @retval None
 455   */
 456 #define PCD_SET_EP_TX_VALID(USBx, bEpNum)     (PCD_SET_EP_TX_STATUS(USBx, bEpNum, USB_EP_TX_VALID))
 457
 458 #define PCD_SET_EP_RX_VALID(USBx, bEpNum)     (PCD_SET_EP_RX_STATUS(USBx, bEpNum, USB_EP_RX_VALID))
 459
 460 /**
 461   * @brief  checks stall condition in an endpoint.
 462   * @param  USBx: USB peripheral instance register address.
 463   * @param  bEpNum: Endpoint Number.
 464   * @retval TRUE = endpoint in stall condition.
 465   */
 466 #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS(USBx, bEpNum) \
 467                                    == USB_EP_TX_STALL)
 468 #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS(USBx, bEpNum) \
 469                                    == USB_EP_RX_STALL)
 470
 471 /**
 472   * @brief  set & clear EP_KIND bit.
 473   * @param  USBx: USB peripheral instance register address.
 474   * @param  bEpNum: Endpoint Number.
 475   * @retval None
 476   */
 477 #define PCD_SET_EP_KIND(USBx, bEpNum)    (PCD_SET_ENDPOINT(USBx, bEpNum, \
 478                                 (USB_EP_CTR_RX|USB_EP_CTR_TX|((PCD_GET_ENDPOINT(USBx, bEpNum) | USB_EP_KIND) & USB_EPREG_MASK))))
 479 #define PCD_CLEAR_EP_KIND(USBx, bEpNum)  (PCD_SET_ENDPOINT(USBx, bEpNum, \
 480                                 (USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPKIND_MASK))))
 481
 482 /**
 483   * @brief  Sets/clears directly STATUS_OUT bit in the endpoint register.
 484   * @param  USBx: USB peripheral instance register address.
 485   * @param  bEpNum: Endpoint Number.
 486   * @retval None
 487   */
 488 #define PCD_SET_OUT_STATUS(USBx, bEpNum)    PCD_SET_EP_KIND(USBx, bEpNum)
 489 #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum)  PCD_CLEAR_EP_KIND(USBx, bEpNum)
 490
 491 /**
 492   * @brief  Sets/clears directly EP_KIND bit in the endpoint register.
 493   * @param  USBx: USB peripheral instance register address.
 494   * @param  bEpNum: Endpoint Number.
 495   * @retval None
 496   */
 497 #define PCD_SET_EP_DBUF(USBx, bEpNum)   PCD_SET_EP_KIND(USBx, bEpNum)
 498 #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND(USBx, bEpNum)
 499
 500 /**
 501   * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
 502   * @param  USBx: USB peripheral instance register address.
 503   * @param  bEpNum: Endpoint Number.
 504   * @retval None
 505   */
 506 #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum)   (PCD_SET_ENDPOINT(USBx, bEpNum,\
 507                                    PCD_GET_ENDPOINT(USBx, bEpNum) & 0x7FFF & USB_EPREG_MASK))
 508 #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum)   (PCD_SET_ENDPOINT(USBx, bEpNum,\
 509                                    PCD_GET_ENDPOINT(USBx, bEpNum) & 0xFF7F & USB_EPREG_MASK))
 510
 511 /**
 512   * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
 513   * @param  USBx: USB peripheral instance register address.
 514   * @param  bEpNum: Endpoint Number.
 515   * @retval None
 516   */
 517 #define PCD_RX_DTOG(USBx, bEpNum)    (PCD_SET_ENDPOINT(USBx, bEpNum, \
 518                                    USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPREG_MASK)))
 519 #define PCD_TX_DTOG(USBx, bEpNum)    (PCD_SET_ENDPOINT(USBx, bEpNum, \
 520                                    USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPREG_MASK)))
 521
 522 /**
 523   * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.
 524   * @param  USBx: USB peripheral instance register address.
 525   * @param  bEpNum: Endpoint Number.
 526   * @retval None
 527   */
 528 #define PCD_CLEAR_RX_DTOG(USBx, bEpNum)  if((PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EP_DTOG_RX) != 0)\
 529     PCD_RX_DTOG(USBx, bEpNum)
 530 #define PCD_CLEAR_TX_DTOG(USBx, bEpNum)  if((PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EP_DTOG_TX) != 0)\
 531     PCD_TX_DTOG(USBx, bEpNum)
 532
 533 /**
 534   * @brief  Sets address in an endpoint register.
 535   * @param  USBx: USB peripheral instance register address.
 536   * @param  bEpNum: Endpoint Number.
 537   * @param  bAddr: Address.
 538   * @retval None
 539   */
 540 #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT(USBx, bEpNum,\
 541     USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPREG_MASK) | bAddr)
 542
 543 #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPADDR_FIELD))
 544
 545 /**
 546   * @brief  sets address of the tx/rx buffer.
 547   * @param  USBx: USB peripheral instance register address.
 548   * @param  bEpNum: Endpoint Number.
 549   * @param  wAddr: address to be set (must be word aligned).
 550   * @retval None
 551   */
 552 #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS(USBx, bEpNum) = ((wAddr >> 1) << 1))
 553 #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS(USBx, bEpNum) = ((wAddr >> 1) << 1))
 554
 555 /**
 556   * @brief  Gets address of the tx/rx buffer.
 557   * @param  USBx: USB peripheral instance register address.
 558   * @param  bEpNum: Endpoint Number.
 559   * @retval address of the buffer.
 560   */
 561 #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS(USBx, bEpNum))
 562 #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS(USBx, bEpNum))
 563
 564 /**
 565   * @brief  Sets counter of rx buffer with no. of blocks.
 566   * @param  dwReg: Register
 567   * @param  wCount: Counter.
 568   * @param  wNBlocks: no. of Blocks.
 569   * @retval None
 570   */
 571 #define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
 572     wNBlocks = wCount >> 5;\
 573     if((wCount & 0x1f) == 0)\
 574       wNBlocks--;\
 575     *pdwReg = (uint16_t)((wNBlocks << 10) | 0x8000);\
 576   }/* PCD_CALC_BLK32 */
 577
 578 #define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
 579     wNBlocks = wCount >> 1;\
 580     if((wCount & 0x1) != 0)\
 581       wNBlocks++;\
 582     *pdwReg = (uint16_t)(wNBlocks << 10);\
 583   }/* PCD_CALC_BLK2 */
 584
 585 #define PCD_SET_EP_CNT_RX_REG(dwReg,wCount)  {\
 586     uint16_t wNBlocks;\
 587     if(wCount > 62){PCD_CALC_BLK32(dwReg,wCount,wNBlocks);}\
 588     else {PCD_CALC_BLK2(dwReg,wCount,wNBlocks);}\
 589   }/* PCD_SET_EP_CNT_RX_REG */
 590
 591 #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\
 592     uint16_t *pdwReg = PCD_EP_TX_CNT(USBx, bEpNum); \
 593     PCD_SET_EP_CNT_RX_REG(pdwReg, wCount);\
 594   }
 595 /**
 596   * @brief  sets counter for the tx/rx buffer.
 597   * @param  USBx: USB peripheral instance register address.
 598   * @param  bEpNum: Endpoint Number.
 599   * @param  wCount: Counter value.
 600   * @retval None
 601   */
 602 #define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT(USBx, bEpNum) = wCount)
 603
 604
 605 /**
 606   * @brief  gets counter of the tx buffer.
 607   * @param  USBx: USB peripheral instance register address.
 608   * @param  bEpNum: Endpoint Number.
 609   * @retval Counter value
 610   */
 611 #define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT(USBx, bEpNum)) & 0x3ff)
 612 #define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT(USBx, bEpNum)) & 0x3ff)
 613
 614 /**
 615   * @brief  Sets buffer 0/1 address in a double buffer endpoint.
 616   * @param  USBx: USB peripheral instance register address.
 617   * @param  bEpNum: Endpoint Number.
 618   * @param  wBuf0Addr: buffer 0 address.
 619   * @retval Counter value
 620   */
 621 #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wBuf0Addr);}
 622 #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wBuf1Addr);}
 623
 624 /**
 625   * @brief  Sets addresses in a double buffer endpoint.
 626   * @param  USBx: USB peripheral instance register address.
 627   * @param  bEpNum: Endpoint Number.
 628   * @param  wBuf0Addr: buffer 0 address.
 629   * @param  wBuf1Addr = buffer 1 address.
 630   * @retval None
 631   */
 632 #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
 633     PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr);\
 634     PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr);\
 635   } /* PCD_SET_EP_DBUF_ADDR */
 636
 637 /**
 638   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
 639   * @param  USBx: USB peripheral instance register address.
 640   * @param  bEpNum: Endpoint Number.
 641   * @retval None
 642   */
 643 #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS(USBx, bEpNum))
 644 #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS(USBx, bEpNum))
 645
 646 /**
 647   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
 648   * @param  USBx: USB peripheral instance register address.
 649   * @param  bEpNum: Endpoint Number.
 650   * @param  bDir: endpoint dir  EP_DBUF_OUT = OUT
 651   *         EP_DBUF_IN  = IN
 652   * @param  wCount: Counter value
 653   * @retval None
 654   */
 655 #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount)  { \
 656     if(bDir == PCD_EP_DBUF_OUT)\
 657       /* OUT endpoint */ \
 658     {PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount);} \
 659     else if(bDir == PCD_EP_DBUF_IN)\
 660       /* IN endpoint */ \
 661       *PCD_EP_TX_CNT(USBx, bEpNum) = (uint32_t)wCount;  \
 662   } /* SetEPDblBuf0Count*/
 663
 664 #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount)  { \
 665     if(bDir == PCD_EP_DBUF_OUT)\
 666       /* OUT endpoint */ \
 667     {PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount);}\
 668     else if(bDir == PCD_EP_DBUF_IN)\
 669       /* IN endpoint */\
 670       *PCD_EP_RX_CNT(USBx, bEpNum) = (uint32_t)wCount; \
 671   } /* SetEPDblBuf1Count */
 672
 673 #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\
 674     PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount); \
 675     PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount); \
 676   } /* PCD_SET_EP_DBUF_CNT  */
 677
 678 /**
 679   * @brief  Gets buffer 0/1 rx/tx counter for double buffering.
 680   * @param  USBx: USB peripheral instance register address.
 681   * @param  bEpNum: Endpoint Number.
 682   * @retval None
 683   */
 684 #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT(USBx, bEpNum))
 685 #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT(USBx, bEpNum))
 686
 687
 688 /**
 689   * @}
 690   */
 691
 692 /* Exported functions --------------------------------------------------------*/
 693
 694 /** @addtogroup PCD_Exported_Functions
 695   * @{
 696   */
 697
 698 /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
 699   * @{
 700   */
 701 /* Initialization/de-initialization functions  **********************************/
 702 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
 703 HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
 704 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
 705 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
 706
 707 /**
 708   * @}
 709   */
 710
 711 /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
 712   * @{
 713   */
 714 /* I/O operation functions  *****************************************************/
 715  /* Non-Blocking mode: Interrupt */
 716 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
 717 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
 718 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
 719
 720 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 721 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 722 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
 723 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
 724 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
 725 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
 726 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
 727 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 728 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 729 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
 730 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
 731
 732 /**
 733   * @}
 734   */
 735
 736 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
 737   * @{
 738   */
 739 /* Peripheral Control functions  ************************************************/
 740 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
 741 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
 742 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
 743 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
 744 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 745 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
 746 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
 747 uint16_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 748 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 749 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 750 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 751 HAL_StatusTypeDef HAL_PCD_ActiveRemoteWakeup(PCD_HandleTypeDef *hpcd);
 752 HAL_StatusTypeDef HAL_PCD_DeActiveRemoteWakeup(PCD_HandleTypeDef *hpcd);
 753 /**
 754   * @}
 755   */
 756
 757 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
 758   * @{
 759   */
 760 /* Peripheral State functions  **************************************************/
 761 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
 762 /**
 763   * @}
 764   */
 765
 766 /** @addtogroup PCDEx_Private_Functions PCD Extended Private Functions
 767   * @{
 768   */
 769 void PCD_WritePMA(USB_TypeDef  *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
 770 void PCD_ReadPMA(USB_TypeDef  *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
 771 /**
 772   * @}
 773   */
 774
 775 /**
 776   * @}
 777   */
 778
 779 /**
 780   * @}
 781   */
 782
 783 /**
 784   * @}
 785   */
 786 #endif /* STM32F302xE || STM32F303xE || */
 787        /* STM32F302xC || STM32F303xC || */
 788        /* STM32F302x8                || */
 789        /* STM32F373xC                   */
 790
 791 #ifdef __cplusplus
 792 }
 793 #endif
 794
 795
 796 #endif /* __STM32F3xx_HAL_PCD_H */
 797
 798 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/