tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3XX/stm32f30x_adc.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f30x_adc.h
   4   * @author  MCD Application Team
   5   * @version V1.1.0
   6   * @date    27-February-2014
   7   * @brief   This file contains all the functions prototypes for the ADC firmware
   8   *          library.
   9   ******************************************************************************
  10   * @attention
  11   *
  12   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  13   *
  14   * Redistribution and use in source and binary forms, with or without modification,
  15   * are permitted provided that the following conditions are met:
  16   *   1. Redistributions of source code must retain the above copyright notice,
  17   *      this list of conditions and the following disclaimer.
  18   *   2. Redistributions in binary form must reproduce the above copyright notice,
  19   *      this list of conditions and the following disclaimer in the documentation
  20   *      and/or other materials provided with the distribution.
  21   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  22   *      may be used to endorse or promote products derived from this software
  23   *      without specific prior written permission.
  24   *
  25   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  26   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  27   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  28   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  29   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  30   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  31   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  32   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  33   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  34   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35   *
  36   ******************************************************************************
  37   */
  38
  39 /* Define to prevent recursive inclusion -------------------------------------*/
  40 #ifndef __STM32F30x_ADC_H
  41 #define __STM32F30x_ADC_H
  42
  43 #ifdef __cplusplus
  44  extern "C" {
  45 #endif
  46
  47 /* Includes ------------------------------------------------------------------*/
  48 #include "stm32f30x.h"
  49
  50 /** @addtogroup STM32F30x_StdPeriph_Driver
  51   * @{
  52   */
  53
  54 /** @addtogroup ADC
  55   * @{
  56   */
  57
  58 /* Exported types ------------------------------------------------------------*/
  59
  60 /**
  61   * @brief  ADC Init structure definition
  62   */
  63 typedef struct
  64 {
  65
  66   uint32_t ADC_ContinuousConvMode;        /*!< Specifies whether the conversion is performed in
  67                                                Continuous or Single mode.
  68                                                This parameter can be set to ENABLE or DISABLE. */
  69   uint32_t ADC_Resolution;                /*!< Configures the ADC resolution.
  70                                                This parameter can be a value of @ref ADC_resolution */
  71   uint32_t ADC_ExternalTrigConvEvent;      /*!< Defines the external trigger used to start the analog
  72                                                to digital conversion of regular channels. This parameter
  73                                                can be a value of @ref ADC_external_trigger_sources_for_regular_channels_conversion */
  74   uint32_t ADC_ExternalTrigEventEdge;      /*!< Select the external trigger edge and enable the trigger of a regular group.
  75                                                This parameter can be a value of
  76                                                @ref ADC_external_trigger_edge_for_regular_channels_conversion */
  77   uint32_t ADC_DataAlign;                 /*!< Specifies whether the ADC data alignment is left or right.
  78                                                This parameter can be a value of @ref ADC_data_align */
  79   uint32_t ADC_OverrunMode;               /*!< Specifies the way data overrun are managed.
  80                                                This parameter can be set to ENABLE or DISABLE. */
  81   uint32_t ADC_AutoInjMode;               /*!< Enable/disable automatic injected group conversion after
  82                                                regular group conversion.
  83                                                This parameter can be set to ENABLE or DISABLE. */
  84   uint8_t ADC_NbrOfRegChannel;            /*!< Specifies the number of ADC channels that will be converted
  85                                                using the sequencer for regular channel group.
  86                                                This parameter must range from 1 to 16. */
  87 }ADC_InitTypeDef;
  88
  89 /**
  90   * @}
  91   */
  92 /**
  93   * @brief  ADC Init structure definition
  94   */
  95 typedef struct
  96 {
  97
  98    uint32_t ADC_ExternalTrigInjecConvEvent;     /*!< Defines the external trigger used to start the analog
  99                                                      to digital conversion of injected channels. This parameter
 100                                                      can be a value of @ref ADC_external_trigger_sources_for_Injected_channels_conversion */
 101   uint32_t ADC_ExternalTrigInjecEventEdge;     /*!< Select the external trigger edge and enable the trigger of an injected group.
 102                                                     This parameter can be a value of
 103                                                     @ref ADC_external_trigger_edge_for_Injected_channels_conversion */
 104   uint8_t ADC_NbrOfInjecChannel;               /*!< Specifies the number of ADC channels that will be converted
 105                                                     using the sequencer for injected channel group.
 106                                                     This parameter must range from 1 to 4. */
 107   uint32_t ADC_InjecSequence1;
 108   uint32_t ADC_InjecSequence2;
 109   uint32_t ADC_InjecSequence3;
 110   uint32_t ADC_InjecSequence4;
 111 }ADC_InjectedInitTypeDef;
 112
 113 /**
 114   * @}
 115   */
 116 typedef struct
 117 {
 118   uint32_t ADC_Mode;                      /*!< Configures the ADC to operate in
 119                                                independent or multi mode.
 120                                                This parameter can be a value of @ref ADC_mode */
 121   uint32_t ADC_Clock;                    /*!< Select the clock of the ADC. The clock is common for both master
 122                                               and slave ADCs.
 123                                               This parameter can be a value of @ref ADC_Clock */
 124   uint32_t ADC_DMAAccessMode;             /*!< Configures the Direct memory access mode for multi ADC mode.
 125                                                This parameter can be a value of
 126                                                @ref ADC_Direct_memory_access_mode_for_multi_mode */
 127   uint32_t ADC_DMAMode;                  /*!< Configures the DMA mode for ADC.
 128                                               This parameter can be a value of @ref ADC_DMA_Mode_definition */
 129   uint8_t ADC_TwoSamplingDelay;          /*!< Configures the Delay between 2 sampling phases.
 130                                                This parameter can be a value between  0x0 and 0xF  */
 131
 132 }ADC_CommonInitTypeDef;
 133
 134 /* Exported constants --------------------------------------------------------*/
 135
 136 /** @defgroup ADC_Exported_Constants
 137   * @{
 138   */
 139
 140 #define IS_ADC_ALL_PERIPH(PERIPH) (((PERIPH) == ADC1) || \
 141                                    ((PERIPH) == ADC2) || \
 142                                    ((PERIPH) == ADC3) || \
 143                                    ((PERIPH) == ADC4))
 144
 145 #define IS_ADC_DMA_PERIPH(PERIPH) (((PERIPH) == ADC1) || \
 146                                    ((PERIPH) == ADC2) || \
 147                                    ((PERIPH) == ADC3) || \
 148                                    ((PERIPH) == ADC4))
 149
 150 /** @defgroup ADC_ContinuousConvMode
 151   * @{
 152   */
 153 #define ADC_ContinuousConvMode_Enable    ((uint32_t)0x00002000)  /*!<  ADC continuous conversion mode enable */
 154 #define ADC_ContinuousConvMode_Disable   ((uint32_t)0x00000000)  /*!<  ADC continuous conversion mode disable */
 155 #define IS_ADC_CONVMODE(MODE) (((MODE) == ADC_ContinuousConvMode_Enable) || \
 156                                ((MODE) == ADC_ContinuousConvMode_Disable))
 157 /**
 158   * @}
 159   */
 160 /** @defgroup ADC_OverunMode
 161   * @{
 162   */
 163 #define ADC_OverrunMode_Enable   ((uint32_t)0x00001000)  /*!<  ADC Overrun Mode enable */
 164 #define ADC_OverrunMode_Disable  ((uint32_t)0x00000000)  /*!<  ADC Overrun Mode disable */
 165 #define IS_ADC_OVRUNMODE(MODE) (((MODE) == ADC_OverrunMode_Enable) || \
 166                                 ((MODE) == ADC_OverrunMode_Disable))
 167 /**
 168   * @}
 169   */
 170 /** @defgroup ADC_AutoInjecMode
 171   * @{
 172   */
 173 #define ADC_AutoInjec_Enable     ((uint32_t)0x02000000)  /*!<  ADC Auto injected Mode enable */
 174 #define ADC_AutoInjec_Disable    ((uint32_t)0x00000000)  /*!<  ADC Auto injected Mode disable */
 175 #define IS_ADC_AUTOINJECMODE(MODE) (((MODE) == ADC_AutoInjec_Enable) || \
 176                                     ((MODE) == ADC_AutoInjec_Disable))
 177 /**
 178   * @}
 179   */
 180 /** @defgroup ADC_resolution
 181   * @{
 182   */
 183 #define ADC_Resolution_12b                         ((uint32_t)0x00000000)  /*!<  ADC 12-bit resolution */
 184 #define ADC_Resolution_10b                         ((uint32_t)0x00000008)  /*!<  ADC 10-bit resolution */
 185 #define ADC_Resolution_8b                          ((uint32_t)0x00000010)  /*!<  ADC 8-bit resolution */
 186 #define ADC_Resolution_6b                          ((uint32_t)0x00000018)  /*!<  ADC 6-bit resolution */
 187 #define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_Resolution_12b) || \
 188                                        ((RESOLUTION) == ADC_Resolution_10b) || \
 189                                        ((RESOLUTION) == ADC_Resolution_8b) || \
 190                                        ((RESOLUTION) == ADC_Resolution_6b))
 191
 192 /**
 193   * @}
 194   */
 195
 196
 197 /** @defgroup ADC_external_trigger_edge_for_regular_channels_conversion
 198   * @{
 199   */
 200 #define ADC_ExternalTrigEventEdge_None            ((uint16_t)0x0000)     /*!<  ADC No external trigger for regular conversion */
 201 #define ADC_ExternalTrigEventEdge_RisingEdge      ((uint16_t)0x0400)     /*!<  ADC external trigger rising edge for regular conversion */
 202 #define ADC_ExternalTrigEventEdge_FallingEdge     ((uint16_t)0x0800)     /*!<  ADC ADC external trigger falling edge for regular conversion */
 203 #define ADC_ExternalTrigEventEdge_BothEdge        ((uint16_t)0x0C00)     /*!<  ADC ADC external trigger both edges for regular conversion */
 204
 205 #define IS_EXTERNALTRIG_EDGE(EDGE) (((EDGE) == ADC_ExternalTrigEventEdge_None) || \
 206                                     ((EDGE) == ADC_ExternalTrigEventEdge_RisingEdge) || \
 207                                     ((EDGE) == ADC_ExternalTrigEventEdge_FallingEdge) || \
 208                                     ((EDGE) == ADC_ExternalTrigEventEdge_BothEdge))
 209
 210 /**
 211   * @}
 212   */
 213
 214 /** @defgroup ADC_external_trigger_edge_for_Injected_channels_conversion
 215   * @{
 216   */
 217 #define ADC_ExternalTrigInjecEventEdge_None                  ((uint16_t)0x0000)    /*!<  ADC No external trigger for regular conversion */
 218 #define ADC_ExternalTrigInjecEventEdge_RisingEdge        ((uint16_t)0x0040)    /*!<  ADC external trigger rising edge for injected conversion */
 219 #define ADC_ExternalTrigInjecEventEdge_FallingEdge       ((uint16_t)0x0080)  /*!<  ADC external trigger falling edge for injected conversion */
 220 #define ADC_ExternalTrigInjecEventEdge_BothEdge      ((uint16_t)0x00C0)  /*!<  ADC external trigger both edges for injected conversion */
 221
 222 #define IS_EXTERNALTRIGINJ_EDGE(EDGE) (((EDGE) == ADC_ExternalTrigInjecEventEdge_None) || \
 223                                        ((EDGE) == ADC_ExternalTrigInjecEventEdge_RisingEdge) || \
 224                                        ((EDGE) == ADC_ExternalTrigInjecEventEdge_FallingEdge) || \
 225                                        ((EDGE) == ADC_ExternalTrigInjecEventEdge_BothEdge))
 226
 227 /** @defgroup ADC_external_trigger_sources_for_regular_channels_conversion
 228   * @{
 229   */
 230 #define ADC_ExternalTrigConvEvent_0              ((uint16_t)0x0000)   /*!<  ADC external trigger event 0 */
 231 #define ADC_ExternalTrigConvEvent_1              ((uint16_t)0x0040)   /*!<  ADC external trigger event 1 */
 232 #define ADC_ExternalTrigConvEvent_2              ((uint16_t)0x0080)   /*!<  ADC external trigger event 2 */
 233 #define ADC_ExternalTrigConvEvent_3              ((uint16_t)0x00C0)   /*!<  ADC external trigger event 3 */
 234 #define ADC_ExternalTrigConvEvent_4              ((uint16_t)0x0100)   /*!<  ADC external trigger event 4 */
 235 #define ADC_ExternalTrigConvEvent_5              ((uint16_t)0x0140)   /*!<  ADC external trigger event 5 */
 236 #define ADC_ExternalTrigConvEvent_6              ((uint16_t)0x0180)   /*!<  ADC external trigger event 6 */
 237 #define ADC_ExternalTrigConvEvent_7              ((uint16_t)0x01C0)   /*!<  ADC external trigger event 7 */
 238 #define ADC_ExternalTrigConvEvent_8              ((uint16_t)0x0200)   /*!<  ADC external trigger event 8 */
 239 #define ADC_ExternalTrigConvEvent_9              ((uint16_t)0x0240)   /*!<  ADC external trigger event 9 */
 240 #define ADC_ExternalTrigConvEvent_10             ((uint16_t)0x0280)   /*!<  ADC external trigger event 10 */
 241 #define ADC_ExternalTrigConvEvent_11             ((uint16_t)0x02C0)   /*!<  ADC external trigger event 11 */
 242 #define ADC_ExternalTrigConvEvent_12             ((uint16_t)0x0300)   /*!<  ADC external trigger event 12 */
 243 #define ADC_ExternalTrigConvEvent_13             ((uint16_t)0x0340)   /*!<  ADC external trigger event 13 */
 244 #define ADC_ExternalTrigConvEvent_14             ((uint16_t)0x0380)   /*!<  ADC external trigger event 14 */
 245 #define ADC_ExternalTrigConvEvent_15             ((uint16_t)0x03C0)   /*!<  ADC external trigger event 15 */
 246
 247 #define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConvEvent_0) || \
 248                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_1) || \
 249                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_2) || \
 250                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_3) || \
 251                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_4) || \
 252                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_5) || \
 253                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_6) || \
 254                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_7) || \
 255                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_8) || \
 256                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_9) || \
 257                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_10) || \
 258                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_11) || \
 259                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_12) || \
 260                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_13) || \
 261                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_14) || \
 262                                   ((REGTRIG) == ADC_ExternalTrigConvEvent_15))
 263
 264 /**
 265   * @}
 266   */
 267
 268 /** @defgroup ADC_external_trigger_sources_for_Injected_channels_conversion
 269   * @{
 270   */
 271
 272 #define ADC_ExternalTrigInjecConvEvent_0              ((uint16_t)0x0000)  /*!<  ADC external trigger for injected conversion event 0 */
 273 #define ADC_ExternalTrigInjecConvEvent_1              ((uint16_t)0x0004)  /*!<  ADC external trigger for injected conversion event 1 */
 274 #define ADC_ExternalTrigInjecConvEvent_2              ((uint16_t)0x0008)  /*!<  ADC external trigger for injected conversion event 2 */
 275 #define ADC_ExternalTrigInjecConvEvent_3              ((uint16_t)0x000C)  /*!<  ADC external trigger for injected conversion event 3 */
 276 #define ADC_ExternalTrigInjecConvEvent_4              ((uint16_t)0x0010)  /*!<  ADC external trigger for injected conversion event 4 */
 277 #define ADC_ExternalTrigInjecConvEvent_5              ((uint16_t)0x0014)  /*!<  ADC external trigger for injected conversion event 5 */
 278 #define ADC_ExternalTrigInjecConvEvent_6              ((uint16_t)0x0018)  /*!<  ADC external trigger for injected conversion event 6 */
 279 #define ADC_ExternalTrigInjecConvEvent_7              ((uint16_t)0x001C)  /*!<  ADC external trigger for injected conversion event 7 */
 280 #define ADC_ExternalTrigInjecConvEvent_8              ((uint16_t)0x0020)  /*!<  ADC external trigger for injected conversion event 8 */
 281 #define ADC_ExternalTrigInjecConvEvent_9              ((uint16_t)0x0024)  /*!<  ADC external trigger for injected conversion event 9 */
 282 #define ADC_ExternalTrigInjecConvEvent_10             ((uint16_t)0x0028)  /*!<  ADC external trigger for injected conversion event 10 */
 283 #define ADC_ExternalTrigInjecConvEvent_11             ((uint16_t)0x002C)  /*!<  ADC external trigger for injected conversion event 11 */
 284 #define ADC_ExternalTrigInjecConvEvent_12             ((uint16_t)0x0030)  /*!<  ADC external trigger for injected conversion event 12 */
 285 #define ADC_ExternalTrigInjecConvEvent_13             ((uint16_t)0x0034)  /*!<  ADC external trigger for injected conversion event 13 */
 286 #define ADC_ExternalTrigInjecConvEvent_14             ((uint16_t)0x0038)  /*!<  ADC external trigger for injected conversion event 14 */
 287 #define ADC_ExternalTrigInjecConvEvent_15             ((uint16_t)0x003C)  /*!<  ADC external trigger for injected conversion event 15 */
 288
 289 #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConvEvent_0) || \
 290                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_1) || \
 291                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_2) || \
 292                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_3) || \
 293                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_4) || \
 294                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_5) || \
 295                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_6) || \
 296                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_7) || \
 297                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_8) || \
 298                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_9) || \
 299                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_10) || \
 300                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_11) || \
 301                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_12) || \
 302                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_13) || \
 303                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_14) || \
 304                                         ((INJTRIG) == ADC_ExternalTrigInjecConvEvent_15))
 305 /**
 306   * @}
 307   */
 308 /** @defgroup ADC_data_align
 309   * @{
 310   */
 311
 312 #define ADC_DataAlign_Right                        ((uint32_t)0x00000000)  /*!<  ADC Data alignment right */
 313 #define ADC_DataAlign_Left                         ((uint32_t)0x00000020)  /*!<  ADC Data alignment left */
 314 #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \
 315                                   ((ALIGN) == ADC_DataAlign_Left))
 316 /**
 317   * @}
 318   */
 319
 320 /** @defgroup ADC_channels
 321   * @{
 322   */
 323
 324 #define ADC_Channel_1                               ((uint8_t)0x01)    /*!<  ADC Channel 1 */
 325 #define ADC_Channel_2                               ((uint8_t)0x02)    /*!<  ADC Channel 2 */
 326 #define ADC_Channel_3                               ((uint8_t)0x03)    /*!<  ADC Channel 3 */
 327 #define ADC_Channel_4                               ((uint8_t)0x04)    /*!<  ADC Channel 4 */
 328 #define ADC_Channel_5                               ((uint8_t)0x05)    /*!<  ADC Channel 5 */
 329 #define ADC_Channel_6                               ((uint8_t)0x06)    /*!<  ADC Channel 6 */
 330 #define ADC_Channel_7                               ((uint8_t)0x07)    /*!<  ADC Channel 7 */
 331 #define ADC_Channel_8                               ((uint8_t)0x08)    /*!<  ADC Channel 8 */
 332 #define ADC_Channel_9                               ((uint8_t)0x09)    /*!<  ADC Channel 9 */
 333 #define ADC_Channel_10                              ((uint8_t)0x0A)    /*!<  ADC Channel 10 */
 334 #define ADC_Channel_11                              ((uint8_t)0x0B)    /*!<  ADC Channel 11 */
 335 #define ADC_Channel_12                              ((uint8_t)0x0C)    /*!<  ADC Channel 12 */
 336 #define ADC_Channel_13                              ((uint8_t)0x0D)    /*!<  ADC Channel 13 */
 337 #define ADC_Channel_14                              ((uint8_t)0x0E)    /*!<  ADC Channel 14 */
 338 #define ADC_Channel_15                              ((uint8_t)0x0F)    /*!<  ADC Channel 15 */
 339 #define ADC_Channel_16                              ((uint8_t)0x10)    /*!<  ADC Channel 16 */
 340 #define ADC_Channel_17                              ((uint8_t)0x11)    /*!<  ADC Channel 17 */
 341 #define ADC_Channel_18                              ((uint8_t)0x12)    /*!<  ADC Channel 18 */
 342
 343 #define ADC_Channel_TempSensor                      ((uint8_t)ADC_Channel_16)
 344 #define ADC_Channel_Vrefint                         ((uint8_t)ADC_Channel_18)
 345 #define ADC_Channel_Vbat                            ((uint8_t)ADC_Channel_17)
 346
 347 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_1)  || \
 348                                  ((CHANNEL) == ADC_Channel_2)  || \
 349                                  ((CHANNEL) == ADC_Channel_3)  || \
 350                                  ((CHANNEL) == ADC_Channel_4)  || \
 351                                  ((CHANNEL) == ADC_Channel_5)  || \
 352                                  ((CHANNEL) == ADC_Channel_6)  || \
 353                                  ((CHANNEL) == ADC_Channel_7)  || \
 354                                  ((CHANNEL) == ADC_Channel_8)  || \
 355                                  ((CHANNEL) == ADC_Channel_9)  || \
 356                                  ((CHANNEL) == ADC_Channel_10) || \
 357                                  ((CHANNEL) == ADC_Channel_11) || \
 358                                  ((CHANNEL) == ADC_Channel_12) || \
 359                                  ((CHANNEL) == ADC_Channel_13) || \
 360                                  ((CHANNEL) == ADC_Channel_14) || \
 361                                  ((CHANNEL) == ADC_Channel_15) || \
 362                                  ((CHANNEL) == ADC_Channel_16) || \
 363                                  ((CHANNEL) == ADC_Channel_17) || \
 364                                  ((CHANNEL) == ADC_Channel_18))
 365 #define IS_ADC_DIFFCHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_1)  || \
 366                                      ((CHANNEL) == ADC_Channel_2)  || \
 367                                      ((CHANNEL) == ADC_Channel_3)  || \
 368                                      ((CHANNEL) == ADC_Channel_4)  || \
 369                                      ((CHANNEL) == ADC_Channel_5)  || \
 370                                      ((CHANNEL) == ADC_Channel_6)  || \
 371                                      ((CHANNEL) == ADC_Channel_7)  || \
 372                                      ((CHANNEL) == ADC_Channel_8)  || \
 373                                      ((CHANNEL) == ADC_Channel_9)  || \
 374                                      ((CHANNEL) == ADC_Channel_10) || \
 375                                      ((CHANNEL) == ADC_Channel_11) || \
 376                                      ((CHANNEL) == ADC_Channel_12) || \
 377                                      ((CHANNEL) == ADC_Channel_13) || \
 378                                      ((CHANNEL) == ADC_Channel_14))
 379 /**
 380   * @}
 381   */
 382
 383 /** @defgroup ADC_mode
 384   * @{
 385   */
 386 #define ADC_Mode_Independent                  ((uint32_t)0x00000000) /*!<  ADC independent mode */
 387 #define ADC_Mode_CombRegSimulInjSimul         ((uint32_t)0x00000001) /*!<  ADC multi ADC mode: Combined Regular simultaneous injected simultaneous mode */
 388 #define ADC_Mode_CombRegSimulAltTrig          ((uint32_t)0x00000002) /*!<  ADC multi ADC mode: Combined Regular simultaneous Alternate trigger mode */
 389 #define ADC_Mode_InjSimul                     ((uint32_t)0x00000005) /*!<  ADC multi ADC mode: Injected simultaneous mode */
 390 #define ADC_Mode_RegSimul                     ((uint32_t)0x00000006) /*!<  ADC multi ADC mode: Regular simultaneous mode */
 391 #define ADC_Mode_Interleave                   ((uint32_t)0x00000007) /*!<  ADC multi ADC mode: Interleave mode */
 392 #define ADC_Mode_AltTrig                      ((uint32_t)0x00000009) /*!<  ADC multi ADC mode: Alternate Trigger mode */
 393
 394 #define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \
 395                            ((MODE) == ADC_Mode_CombRegSimulInjSimul) || \
 396                            ((MODE) == ADC_Mode_CombRegSimulAltTrig) || \
 397                            ((MODE) == ADC_Mode_InjSimul) || \
 398                            ((MODE) == ADC_Mode_RegSimul) || \
 399                            ((MODE) == ADC_Mode_Interleave) || \
 400                            ((MODE) == ADC_Mode_AltTrig))
 401
 402 /**
 403   * @}
 404   */
 405
 406 /** @defgroup ADC_Clock
 407   * @{
 408   */
 409 #define ADC_Clock_AsynClkMode                  ((uint32_t)0x00000000)   /*!< ADC Asynchronous clock mode */
 410 #define ADC_Clock_SynClkModeDiv1               ((uint32_t)0x00010000)   /*!< Synchronous clock mode divided by 1 */
 411 #define ADC_Clock_SynClkModeDiv2               ((uint32_t)0x00020000)   /*!<  Synchronous clock mode divided by 2 */
 412 #define ADC_Clock_SynClkModeDiv4               ((uint32_t)0x00030000)   /*!<  Synchronous clock mode divided by 4 */
 413 #define IS_ADC_CLOCKMODE(CLOCK) (((CLOCK) == ADC_Clock_AsynClkMode) ||\
 414                                 ((CLOCK) == ADC_Clock_SynClkModeDiv1) ||\
 415                                 ((CLOCK) == ADC_Clock_SynClkModeDiv2)||\
 416                                 ((CLOCK) == ADC_Clock_SynClkModeDiv4))
 417 /**
 418   * @}
 419   */
 420 /** @defgroup ADC_Direct_memory_access_mode_for_multi_mode
 421   * @{
 422   */
 423 #define ADC_DMAAccessMode_Disabled      ((uint32_t)0x00000000)     /*!<  DMA mode disabled */
 424 #define ADC_DMAAccessMode_1             ((uint32_t)0x00008000)     /*!<  DMA mode enabled for 12 and 10-bit resolution (6 bit) */
 425 #define ADC_DMAAccessMode_2             ((uint32_t)0x0000C000)     /*!<  DMA mode enabled for 8 and 6-bit resolution (8bit) */
 426 #define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAAccessMode_Disabled) || \
 427                                       ((MODE) == ADC_DMAAccessMode_1) || \
 428                                       ((MODE) == ADC_DMAAccessMode_2))
 429
 430 /**
 431   * @}
 432   */
 433 /** @defgroup ADC_sampling_time
 434   * @{
 435   */
 436
 437 #define ADC_SampleTime_1Cycles5                    ((uint8_t)0x00)   /*!<  ADC sampling time 1.5 cycle */
 438 #define ADC_SampleTime_2Cycles5                    ((uint8_t)0x01)   /*!<  ADC sampling time 2.5 cycles */
 439 #define ADC_SampleTime_4Cycles5                    ((uint8_t)0x02)   /*!<  ADC sampling time 4.5 cycles */
 440 #define ADC_SampleTime_7Cycles5                    ((uint8_t)0x03)   /*!<  ADC sampling time 7.5 cycles */
 441 #define ADC_SampleTime_19Cycles5                   ((uint8_t)0x04)   /*!<  ADC sampling time 19.5 cycles */
 442 #define ADC_SampleTime_61Cycles5                   ((uint8_t)0x05)   /*!<  ADC sampling time 61.5 cycles */
 443 #define ADC_SampleTime_181Cycles5                  ((uint8_t)0x06)   /*!<  ADC sampling time 181.5 cycles */
 444 #define ADC_SampleTime_601Cycles5                  ((uint8_t)0x07)   /*!<  ADC sampling time 601.5 cycles */
 445 #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1Cycles5) || \
 446                                   ((TIME) == ADC_SampleTime_2Cycles5) || \
 447                                   ((TIME) == ADC_SampleTime_4Cycles5) || \
 448                                   ((TIME) == ADC_SampleTime_7Cycles5) || \
 449                                   ((TIME) == ADC_SampleTime_19Cycles5) || \
 450                                   ((TIME) == ADC_SampleTime_61Cycles5) || \
 451                                   ((TIME) == ADC_SampleTime_181Cycles5) || \
 452                                   ((TIME) == ADC_SampleTime_601Cycles5))
 453 /**
 454   * @}
 455   */
 456
 457 /** @defgroup ADC_injected_Channel_selection
 458   * @{
 459   */
 460
 461 #define ADC_InjectedChannel_1                       ADC_Channel_1        /*!<  ADC Injected channel 1 */
 462 #define ADC_InjectedChannel_2                       ADC_Channel_2        /*!<  ADC Injected channel 2 */
 463 #define ADC_InjectedChannel_3                       ADC_Channel_3        /*!<  ADC Injected channel 3 */
 464 #define ADC_InjectedChannel_4                       ADC_Channel_4        /*!<  ADC Injected channel 4 */
 465 #define ADC_InjectedChannel_5                       ADC_Channel_5        /*!<  ADC Injected channel 5 */
 466 #define ADC_InjectedChannel_6                       ADC_Channel_6        /*!<  ADC Injected channel 6 */
 467 #define ADC_InjectedChannel_7                       ADC_Channel_7        /*!<  ADC Injected channel 7 */
 468 #define ADC_InjectedChannel_8                       ADC_Channel_8        /*!<  ADC Injected channel 8 */
 469 #define ADC_InjectedChannel_9                       ADC_Channel_9        /*!<  ADC Injected channel 9 */
 470 #define ADC_InjectedChannel_10                      ADC_Channel_10       /*!<  ADC Injected channel 10 */
 471 #define ADC_InjectedChannel_11                      ADC_Channel_11       /*!<  ADC Injected channel 11 */
 472 #define ADC_InjectedChannel_12                      ADC_Channel_12       /*!<  ADC Injected channel 12 */
 473 #define ADC_InjectedChannel_13                      ADC_Channel_13       /*!<  ADC Injected channel 13 */
 474 #define ADC_InjectedChannel_14                      ADC_Channel_14       /*!<  ADC Injected channel 14 */
 475 #define ADC_InjectedChannel_15                      ADC_Channel_15       /*!<  ADC Injected channel 15 */
 476 #define ADC_InjectedChannel_16                      ADC_Channel_16       /*!<  ADC Injected channel 16 */
 477 #define ADC_InjectedChannel_17                      ADC_Channel_17       /*!<  ADC Injected channel 17 */
 478 #define ADC_InjectedChannel_18                      ADC_Channel_18       /*!<  ADC Injected channel 18 */
 479
 480 #define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \
 481                                           ((CHANNEL) == ADC_InjectedChannel_2) || \
 482                                           ((CHANNEL) == ADC_InjectedChannel_3) || \
 483                                           ((CHANNEL) == ADC_InjectedChannel_4) ||\
 484                                           ((CHANNEL) == ADC_InjectedChannel_5) ||\
 485                                           ((CHANNEL) == ADC_InjectedChannel_6) ||\
 486                                           ((CHANNEL) == ADC_InjectedChannel_7) ||\
 487                                           ((CHANNEL) == ADC_InjectedChannel_8) ||\
 488                                           ((CHANNEL) == ADC_InjectedChannel_9) ||\
 489                                           ((CHANNEL) == ADC_InjectedChannel_10) ||\
 490                                           ((CHANNEL) == ADC_InjectedChannel_11) ||\
 491                                           ((CHANNEL) == ADC_InjectedChannel_12) ||\
 492                                           ((CHANNEL) == ADC_InjectedChannel_13) ||\
 493                                           ((CHANNEL) == ADC_InjectedChannel_14) ||\
 494                                           ((CHANNEL) == ADC_InjectedChannel_15) ||\
 495                                           ((CHANNEL) == ADC_InjectedChannel_16) ||\
 496                                           ((CHANNEL) == ADC_InjectedChannel_17) ||\
 497                                           ((CHANNEL) == ADC_InjectedChannel_18))
 498 /**
 499   * @}
 500   */
 501
 502 /** @defgroup ADC_injected_Sequence_selection
 503   * @{
 504   */
 505
 506 #define ADC_InjectedSequence_1                       ADC_Channel_1        /*!<  ADC Injected sequence 1 */
 507 #define ADC_InjectedSequence_2                       ADC_Channel_2        /*!<  ADC Injected sequence 2 */
 508 #define ADC_InjectedSequence_3                       ADC_Channel_3        /*!<  ADC Injected sequence 3 */
 509 #define ADC_InjectedSequence_4                       ADC_Channel_4        /*!<  ADC Injected sequence 4 */
 510 #define IS_ADC_INJECTED_SEQUENCE(SEQUENCE) (((SEQUENCE) == ADC_InjectedSequence_1) || \
 511                                             ((SEQUENCE) == ADC_InjectedSequence_2) || \
 512                                             ((SEQUENCE) == ADC_InjectedSequence_3) || \
 513                                             ((SEQUENCE) == ADC_InjectedSequence_4))
 514 /**
 515   * @}
 516   */
 517
 518 /** @defgroup ADC_analog_watchdog_selection
 519   * @{
 520   */
 521
 522 #define ADC_AnalogWatchdog_SingleRegEnable         ((uint32_t)0x00C00000)    /*!<  ADC Analog watchdog single regular mode */
 523 #define ADC_AnalogWatchdog_SingleInjecEnable       ((uint32_t)0x01400000)    /*!<  ADC Analog watchdog single injected mode */
 524 #define ADC_AnalogWatchdog_SingleRegOrInjecEnable  ((uint32_t)0x01C00000)    /*!<  ADC Analog watchdog single regular or injected mode */
 525 #define ADC_AnalogWatchdog_AllRegEnable            ((uint32_t)0x00800000)    /*!<  ADC Analog watchdog all regular mode */
 526 #define ADC_AnalogWatchdog_AllInjecEnable          ((uint32_t)0x01000000)    /*!<  ADC Analog watchdog all injected mode */
 527 #define ADC_AnalogWatchdog_AllRegAllInjecEnable    ((uint32_t)0x01800000)    /*!<  ADC Analog watchdog all regular and all injected mode */
 528 #define ADC_AnalogWatchdog_None                    ((uint32_t)0x00000000)    /*!<  ADC Analog watchdog off */
 529
 530 #define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \
 531                                           ((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \
 532                                           ((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \
 533                                           ((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \
 534                                           ((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \
 535                                           ((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \
 536                                           ((WATCHDOG) == ADC_AnalogWatchdog_None))
 537 /**
 538   * @}
 539   */
 540
 541 /** @defgroup ADC_Calibration_Mode_definition
 542   * @{
 543   */
 544 #define ADC_CalibrationMode_Single         ((uint32_t)0x00000000)   /*!<  ADC Calibration for single ended channel */
 545 #define ADC_CalibrationMode_Differential   ((uint32_t)0x40000000)   /*!<  ADC Calibration for differential channel */
 546
 547 #define IS_ADC_CALIBRATION_MODE(MODE) (((MODE) == ADC_CalibrationMode_Single) ||((MODE) == ADC_CalibrationMode_Differential))
 548
 549 /**
 550   * @}
 551   */
 552
 553 /** @defgroup ADC_DMA_Mode_definition
 554   * @{
 555   */
 556 #define ADC_DMAMode_OneShot        ((uint32_t)0x00000000)   /*!<  ADC DMA Oneshot mode */
 557 #define ADC_DMAMode_Circular   ((uint32_t)0x00000002)   /*!<  ADC DMA circular mode */
 558
 559 #define IS_ADC_DMA_MODE(MODE) (((MODE) == ADC_DMAMode_OneShot) || ((MODE) == ADC_DMAMode_Circular))
 560 /**
 561   * @}
 562   */
 563
 564 /** @defgroup ADC_interrupts_definition
 565   * @{
 566   */
 567
 568 #define ADC_IT_RDY           ((uint16_t)0x0001)  /*!< ADC Ready (ADRDY) interrupt source */
 569 #define ADC_IT_EOSMP         ((uint16_t)0x0002)  /*!< ADC End of Sampling interrupt source */
 570 #define ADC_IT_EOC           ((uint16_t)0x0004)  /*!< ADC End of Regular Conversion interrupt source */
 571 #define ADC_IT_EOS           ((uint16_t)0x0008)  /*!< ADC End of Regular sequence of Conversions interrupt source */
 572 #define ADC_IT_OVR           ((uint16_t)0x0010)  /*!< ADC overrun interrupt source */
 573 #define ADC_IT_JEOC          ((uint16_t)0x0020)  /*!< ADC End of Injected Conversion interrupt source */
 574 #define ADC_IT_JEOS          ((uint16_t)0x0040)  /*!< ADC End of Injected sequence of Conversions interrupt source */
 575 #define ADC_IT_AWD1          ((uint16_t)0x0080)  /*!< ADC Analog watchdog 1 interrupt source */
 576 #define ADC_IT_AWD2          ((uint16_t)0x0100)  /*!< ADC Analog watchdog 2 interrupt source */
 577 #define ADC_IT_AWD3          ((uint16_t)0x0200)  /*!< ADC Analog watchdog 3 interrupt source */
 578 #define ADC_IT_JQOVF         ((uint16_t)0x0400)  /*!< ADC Injected Context Queue Overflow interrupt source */
 579
 580
 581 #define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xF800) == 0x0000) && ((IT) != 0x0000))
 582
 583 #define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_RDY) || ((IT) == ADC_IT_EOSMP) || \
 584                            ((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_EOS) || \
 585                            ((IT) == ADC_IT_OVR) || ((IT) == ADC_IT_EOS) || \
 586                            ((IT) == ADC_IT_JEOS) || ((IT) == ADC_IT_AWD1) || \
 587                            ((IT) == ADC_IT_AWD2) || ((IT) == ADC_IT_AWD3) || \
 588                            ((IT) == ADC_IT_JQOVF))
 589 /**
 590   * @}
 591   */
 592
 593 /** @defgroup ADC_flags_definition
 594   * @{
 595   */
 596
 597 #define ADC_FLAG_RDY           ((uint16_t)0x0001)  /*!< ADC Ready (ADRDY) flag */
 598 #define ADC_FLAG_EOSMP         ((uint16_t)0x0002)  /*!< ADC End of Sampling flag */
 599 #define ADC_FLAG_EOC           ((uint16_t)0x0004)  /*!< ADC End of Regular Conversion flag */
 600 #define ADC_FLAG_EOS           ((uint16_t)0x0008)  /*!< ADC End of Regular sequence of Conversions flag */
 601 #define ADC_FLAG_OVR           ((uint16_t)0x0010)  /*!< ADC overrun flag */
 602 #define ADC_FLAG_JEOC          ((uint16_t)0x0020)  /*!< ADC End of Injected Conversion flag */
 603 #define ADC_FLAG_JEOS          ((uint16_t)0x0040)  /*!< ADC End of Injected sequence of Conversions flag */
 604 #define ADC_FLAG_AWD1          ((uint16_t)0x0080)  /*!< ADC Analog watchdog 1 flag */
 605 #define ADC_FLAG_AWD2          ((uint16_t)0x0100)  /*!< ADC Analog watchdog 2 flag */
 606 #define ADC_FLAG_AWD3          ((uint16_t)0x0200)  /*!< ADC Analog watchdog 3 flag */
 607 #define ADC_FLAG_JQOVF         ((uint16_t)0x0400)  /*!< ADC Injected Context Queue Overflow flag */
 608
 609 #define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xF800) == 0x0000) && ((FLAG) != 0x0000))
 610 #define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_RDY) || ((FLAG) == ADC_FLAG_EOSMP) || \
 611                                ((FLAG) == ADC_FLAG_EOC) || ((FLAG) == ADC_FLAG_EOS) || \
 612                                ((FLAG) == ADC_FLAG_OVR) || ((FLAG) == ADC_FLAG_JEOC) || \
 613                                ((FLAG) == ADC_FLAG_JEOS) || ((FLAG) == ADC_FLAG_AWD1) || \
 614                                ((FLAG) == ADC_FLAG_AWD2) || ((FLAG) == ADC_FLAG_AWD3) || \
 615                                ((FLAG) == ADC_FLAG_JQOVF))
 616 /**
 617   * @}
 618   */
 619
 620 /** @defgroup ADC_Common_flags_definition
 621   * @{
 622   */
 623
 624 #define ADC_FLAG_MSTRDY           ((uint32_t)0x00000001)  /*!< ADC Master Ready (ADRDY) flag */
 625 #define ADC_FLAG_MSTEOSMP         ((uint32_t)0x00000002)  /*!< ADC Master End of Sampling flag */
 626 #define ADC_FLAG_MSTEOC           ((uint32_t)0x00000004)  /*!< ADC Master End of Regular Conversion flag */
 627 #define ADC_FLAG_MSTEOS           ((uint32_t)0x00000008)  /*!< ADC Master End of Regular sequence of Conversions flag */
 628 #define ADC_FLAG_MSTOVR           ((uint32_t)0x00000010)  /*!< ADC Master overrun flag */
 629 #define ADC_FLAG_MSTJEOC          ((uint32_t)0x00000020)  /*!< ADC Master End of Injected Conversion flag */
 630 #define ADC_FLAG_MSTJEOS          ((uint32_t)0x00000040)  /*!< ADC Master End of Injected sequence of Conversions flag */
 631 #define ADC_FLAG_MSTAWD1          ((uint32_t)0x00000080)  /*!< ADC Master Analog watchdog 1 flag */
 632 #define ADC_FLAG_MSTAWD2          ((uint32_t)0x00000100)  /*!< ADC Master Analog watchdog 2 flag */
 633 #define ADC_FLAG_MSTAWD3          ((uint32_t)0x00000200)  /*!< ADC Master Analog watchdog 3 flag */
 634 #define ADC_FLAG_MSTJQOVF         ((uint32_t)0x00000400)  /*!< ADC Master Injected Context Queue Overflow flag */
 635
 636 #define ADC_FLAG_SLVRDY           ((uint32_t)0x00010000)  /*!< ADC Slave Ready (ADRDY) flag */
 637 #define ADC_FLAG_SLVEOSMP         ((uint32_t)0x00020000)  /*!< ADC Slave End of Sampling flag */
 638 #define ADC_FLAG_SLVEOC           ((uint32_t)0x00040000)  /*!< ADC Slave End of Regular Conversion flag */
 639 #define ADC_FLAG_SLVEOS           ((uint32_t)0x00080000)  /*!< ADC Slave End of Regular sequence of Conversions flag */
 640 #define ADC_FLAG_SLVOVR           ((uint32_t)0x00100000)  /*!< ADC Slave overrun flag */
 641 #define ADC_FLAG_SLVJEOC          ((uint32_t)0x00200000)  /*!< ADC Slave End of Injected Conversion flag */
 642 #define ADC_FLAG_SLVJEOS          ((uint32_t)0x00400000)  /*!< ADC Slave End of Injected sequence of Conversions flag */
 643 #define ADC_FLAG_SLVAWD1          ((uint32_t)0x00800000)  /*!< ADC Slave Analog watchdog 1 flag */
 644 #define ADC_FLAG_SLVAWD2          ((uint32_t)0x01000000)  /*!< ADC Slave Analog watchdog 2 flag */
 645 #define ADC_FLAG_SLVAWD3          ((uint32_t)0x02000000)  /*!< ADC Slave Analog watchdog 3 flag */
 646 #define ADC_FLAG_SLVJQOVF         ((uint32_t)0x04000000)  /*!< ADC Slave Injected Context Queue Overflow flag */
 647
 648 #define IS_ADC_CLEAR_COMMONFLAG(FLAG) ((((FLAG) & (uint32_t)0xF800F800) == 0x0000) && ((FLAG) != 0x00000000))
 649 #define IS_ADC_GET_COMMONFLAG(FLAG) (((FLAG) == ADC_FLAG_MSTRDY) || ((FLAG) == ADC_FLAG_MSTEOSMP) || \
 650                                      ((FLAG) == ADC_FLAG_MSTEOC) || ((FLAG) == ADC_FLAG_MSTEOS) || \
 651                                      ((FLAG) == ADC_FLAG_MSTOVR) || ((FLAG) == ADC_FLAG_MSTEOS) || \
 652                                      ((FLAG) == ADC_FLAG_MSTJEOS) || ((FLAG) == ADC_FLAG_MSTAWD1) || \
 653                                      ((FLAG) == ADC_FLAG_MSTAWD2) || ((FLAG) == ADC_FLAG_MSTAWD3) || \
 654                                      ((FLAG) == ADC_FLAG_MSTJQOVF) || \
 655                                      ((FLAG) == ADC_FLAG_SLVRDY) || ((FLAG) == ADC_FLAG_SLVEOSMP) || \
 656                                      ((FLAG) == ADC_FLAG_SLVEOC) || ((FLAG) == ADC_FLAG_SLVEOS) || \
 657                                      ((FLAG) == ADC_FLAG_SLVOVR) || ((FLAG) == ADC_FLAG_SLVEOS) || \
 658                                      ((FLAG) == ADC_FLAG_SLVJEOS) || ((FLAG) == ADC_FLAG_SLVAWD1) || \
 659                                      ((FLAG) == ADC_FLAG_SLVAWD2) || ((FLAG) == ADC_FLAG_SLVAWD3) || \
 660                                      ((FLAG) == ADC_FLAG_SLVJQOVF))
 661 /**
 662   * @}
 663   */
 664
 665 /** @defgroup ADC_thresholds
 666   * @{
 667   */
 668
 669 #define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF)
 670
 671 /**
 672   * @}
 673   */
 674
 675 /** @defgroup ADC_injected_offset
 676   * @{
 677   */
 678
 679 #define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF)
 680
 681 /**
 682   * @}
 683   */
 684
 685 /** @defgroup ADC_injected_length
 686   * @{
 687   */
 688
 689 #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4))
 690
 691 /**
 692   * @}
 693   */
 694
 695
 696 /** @defgroup ADC_regular_length
 697   * @{
 698   */
 699
 700 #define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10))
 701 /**
 702   * @}
 703   */
 704
 705 /** @defgroup ADC_regular_discontinuous_mode_number
 706   * @{
 707   */
 708
 709 #define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8))
 710
 711 /**
 712   * @}
 713   */
 714
 715 /** @defgroup ADC_two_sampling_delay_number
 716   * @{
 717   */
 718 #define IS_ADC_TWOSAMPLING_DELAY(DELAY) (((DELAY) <= 0xF))
 719
 720 /**
 721   * @}
 722   */
 723 /**
 724   * @}
 725   */
 726
 727
 728 /* Exported macro ------------------------------------------------------------*/
 729 /* Exported functions ------------------------------------------------------- */
 730
 731 /*  Function used to set the ADC configuration to the default reset state *****/
 732 void ADC_DeInit(ADC_TypeDef* ADCx);
 733
 734 /* Initialization and Configuration functions *********************************/
 735 void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct);
 736 void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct);
 737 void ADC_InjectedInit(ADC_TypeDef* ADCx, ADC_InjectedInitTypeDef* ADC_InjectedInitStruct);
 738 void ADC_InjectedStructInit(ADC_InjectedInitTypeDef* ADC_InjectedInitStruct);
 739 void ADC_CommonInit(ADC_TypeDef* ADCx, ADC_CommonInitTypeDef* ADC_CommonInitStruct);
 740 void ADC_CommonStructInit(ADC_CommonInitTypeDef* ADC_CommonInitStruct);
 741
 742 void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
 743 void ADC_StartCalibration(ADC_TypeDef* ADCx);
 744 uint32_t ADC_GetCalibrationValue(ADC_TypeDef* ADCx);
 745 void ADC_SetCalibrationValue(ADC_TypeDef* ADCx, uint32_t ADC_Calibration);
 746 void ADC_SelectCalibrationMode(ADC_TypeDef* ADCx, uint32_t ADC_CalibrationMode);
 747 FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx);
 748 void ADC_DisableCmd(ADC_TypeDef* ADCx);
 749 FlagStatus ADC_GetDisableCmdStatus(ADC_TypeDef* ADCx);
 750 void ADC_VoltageRegulatorCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
 751 void ADC_SelectDifferentialMode(ADC_TypeDef* ADCx, uint8_t ADC_Channel, FunctionalState NewState);
 752 void ADC_SelectQueueOfContextMode(ADC_TypeDef* ADCx, FunctionalState NewState);
 753 void ADC_AutoDelayCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
 754
 755 /* Analog Watchdog configuration functions ************************************/
 756 void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog);
 757 void ADC_AnalogWatchdog1ThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold);
 758 void ADC_AnalogWatchdog2ThresholdsConfig(ADC_TypeDef* ADCx, uint8_t HighThreshold, uint8_t LowThreshold);
 759 void ADC_AnalogWatchdog3ThresholdsConfig(ADC_TypeDef* ADCx, uint8_t HighThreshold, uint8_t LowThreshold);
 760 void ADC_AnalogWatchdog1SingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel);
 761 void ADC_AnalogWatchdog2SingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel);
 762 void ADC_AnalogWatchdog3SingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel);
 763
 764 /* Temperature Sensor, Vrefint and Vbat management function */
 765 void ADC_TempSensorCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
 766 void ADC_VrefintCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
 767 void ADC_VbatCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
 768
 769 /* Channels Configuration functions ***********************************/
 770 void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
 771 void ADC_RegularChannelSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t SequencerLength);
 772 void ADC_ExternalTriggerConfig(ADC_TypeDef* ADCx, uint16_t ADC_ExternalTrigConvEvent, uint16_t ADC_ExternalTrigEventEdge);
 773
 774 void ADC_StartConversion(ADC_TypeDef* ADCx);
 775 FlagStatus ADC_GetStartConversionStatus(ADC_TypeDef* ADCx);
 776 void ADC_StopConversion(ADC_TypeDef* ADCx);
 777 void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number);
 778 void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
 779 uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx);
 780 uint32_t ADC_GetDualModeConversionValue(ADC_TypeDef* ADCx);
 781
 782 void ADC_SetChannelOffset1(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset);
 783 void ADC_SetChannelOffset2(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset);
 784 void ADC_SetChannelOffset3(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset);
 785 void ADC_SetChannelOffset4(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset);
 786
 787 void ADC_ChannelOffset1Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
 788 void ADC_ChannelOffset2Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
 789 void ADC_ChannelOffset3Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
 790 void ADC_ChannelOffset4Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
 791
 792 /* Regular Channels DMA Configuration functions *******************************/
 793 void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState);
 794 void ADC_DMAConfig(ADC_TypeDef* ADCx, uint32_t ADC_DMAMode);
 795
 796 /* Injected channels Configuration functions **********************************/
 797 void ADC_InjectedChannelSampleTimeConfig(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint8_t ADC_SampleTime);
 798 void ADC_StartInjectedConversion(ADC_TypeDef* ADCx);
 799 FlagStatus ADC_GetStartInjectedConversionStatus(ADC_TypeDef* ADCx);
 800 void ADC_StopInjectedConversion(ADC_TypeDef* ADCx);
 801 void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
 802 void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
 803 uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel);
 804
 805 /* ADC Dual Modes Configuration functions *************************************/
 806 FlagStatus ADC_GetCommonFlagStatus(ADC_TypeDef* ADCx, uint32_t ADC_FLAG);
 807 void ADC_ClearCommonFlag(ADC_TypeDef* ADCx, uint32_t ADC_FLAG);
 808
 809 /* Interrupts and flags management functions **********************************/
 810 void ADC_ITConfig(ADC_TypeDef* ADCx, uint32_t ADC_IT, FunctionalState NewState);
 811 FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint32_t ADC_FLAG);
 812 void ADC_ClearFlag(ADC_TypeDef* ADCx, uint32_t ADC_FLAG);
 813 ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint32_t ADC_IT);
 814 void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint32_t ADC_IT);
 815
 816 #ifdef __cplusplus
 817 }
 818 #endif
 819
 820 #endif /*__STM32F30x_ADC_H */
 821
 822 /**
 823   * @}
 824   */
 825
 826 /**
 827   * @}
 828   */
 829
 830 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/