tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3XX/stm32f30x_misc.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f30x_misc.c
   4   * @author  MCD Application Team
   5   * @version V1.1.0
   6   * @date    27-February-2014
   7   * @brief   This file provides all the miscellaneous firmware functions (add-on
   8   *          to CMSIS functions).
   9   *
  10   @verbatim
  11
  12  ===============================================================================
  13               ##### How to configure Interrupts using driver #####
  14  ===============================================================================
  15     [..] This section provide functions allowing to configure the NVIC interrupts
  16          (IRQ). The Cortex-M4 exceptions are managed by CMSIS functions.
  17          (#) Configure the NVIC Priority Grouping using NVIC_PriorityGroupConfig()
  18              function according to the following table.
  19              The table below gives the allowed values of the pre-emption priority
  20              and subpriority according to the Priority Grouping configuration
  21              performed by NVIC_PriorityGroupConfig function.
  22
  23          (#) Enable and Configure the priority of the selected IRQ Channels.
  24     [..]
  25     (@) When the NVIC_PriorityGroup_0 is selected, it will no any nested interrupt,
  26         the IRQ priority will be managed only by subpriority.
  27         The sub-priority is only used to sort pending exception priorities,
  28         and does not affect active exceptions.
  29     (@) Lower priority values gives higher priority.
  30     (@) Priority Order:
  31         (#@) Lowest Preemption priority.
  32         (#@) Lowest Subpriority.
  33         (#@) Lowest hardware priority (IRQn position).
  34
  35   @endverbatim
  36
  37   ******************************************************************************
  38   * @attention
  39   *
  40   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  41   *
  42   * Redistribution and use in source and binary forms, with or without modification,
  43   * are permitted provided that the following conditions are met:
  44   *   1. Redistributions of source code must retain the above copyright notice,
  45   *      this list of conditions and the following disclaimer.
  46   *   2. Redistributions in binary form must reproduce the above copyright notice,
  47   *      this list of conditions and the following disclaimer in the documentation
  48   *      and/or other materials provided with the distribution.
  49   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  50   *      may be used to endorse or promote products derived from this software
  51   *      without specific prior written permission.
  52   *
  53   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  54   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  55   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  56   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  57   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  58   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  59   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  60   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  61   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  62   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  63   *
  64   ******************************************************************************
  65   */
  66
  67 /* Includes ------------------------------------------------------------------*/
  68 #include "stm32f30x_misc.h"
  69
  70 /** @addtogroup STM32F30x_StdPeriph_Driver
  71   * @{
  72   */
  73
  74 /** @defgroup MISC
  75   * @brief MISC driver modules
  76   * @{
  77   */
  78
  79 /* Private typedef -----------------------------------------------------------*/
  80 /* Private define ------------------------------------------------------------*/
  81 #define AIRCR_VECTKEY_MASK    ((uint32_t)0x05FA0000)
  82
  83 /* Private macro -------------------------------------------------------------*/
  84 /* Private variables ---------------------------------------------------------*/
  85 /* Private function prototypes -----------------------------------------------*/
  86 /* Private functions ---------------------------------------------------------*/
  87
  88 /** @defgroup MISC_Private_Functions
  89   * @{
  90   */
  91
  92 /**
  93   * @brief  Configures the priority grouping: pre-emption priority and subpriority.
  94   * @param  NVIC_PriorityGroup: specifies the priority grouping bits length.
  95   *   This parameter can be one of the following values:
  96   *     @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority.
  97   *                                4 bits for subpriority.
  98   *     @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority.
  99   *                                3 bits for subpriority.
 100   *     @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority.
 101   *                                2 bits for subpriority.
 102   *     @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority.
 103   *                                1 bits for subpriority.
 104   *     @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority.
 105   *                                0 bits for subpriority.
 106   *     @note When NVIC_PriorityGroup_0 is selected, it will no be any nested
 107   *           interrupt. This interrupts priority is managed only with subpriority.
 108   * @retval None
 109   */
 110 void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup)
 111 {
 112   /* Check the parameters */
 113   assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup));
 114
 115   /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
 116   SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup;
 117 }
 118
 119 /**
 120   * @brief  Initializes the NVIC peripheral according to the specified
 121   *         parameters in the NVIC_InitStruct.
 122   * @note   To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
 123   *         function should be called before.
 124   * @param  NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains
 125   *         the configuration information for the specified NVIC peripheral.
 126   * @retval None
 127   */
 128 void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
 129 {
 130   uint32_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F;
 131
 132   /* Check the parameters */
 133   assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
 134   assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority));
 135   assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority));
 136
 137   if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
 138   {
 139     /* Compute the Corresponding IRQ Priority --------------------------------*/
 140     tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08;
 141     tmppre = (0x4 - tmppriority);
 142     tmpsub = tmpsub >> tmppriority;
 143
 144     tmppriority = (uint32_t)NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre;
 145     tmppriority |=  NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub;
 146     tmppriority = tmppriority << 0x04;
 147
 148     NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority;
 149
 150     /* Enable the Selected IRQ Channels --------------------------------------*/
 151     NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
 152       (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
 153   }
 154   else
 155   {
 156     /* Disable the Selected IRQ Channels -------------------------------------*/
 157     NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
 158       (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
 159   }
 160 }
 161
 162 /**
 163   * @brief  Sets the vector table location and Offset.
 164   * @param  NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory.
 165   *   This parameter can be one of the following values:
 166   *     @arg NVIC_VectTab_RAM
 167   *     @arg NVIC_VectTab_FLASH
 168   * @param  Offset: Vector Table base offset field. This value must be a multiple of 0x200.
 169   * @retval None
 170   */
 171 void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset)
 172 {
 173   /* Check the parameters */
 174   assert_param(IS_NVIC_VECTTAB(NVIC_VectTab));
 175   assert_param(IS_NVIC_OFFSET(Offset));
 176
 177   SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80);
 178 }
 179
 180 /**
 181   * @brief  Selects the condition for the system to enter low power mode.
 182   * @param  LowPowerMode: Specifies the new mode for the system to enter low power mode.
 183   *   This parameter can be one of the following values:
 184   *     @arg NVIC_LP_SEVONPEND
 185   *     @arg NVIC_LP_SLEEPDEEP
 186   *     @arg NVIC_LP_SLEEPONEXIT
 187   * @param  NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE.
 188   * @retval None
 189   */
 190 void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
 191 {
 192   /* Check the parameters */
 193   assert_param(IS_NVIC_LP(LowPowerMode));
 194   assert_param(IS_FUNCTIONAL_STATE(NewState));
 195
 196   if (NewState != DISABLE)
 197   {
 198     SCB->SCR |= LowPowerMode;
 199   }
 200   else
 201   {
 202     SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode);
 203   }
 204 }
 205
 206 /**
 207   * @brief  Configures the SysTick clock source.
 208   * @param  SysTick_CLKSource: specifies the SysTick clock source.
 209   *   This parameter can be one of the following values:
 210   *     @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source.
 211   *     @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source.
 212   * @retval None
 213   */
 214 void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)
 215 {
 216   /* Check the parameters */
 217   assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource));
 218   if (SysTick_CLKSource == SysTick_CLKSource_HCLK)
 219   {
 220     SysTick->CTRL |= SysTick_CLKSource_HCLK;
 221   }
 222   else
 223   {
 224     SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8;
 225   }
 226 }
 227
 228 /**
 229   * @}
 230   */
 231
 232 /**
 233   * @}
 234   */
 235
 236 /**
 237   * @}
 238   */
 239
 240 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/