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[tmk_keyboard.git] / tool / mbed / mbed-sdk / libraries / mbed / targets / cmsis / TARGET_STM / TARGET_STM32F4 / TARGET_MTS_MDOT_F405RG / TOOLCHAIN_ARM_MICRO / startup_stm32f405xx.s
1 ;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
2 ;* File Name : startup_stm32f405xx.s
3 ;* Author : MCD Application Team
4 ;* Version : V2.1.0
5 ;* Date : 19-June-2014
6 ;* Description : STM32F405xx devices vector table for MDK-ARM_MICRO toolchain.
7 ;* This module performs:
8 ;* - Set the initial SP
9 ;* - Set the initial PC == Reset_Handler
10 ;* - Set the vector table entries with the exceptions ISR address
11 ;* - Branches to __main in the C library (which eventually
12 ;* calls main()).
13 ;* After Reset the CortexM4 processor is in Thread mode,
14 ;* priority is Privileged, and the Stack is set to Main.
15 ;* <<< Use Configuration Wizard in Context Menu >>>
16 ;*******************************************************************************
17 ;
18 ;* Redistribution and use in source and binary forms, with or without modification,
19 ;* are permitted provided that the following conditions are met:
20 ;* 1. Redistributions of source code must retain the above copyright notice,
21 ;* this list of conditions and the following disclaimer.
22 ;* 2. Redistributions in binary form must reproduce the above copyright notice,
23 ;* this list of conditions and the following disclaimer in the documentation
24 ;* and/or other materials provided with the distribution.
25 ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
26 ;* may be used to endorse or promote products derived from this software
27 ;* without specific prior written permission.
28 ;*
29 ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
30 ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31 ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
32 ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
33 ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
35 ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36 ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
37 ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 ;
40 ;*******************************************************************************
41
42 ; Amount of memory (in bytes) allocated for Stack
43 ; Tailor this value to your application needs
44 ; <h> Stack Configuration
45 ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
46 ; </h>
47
48 Stack_Size EQU 0x00000400
49
50 AREA STACK, NOINIT, READWRITE, ALIGN=3
51 EXPORT __initial_sp
52
53 Stack_Mem SPACE Stack_Size
54 __initial_sp EQU 0x20020000 ; Top of RAM
55
56
57 ; <h> Heap Configuration
58 ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
59 ; </h>
60
61 Heap_Size EQU 0x00000400
62
63 AREA HEAP, NOINIT, READWRITE, ALIGN=3
64 EXPORT __heap_base
65 EXPORT __heap_limit
66
67 __heap_base
68 Heap_Mem SPACE Heap_Size
69 __heap_limit EQU (__initial_sp - Stack_Size)
70
71 PRESERVE8
72 THUMB
73
74
75 ; Vector Table Mapped to Address 0 at Reset
76 AREA RESET, DATA, READONLY
77 EXPORT __Vectors
78 EXPORT __Vectors_End
79 EXPORT __Vectors_Size
80
81 __Vectors DCD __initial_sp ; Top of Stack
82 DCD Reset_Handler ; Reset Handler
83 DCD NMI_Handler ; NMI Handler
84 DCD HardFault_Handler ; Hard Fault Handler
85 DCD MemManage_Handler ; MPU Fault Handler
86 DCD BusFault_Handler ; Bus Fault Handler
87 DCD UsageFault_Handler ; Usage Fault Handler
88 DCD 0 ; Reserved
89 DCD 0 ; Reserved
90 DCD 0 ; Reserved
91 DCD 0 ; Reserved
92 DCD SVC_Handler ; SVCall Handler
93 DCD DebugMon_Handler ; Debug Monitor Handler
94 DCD 0 ; Reserved
95 DCD PendSV_Handler ; PendSV Handler
96 DCD SysTick_Handler ; SysTick Handler
97
98 ; External Interrupts
99 DCD WWDG_IRQHandler ; Window WatchDog
100 DCD PVD_IRQHandler ; PVD through EXTI Line detection
101 DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
102 DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
103 DCD FLASH_IRQHandler ; FLASH
104 DCD RCC_IRQHandler ; RCC
105 DCD EXTI0_IRQHandler ; EXTI Line0
106 DCD EXTI1_IRQHandler ; EXTI Line1
107 DCD EXTI2_IRQHandler ; EXTI Line2
108 DCD EXTI3_IRQHandler ; EXTI Line3
109 DCD EXTI4_IRQHandler ; EXTI Line4
110 DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
111 DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
112 DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
113 DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
114 DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
115 DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
116 DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
117 DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
118 DCD CAN1_TX_IRQHandler ; CAN1 TX
119 DCD CAN1_RX0_IRQHandler ; CAN1 RX0
120 DCD CAN1_RX1_IRQHandler ; CAN1 RX1
121 DCD CAN1_SCE_IRQHandler ; CAN1 SCE
122 DCD EXTI9_5_IRQHandler ; External Line[9:5]s
123 DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
124 DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
125 DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
126 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
127 DCD TIM2_IRQHandler ; TIM2
128 DCD TIM3_IRQHandler ; TIM3
129 DCD TIM4_IRQHandler ; TIM4
130 DCD I2C1_EV_IRQHandler ; I2C1 Event
131 DCD I2C1_ER_IRQHandler ; I2C1 Error
132 DCD I2C2_EV_IRQHandler ; I2C2 Event
133 DCD I2C2_ER_IRQHandler ; I2C2 Error
134 DCD SPI1_IRQHandler ; SPI1
135 DCD SPI2_IRQHandler ; SPI2
136 DCD USART1_IRQHandler ; USART1
137 DCD USART2_IRQHandler ; USART2
138 DCD USART3_IRQHandler ; USART3
139 DCD EXTI15_10_IRQHandler ; External Line[15:10]s
140 DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
141 DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
142 DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12
143 DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13
144 DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14
145 DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
146 DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
147 DCD FMC_IRQHandler ; FMC
148 DCD SDIO_IRQHandler ; SDIO
149 DCD TIM5_IRQHandler ; TIM5
150 DCD SPI3_IRQHandler ; SPI3
151 DCD UART4_IRQHandler ; UART4
152 DCD UART5_IRQHandler ; UART5
153 DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
154 DCD TIM7_IRQHandler ; TIM7
155 DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
156 DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
157 DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
158 DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
159 DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
160 DCD 0 ; Reserved
161 DCD 0 ; Reserved
162 DCD CAN2_TX_IRQHandler ; CAN2 TX
163 DCD CAN2_RX0_IRQHandler ; CAN2 RX0
164 DCD CAN2_RX1_IRQHandler ; CAN2 RX1
165 DCD CAN2_SCE_IRQHandler ; CAN2 SCE
166 DCD OTG_FS_IRQHandler ; USB OTG FS
167 DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
168 DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
169 DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
170 DCD USART6_IRQHandler ; USART6
171 DCD I2C3_EV_IRQHandler ; I2C3 event
172 DCD I2C3_ER_IRQHandler ; I2C3 error
173 DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
174 DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
175 DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
176 DCD OTG_HS_IRQHandler ; USB OTG HS
177 DCD 0 ; Reserved
178 DCD 0 ; Reserved
179 DCD HASH_RNG_IRQHandler ; Hash and Rng
180 DCD FPU_IRQHandler ; FPU
181
182
183 __Vectors_End
184
185 __Vectors_Size EQU __Vectors_End - __Vectors
186
187 AREA |.text|, CODE, READONLY
188
189 ; Reset handler
190 Reset_Handler PROC
191 EXPORT Reset_Handler [WEAK]
192 IMPORT SystemInit
193 IMPORT __main
194
195 LDR R0, =SystemInit
196 BLX R0
197 LDR R0, =__main
198 BX R0
199 ENDP
200
201 ; Dummy Exception Handlers (infinite loops which can be modified)
202
203 NMI_Handler PROC
204 EXPORT NMI_Handler [WEAK]
205 B .
206 ENDP
207 HardFault_Handler\
208 PROC
209 EXPORT HardFault_Handler [WEAK]
210 B .
211 ENDP
212 MemManage_Handler\
213 PROC
214 EXPORT MemManage_Handler [WEAK]
215 B .
216 ENDP
217 BusFault_Handler\
218 PROC
219 EXPORT BusFault_Handler [WEAK]
220 B .
221 ENDP
222 UsageFault_Handler\
223 PROC
224 EXPORT UsageFault_Handler [WEAK]
225 B .
226 ENDP
227 SVC_Handler PROC
228 EXPORT SVC_Handler [WEAK]
229 B .
230 ENDP
231 DebugMon_Handler\
232 PROC
233 EXPORT DebugMon_Handler [WEAK]
234 B .
235 ENDP
236 PendSV_Handler PROC
237 EXPORT PendSV_Handler [WEAK]
238 B .
239 ENDP
240 SysTick_Handler PROC
241 EXPORT SysTick_Handler [WEAK]
242 B .
243 ENDP
244
245 Default_Handler PROC
246
247 EXPORT WWDG_IRQHandler [WEAK]
248 EXPORT PVD_IRQHandler [WEAK]
249 EXPORT TAMP_STAMP_IRQHandler [WEAK]
250 EXPORT RTC_WKUP_IRQHandler [WEAK]
251 EXPORT FLASH_IRQHandler [WEAK]
252 EXPORT RCC_IRQHandler [WEAK]
253 EXPORT EXTI0_IRQHandler [WEAK]
254 EXPORT EXTI1_IRQHandler [WEAK]
255 EXPORT EXTI2_IRQHandler [WEAK]
256 EXPORT EXTI3_IRQHandler [WEAK]
257 EXPORT EXTI4_IRQHandler [WEAK]
258 EXPORT DMA1_Stream0_IRQHandler [WEAK]
259 EXPORT DMA1_Stream1_IRQHandler [WEAK]
260 EXPORT DMA1_Stream2_IRQHandler [WEAK]
261 EXPORT DMA1_Stream3_IRQHandler [WEAK]
262 EXPORT DMA1_Stream4_IRQHandler [WEAK]
263 EXPORT DMA1_Stream5_IRQHandler [WEAK]
264 EXPORT DMA1_Stream6_IRQHandler [WEAK]
265 EXPORT ADC_IRQHandler [WEAK]
266 EXPORT CAN1_TX_IRQHandler [WEAK]
267 EXPORT CAN1_RX0_IRQHandler [WEAK]
268 EXPORT CAN1_RX1_IRQHandler [WEAK]
269 EXPORT CAN1_SCE_IRQHandler [WEAK]
270 EXPORT EXTI9_5_IRQHandler [WEAK]
271 EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
272 EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
273 EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
274 EXPORT TIM1_CC_IRQHandler [WEAK]
275 EXPORT TIM2_IRQHandler [WEAK]
276 EXPORT TIM3_IRQHandler [WEAK]
277 EXPORT TIM4_IRQHandler [WEAK]
278 EXPORT I2C1_EV_IRQHandler [WEAK]
279 EXPORT I2C1_ER_IRQHandler [WEAK]
280 EXPORT I2C2_EV_IRQHandler [WEAK]
281 EXPORT I2C2_ER_IRQHandler [WEAK]
282 EXPORT SPI1_IRQHandler [WEAK]
283 EXPORT SPI2_IRQHandler [WEAK]
284 EXPORT USART1_IRQHandler [WEAK]
285 EXPORT USART2_IRQHandler [WEAK]
286 EXPORT USART3_IRQHandler [WEAK]
287 EXPORT EXTI15_10_IRQHandler [WEAK]
288 EXPORT RTC_Alarm_IRQHandler [WEAK]
289 EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
290 EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK]
291 EXPORT TIM8_UP_TIM13_IRQHandler [WEAK]
292 EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK]
293 EXPORT TIM8_CC_IRQHandler [WEAK]
294 EXPORT DMA1_Stream7_IRQHandler [WEAK]
295 EXPORT FMC_IRQHandler [WEAK]
296 EXPORT SDIO_IRQHandler [WEAK]
297 EXPORT TIM5_IRQHandler [WEAK]
298 EXPORT SPI3_IRQHandler [WEAK]
299 EXPORT UART4_IRQHandler [WEAK]
300 EXPORT UART5_IRQHandler [WEAK]
301 EXPORT TIM6_DAC_IRQHandler [WEAK]
302 EXPORT TIM7_IRQHandler [WEAK]
303 EXPORT DMA2_Stream0_IRQHandler [WEAK]
304 EXPORT DMA2_Stream1_IRQHandler [WEAK]
305 EXPORT DMA2_Stream2_IRQHandler [WEAK]
306 EXPORT DMA2_Stream3_IRQHandler [WEAK]
307 EXPORT DMA2_Stream4_IRQHandler [WEAK]
308 EXPORT CAN2_TX_IRQHandler [WEAK]
309 EXPORT CAN2_RX0_IRQHandler [WEAK]
310 EXPORT CAN2_RX1_IRQHandler [WEAK]
311 EXPORT CAN2_SCE_IRQHandler [WEAK]
312 EXPORT OTG_FS_IRQHandler [WEAK]
313 EXPORT DMA2_Stream5_IRQHandler [WEAK]
314 EXPORT DMA2_Stream6_IRQHandler [WEAK]
315 EXPORT DMA2_Stream7_IRQHandler [WEAK]
316 EXPORT USART6_IRQHandler [WEAK]
317 EXPORT I2C3_EV_IRQHandler [WEAK]
318 EXPORT I2C3_ER_IRQHandler [WEAK]
319 EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK]
320 EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK]
321 EXPORT OTG_HS_WKUP_IRQHandler [WEAK]
322 EXPORT OTG_HS_IRQHandler [WEAK]
323 EXPORT HASH_RNG_IRQHandler [WEAK]
324 EXPORT FPU_IRQHandler [WEAK]
325
326 WWDG_IRQHandler
327 PVD_IRQHandler
328 TAMP_STAMP_IRQHandler
329 RTC_WKUP_IRQHandler
330 FLASH_IRQHandler
331 RCC_IRQHandler
332 EXTI0_IRQHandler
333 EXTI1_IRQHandler
334 EXTI2_IRQHandler
335 EXTI3_IRQHandler
336 EXTI4_IRQHandler
337 DMA1_Stream0_IRQHandler
338 DMA1_Stream1_IRQHandler
339 DMA1_Stream2_IRQHandler
340 DMA1_Stream3_IRQHandler
341 DMA1_Stream4_IRQHandler
342 DMA1_Stream5_IRQHandler
343 DMA1_Stream6_IRQHandler
344 ADC_IRQHandler
345 CAN1_TX_IRQHandler
346 CAN1_RX0_IRQHandler
347 CAN1_RX1_IRQHandler
348 CAN1_SCE_IRQHandler
349 EXTI9_5_IRQHandler
350 TIM1_BRK_TIM9_IRQHandler
351 TIM1_UP_TIM10_IRQHandler
352 TIM1_TRG_COM_TIM11_IRQHandler
353 TIM1_CC_IRQHandler
354 TIM2_IRQHandler
355 TIM3_IRQHandler
356 TIM4_IRQHandler
357 I2C1_EV_IRQHandler
358 I2C1_ER_IRQHandler
359 I2C2_EV_IRQHandler
360 I2C2_ER_IRQHandler
361 SPI1_IRQHandler
362 SPI2_IRQHandler
363 USART1_IRQHandler
364 USART2_IRQHandler
365 USART3_IRQHandler
366 EXTI15_10_IRQHandler
367 RTC_Alarm_IRQHandler
368 OTG_FS_WKUP_IRQHandler
369 TIM8_BRK_TIM12_IRQHandler
370 TIM8_UP_TIM13_IRQHandler
371 TIM8_TRG_COM_TIM14_IRQHandler
372 TIM8_CC_IRQHandler
373 DMA1_Stream7_IRQHandler
374 FMC_IRQHandler
375 SDIO_IRQHandler
376 TIM5_IRQHandler
377 SPI3_IRQHandler
378 UART4_IRQHandler
379 UART5_IRQHandler
380 TIM6_DAC_IRQHandler
381 TIM7_IRQHandler
382 DMA2_Stream0_IRQHandler
383 DMA2_Stream1_IRQHandler
384 DMA2_Stream2_IRQHandler
385 DMA2_Stream3_IRQHandler
386 DMA2_Stream4_IRQHandler
387 CAN2_TX_IRQHandler
388 CAN2_RX0_IRQHandler
389 CAN2_RX1_IRQHandler
390 CAN2_SCE_IRQHandler
391 OTG_FS_IRQHandler
392 DMA2_Stream5_IRQHandler
393 DMA2_Stream6_IRQHandler
394 DMA2_Stream7_IRQHandler
395 USART6_IRQHandler
396 I2C3_EV_IRQHandler
397 I2C3_ER_IRQHandler
398 OTG_HS_EP1_OUT_IRQHandler
399 OTG_HS_EP1_IN_IRQHandler
400 OTG_HS_WKUP_IRQHandler
401 OTG_HS_IRQHandler
402 HASH_RNG_IRQHandler
403 FPU_IRQHandler
404
405 B .
406
407 ENDP
408
409 ALIGN
410
411 END
412
413 ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
custom keymap for my minivan; forked from http://github.com/evangs/tmk_keyboard
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