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[tmk_keyboard.git] / tool / mbed / mbed-sdk / libraries / mbed / targets / cmsis / TARGET_STM / TARGET_STM32F4 / TARGET_MTS_MDOT_F405RG / TOOLCHAIN_ARM_STD / startup_stm32f405xx.s
1 ;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
2 ;* File Name : startup_stm32f405xx.s
3 ;* Author : MCD Application Team
4 ;* Version : V2.1.0
5 ;* Date : 19-June-2014
6 ;* Description : STM32F405xx devices vector table for MDK-ARM_STD toolchain.
7 ;* This module performs:
8 ;* - Set the initial SP
9 ;* - Set the initial PC == Reset_Handler
10 ;* - Set the vector table entries with the exceptions ISR address
11 ;* - Branches to __main in the C library (which eventually
12 ;* calls main()).
13 ;* After Reset the CortexM4 processor is in Thread mode,
14 ;* priority is Privileged, and the Stack is set to Main.
15 ;* <<< Use Configuration Wizard in Context Menu >>>
16 ;*******************************************************************************
17 ;
18 ;* Redistribution and use in source and binary forms, with or without modification,
19 ;* are permitted provided that the following conditions are met:
20 ;* 1. Redistributions of source code must retain the above copyright notice,
21 ;* this list of conditions and the following disclaimer.
22 ;* 2. Redistributions in binary form must reproduce the above copyright notice,
23 ;* this list of conditions and the following disclaimer in the documentation
24 ;* and/or other materials provided with the distribution.
25 ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
26 ;* may be used to endorse or promote products derived from this software
27 ;* without specific prior written permission.
28 ;*
29 ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
30 ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31 ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
32 ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
33 ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
35 ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36 ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
37 ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 ;
40 ;*******************************************************************************
41
42
43 __initial_sp EQU 0x20020000 ; Top of RAM
44
45 PRESERVE8
46 THUMB
47
48
49 ; Vector Table Mapped to Address 0 at Reset
50 AREA RESET, DATA, READONLY
51 EXPORT __Vectors
52 EXPORT __Vectors_End
53 EXPORT __Vectors_Size
54
55 __Vectors DCD __initial_sp ; Top of Stack
56 DCD Reset_Handler ; Reset Handler
57 DCD NMI_Handler ; NMI Handler
58 DCD HardFault_Handler ; Hard Fault Handler
59 DCD MemManage_Handler ; MPU Fault Handler
60 DCD BusFault_Handler ; Bus Fault Handler
61 DCD UsageFault_Handler ; Usage Fault Handler
62 DCD 0 ; Reserved
63 DCD 0 ; Reserved
64 DCD 0 ; Reserved
65 DCD 0 ; Reserved
66 DCD SVC_Handler ; SVCall Handler
67 DCD DebugMon_Handler ; Debug Monitor Handler
68 DCD 0 ; Reserved
69 DCD PendSV_Handler ; PendSV Handler
70 DCD SysTick_Handler ; SysTick Handler
71
72 ; External Interrupts
73 DCD WWDG_IRQHandler ; Window WatchDog
74 DCD PVD_IRQHandler ; PVD through EXTI Line detection
75 DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
76 DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
77 DCD FLASH_IRQHandler ; FLASH
78 DCD RCC_IRQHandler ; RCC
79 DCD EXTI0_IRQHandler ; EXTI Line0
80 DCD EXTI1_IRQHandler ; EXTI Line1
81 DCD EXTI2_IRQHandler ; EXTI Line2
82 DCD EXTI3_IRQHandler ; EXTI Line3
83 DCD EXTI4_IRQHandler ; EXTI Line4
84 DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
85 DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
86 DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
87 DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
88 DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
89 DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
90 DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
91 DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
92 DCD CAN1_TX_IRQHandler ; CAN1 TX
93 DCD CAN1_RX0_IRQHandler ; CAN1 RX0
94 DCD CAN1_RX1_IRQHandler ; CAN1 RX1
95 DCD CAN1_SCE_IRQHandler ; CAN1 SCE
96 DCD EXTI9_5_IRQHandler ; External Line[9:5]s
97 DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
98 DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
99 DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
100 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
101 DCD TIM2_IRQHandler ; TIM2
102 DCD TIM3_IRQHandler ; TIM3
103 DCD TIM4_IRQHandler ; TIM4
104 DCD I2C1_EV_IRQHandler ; I2C1 Event
105 DCD I2C1_ER_IRQHandler ; I2C1 Error
106 DCD I2C2_EV_IRQHandler ; I2C2 Event
107 DCD I2C2_ER_IRQHandler ; I2C2 Error
108 DCD SPI1_IRQHandler ; SPI1
109 DCD SPI2_IRQHandler ; SPI2
110 DCD USART1_IRQHandler ; USART1
111 DCD USART2_IRQHandler ; USART2
112 DCD USART3_IRQHandler ; USART3
113 DCD EXTI15_10_IRQHandler ; External Line[15:10]s
114 DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
115 DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
116 DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12
117 DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13
118 DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14
119 DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
120 DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
121 DCD FMC_IRQHandler ; FMC
122 DCD SDIO_IRQHandler ; SDIO
123 DCD TIM5_IRQHandler ; TIM5
124 DCD SPI3_IRQHandler ; SPI3
125 DCD UART4_IRQHandler ; UART4
126 DCD UART5_IRQHandler ; UART5
127 DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
128 DCD TIM7_IRQHandler ; TIM7
129 DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
130 DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
131 DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
132 DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
133 DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
134 DCD 0 ; Reserved
135 DCD 0 ; Reserved
136 DCD CAN2_TX_IRQHandler ; CAN2 TX
137 DCD CAN2_RX0_IRQHandler ; CAN2 RX0
138 DCD CAN2_RX1_IRQHandler ; CAN2 RX1
139 DCD CAN2_SCE_IRQHandler ; CAN2 SCE
140 DCD OTG_FS_IRQHandler ; USB OTG FS
141 DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
142 DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
143 DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
144 DCD USART6_IRQHandler ; USART6
145 DCD I2C3_EV_IRQHandler ; I2C3 event
146 DCD I2C3_ER_IRQHandler ; I2C3 error
147 DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
148 DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
149 DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
150 DCD OTG_HS_IRQHandler ; USB OTG HS
151 DCD 0 ; Reserved
152 DCD 0 ; Reserved
153 DCD HASH_RNG_IRQHandler ; Hash and Rng
154 DCD FPU_IRQHandler ; FPU
155
156
157 __Vectors_End
158
159 __Vectors_Size EQU __Vectors_End - __Vectors
160
161 AREA |.text|, CODE, READONLY
162
163 ; Reset handler
164 Reset_Handler PROC
165 EXPORT Reset_Handler [WEAK]
166 IMPORT SystemInit
167 IMPORT __main
168
169 LDR R0, =SystemInit
170 BLX R0
171 LDR R0, =__main
172 BX R0
173 ENDP
174
175 ; Dummy Exception Handlers (infinite loops which can be modified)
176
177 NMI_Handler PROC
178 EXPORT NMI_Handler [WEAK]
179 B .
180 ENDP
181 HardFault_Handler\
182 PROC
183 EXPORT HardFault_Handler [WEAK]
184 B .
185 ENDP
186 MemManage_Handler\
187 PROC
188 EXPORT MemManage_Handler [WEAK]
189 B .
190 ENDP
191 BusFault_Handler\
192 PROC
193 EXPORT BusFault_Handler [WEAK]
194 B .
195 ENDP
196 UsageFault_Handler\
197 PROC
198 EXPORT UsageFault_Handler [WEAK]
199 B .
200 ENDP
201 SVC_Handler PROC
202 EXPORT SVC_Handler [WEAK]
203 B .
204 ENDP
205 DebugMon_Handler\
206 PROC
207 EXPORT DebugMon_Handler [WEAK]
208 B .
209 ENDP
210 PendSV_Handler PROC
211 EXPORT PendSV_Handler [WEAK]
212 B .
213 ENDP
214 SysTick_Handler PROC
215 EXPORT SysTick_Handler [WEAK]
216 B .
217 ENDP
218
219 Default_Handler PROC
220
221 EXPORT WWDG_IRQHandler [WEAK]
222 EXPORT PVD_IRQHandler [WEAK]
223 EXPORT TAMP_STAMP_IRQHandler [WEAK]
224 EXPORT RTC_WKUP_IRQHandler [WEAK]
225 EXPORT FLASH_IRQHandler [WEAK]
226 EXPORT RCC_IRQHandler [WEAK]
227 EXPORT EXTI0_IRQHandler [WEAK]
228 EXPORT EXTI1_IRQHandler [WEAK]
229 EXPORT EXTI2_IRQHandler [WEAK]
230 EXPORT EXTI3_IRQHandler [WEAK]
231 EXPORT EXTI4_IRQHandler [WEAK]
232 EXPORT DMA1_Stream0_IRQHandler [WEAK]
233 EXPORT DMA1_Stream1_IRQHandler [WEAK]
234 EXPORT DMA1_Stream2_IRQHandler [WEAK]
235 EXPORT DMA1_Stream3_IRQHandler [WEAK]
236 EXPORT DMA1_Stream4_IRQHandler [WEAK]
237 EXPORT DMA1_Stream5_IRQHandler [WEAK]
238 EXPORT DMA1_Stream6_IRQHandler [WEAK]
239 EXPORT ADC_IRQHandler [WEAK]
240 EXPORT CAN1_TX_IRQHandler [WEAK]
241 EXPORT CAN1_RX0_IRQHandler [WEAK]
242 EXPORT CAN1_RX1_IRQHandler [WEAK]
243 EXPORT CAN1_SCE_IRQHandler [WEAK]
244 EXPORT EXTI9_5_IRQHandler [WEAK]
245 EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
246 EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
247 EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
248 EXPORT TIM1_CC_IRQHandler [WEAK]
249 EXPORT TIM2_IRQHandler [WEAK]
250 EXPORT TIM3_IRQHandler [WEAK]
251 EXPORT TIM4_IRQHandler [WEAK]
252 EXPORT I2C1_EV_IRQHandler [WEAK]
253 EXPORT I2C1_ER_IRQHandler [WEAK]
254 EXPORT I2C2_EV_IRQHandler [WEAK]
255 EXPORT I2C2_ER_IRQHandler [WEAK]
256 EXPORT SPI1_IRQHandler [WEAK]
257 EXPORT SPI2_IRQHandler [WEAK]
258 EXPORT USART1_IRQHandler [WEAK]
259 EXPORT USART2_IRQHandler [WEAK]
260 EXPORT USART3_IRQHandler [WEAK]
261 EXPORT EXTI15_10_IRQHandler [WEAK]
262 EXPORT RTC_Alarm_IRQHandler [WEAK]
263 EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
264 EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK]
265 EXPORT TIM8_UP_TIM13_IRQHandler [WEAK]
266 EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK]
267 EXPORT TIM8_CC_IRQHandler [WEAK]
268 EXPORT DMA1_Stream7_IRQHandler [WEAK]
269 EXPORT FMC_IRQHandler [WEAK]
270 EXPORT SDIO_IRQHandler [WEAK]
271 EXPORT TIM5_IRQHandler [WEAK]
272 EXPORT SPI3_IRQHandler [WEAK]
273 EXPORT UART4_IRQHandler [WEAK]
274 EXPORT UART5_IRQHandler [WEAK]
275 EXPORT TIM6_DAC_IRQHandler [WEAK]
276 EXPORT TIM7_IRQHandler [WEAK]
277 EXPORT DMA2_Stream0_IRQHandler [WEAK]
278 EXPORT DMA2_Stream1_IRQHandler [WEAK]
279 EXPORT DMA2_Stream2_IRQHandler [WEAK]
280 EXPORT DMA2_Stream3_IRQHandler [WEAK]
281 EXPORT DMA2_Stream4_IRQHandler [WEAK]
282 EXPORT CAN2_TX_IRQHandler [WEAK]
283 EXPORT CAN2_RX0_IRQHandler [WEAK]
284 EXPORT CAN2_RX1_IRQHandler [WEAK]
285 EXPORT CAN2_SCE_IRQHandler [WEAK]
286 EXPORT OTG_FS_IRQHandler [WEAK]
287 EXPORT DMA2_Stream5_IRQHandler [WEAK]
288 EXPORT DMA2_Stream6_IRQHandler [WEAK]
289 EXPORT DMA2_Stream7_IRQHandler [WEAK]
290 EXPORT USART6_IRQHandler [WEAK]
291 EXPORT I2C3_EV_IRQHandler [WEAK]
292 EXPORT I2C3_ER_IRQHandler [WEAK]
293 EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK]
294 EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK]
295 EXPORT OTG_HS_WKUP_IRQHandler [WEAK]
296 EXPORT OTG_HS_IRQHandler [WEAK]
297 EXPORT HASH_RNG_IRQHandler [WEAK]
298 EXPORT FPU_IRQHandler [WEAK]
299
300 WWDG_IRQHandler
301 PVD_IRQHandler
302 TAMP_STAMP_IRQHandler
303 RTC_WKUP_IRQHandler
304 FLASH_IRQHandler
305 RCC_IRQHandler
306 EXTI0_IRQHandler
307 EXTI1_IRQHandler
308 EXTI2_IRQHandler
309 EXTI3_IRQHandler
310 EXTI4_IRQHandler
311 DMA1_Stream0_IRQHandler
312 DMA1_Stream1_IRQHandler
313 DMA1_Stream2_IRQHandler
314 DMA1_Stream3_IRQHandler
315 DMA1_Stream4_IRQHandler
316 DMA1_Stream5_IRQHandler
317 DMA1_Stream6_IRQHandler
318 ADC_IRQHandler
319 CAN1_TX_IRQHandler
320 CAN1_RX0_IRQHandler
321 CAN1_RX1_IRQHandler
322 CAN1_SCE_IRQHandler
323 EXTI9_5_IRQHandler
324 TIM1_BRK_TIM9_IRQHandler
325 TIM1_UP_TIM10_IRQHandler
326 TIM1_TRG_COM_TIM11_IRQHandler
327 TIM1_CC_IRQHandler
328 TIM2_IRQHandler
329 TIM3_IRQHandler
330 TIM4_IRQHandler
331 I2C1_EV_IRQHandler
332 I2C1_ER_IRQHandler
333 I2C2_EV_IRQHandler
334 I2C2_ER_IRQHandler
335 SPI1_IRQHandler
336 SPI2_IRQHandler
337 USART1_IRQHandler
338 USART2_IRQHandler
339 USART3_IRQHandler
340 EXTI15_10_IRQHandler
341 RTC_Alarm_IRQHandler
342 OTG_FS_WKUP_IRQHandler
343 TIM8_BRK_TIM12_IRQHandler
344 TIM8_UP_TIM13_IRQHandler
345 TIM8_TRG_COM_TIM14_IRQHandler
346 TIM8_CC_IRQHandler
347 DMA1_Stream7_IRQHandler
348 FMC_IRQHandler
349 SDIO_IRQHandler
350 TIM5_IRQHandler
351 SPI3_IRQHandler
352 UART4_IRQHandler
353 UART5_IRQHandler
354 TIM6_DAC_IRQHandler
355 TIM7_IRQHandler
356 DMA2_Stream0_IRQHandler
357 DMA2_Stream1_IRQHandler
358 DMA2_Stream2_IRQHandler
359 DMA2_Stream3_IRQHandler
360 DMA2_Stream4_IRQHandler
361 CAN2_TX_IRQHandler
362 CAN2_RX0_IRQHandler
363 CAN2_RX1_IRQHandler
364 CAN2_SCE_IRQHandler
365 OTG_FS_IRQHandler
366 DMA2_Stream5_IRQHandler
367 DMA2_Stream6_IRQHandler
368 DMA2_Stream7_IRQHandler
369 USART6_IRQHandler
370 I2C3_EV_IRQHandler
371 I2C3_ER_IRQHandler
372 OTG_HS_EP1_OUT_IRQHandler
373 OTG_HS_EP1_IN_IRQHandler
374 OTG_HS_WKUP_IRQHandler
375 OTG_HS_IRQHandler
376 HASH_RNG_IRQHandler
377 FPU_IRQHandler
378
379 B .
380
381 ENDP
382
383 ALIGN
384
385 END
386
387 ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
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