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[tmk_keyboard.git] / tool / mbed / mbed-sdk / libraries / mbed / targets / cmsis / TARGET_STM / TARGET_STM32F4 / TARGET_NUCLEO_F411RE / TOOLCHAIN_ARM_STD / startup_stm32f411xe.s
1 ;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
2 ;* File Name : startup_stm32f411xe.s
3 ;* Author : MCD Application Team
4 ;* Version : V2.1.0
5 ;* Date : 19-June-2014
6 ;* Description : STM32F411xExx devices vector table for MDK-ARM_STD toolchain.
7 ;* This module performs:
8 ;* - Set the initial SP
9 ;* - Set the initial PC == Reset_Handler
10 ;* - Set the vector table entries with the exceptions ISR address
11 ;* - Branches to __main in the C library (which eventually
12 ;* calls main()).
13 ;* After Reset the CortexM4 processor is in Thread mode,
14 ;* priority is Privileged, and the Stack is set to Main.
15 ;* <<< Use Configuration Wizard in Context Menu >>>
16 ;*******************************************************************************
17 ;
18 ;* Redistribution and use in source and binary forms, with or without modification,
19 ;* are permitted provided that the following conditions are met:
20 ;* 1. Redistributions of source code must retain the above copyright notice,
21 ;* this list of conditions and the following disclaimer.
22 ;* 2. Redistributions in binary form must reproduce the above copyright notice,
23 ;* this list of conditions and the following disclaimer in the documentation
24 ;* and/or other materials provided with the distribution.
25 ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
26 ;* may be used to endorse or promote products derived from this software
27 ;* without specific prior written permission.
28 ;*
29 ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
30 ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31 ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
32 ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
33 ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
35 ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36 ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
37 ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 ;
40 ;*******************************************************************************
41
42 __initial_sp EQU 0x20020000 ; Top of RAM
43
44 PRESERVE8
45 THUMB
46
47
48 ; Vector Table Mapped to Address 0 at Reset
49 AREA RESET, DATA, READONLY
50 EXPORT __Vectors
51 EXPORT __Vectors_End
52 EXPORT __Vectors_Size
53
54 __Vectors DCD __initial_sp ; Top of Stack
55 DCD Reset_Handler ; Reset Handler
56 DCD NMI_Handler ; NMI Handler
57 DCD HardFault_Handler ; Hard Fault Handler
58 DCD MemManage_Handler ; MPU Fault Handler
59 DCD BusFault_Handler ; Bus Fault Handler
60 DCD UsageFault_Handler ; Usage Fault Handler
61 DCD 0 ; Reserved
62 DCD 0 ; Reserved
63 DCD 0 ; Reserved
64 DCD 0 ; Reserved
65 DCD SVC_Handler ; SVCall Handler
66 DCD DebugMon_Handler ; Debug Monitor Handler
67 DCD 0 ; Reserved
68 DCD PendSV_Handler ; PendSV Handler
69 DCD SysTick_Handler ; SysTick Handler
70
71 ; External Interrupts
72 DCD WWDG_IRQHandler ; Window WatchDog
73 DCD PVD_IRQHandler ; PVD through EXTI Line detection
74 DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
75 DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
76 DCD FLASH_IRQHandler ; FLASH
77 DCD RCC_IRQHandler ; RCC
78 DCD EXTI0_IRQHandler ; EXTI Line0
79 DCD EXTI1_IRQHandler ; EXTI Line1
80 DCD EXTI2_IRQHandler ; EXTI Line2
81 DCD EXTI3_IRQHandler ; EXTI Line3
82 DCD EXTI4_IRQHandler ; EXTI Line4
83 DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
84 DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
85 DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
86 DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
87 DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
88 DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
89 DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
90 DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
91 DCD 0 ; Reserved
92 DCD 0 ; Reserved
93 DCD 0 ; Reserved
94 DCD 0 ; Reserved
95 DCD EXTI9_5_IRQHandler ; External Line[9:5]s
96 DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
97 DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
98 DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
99 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
100 DCD TIM2_IRQHandler ; TIM2
101 DCD TIM3_IRQHandler ; TIM3
102 DCD TIM4_IRQHandler ; TIM4
103 DCD I2C1_EV_IRQHandler ; I2C1 Event
104 DCD I2C1_ER_IRQHandler ; I2C1 Error
105 DCD I2C2_EV_IRQHandler ; I2C2 Event
106 DCD I2C2_ER_IRQHandler ; I2C2 Error
107 DCD SPI1_IRQHandler ; SPI1
108 DCD SPI2_IRQHandler ; SPI2
109 DCD USART1_IRQHandler ; USART1
110 DCD USART2_IRQHandler ; USART2
111 DCD 0 ; Reserved
112 DCD EXTI15_10_IRQHandler ; External Line[15:10]s
113 DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
114 DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
115 DCD 0 ; Reserved
116 DCD 0 ; Reserved
117 DCD 0 ; Reserved
118 DCD 0 ; Reserved
119 DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
120 DCD 0 ; Reserved
121 DCD SDIO_IRQHandler ; SDIO
122 DCD TIM5_IRQHandler ; TIM5
123 DCD SPI3_IRQHandler ; SPI3
124 DCD 0 ; Reserved
125 DCD 0 ; Reserved
126 DCD 0 ; Reserved
127 DCD 0 ; Reserved
128 DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
129 DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
130 DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
131 DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
132 DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
133 DCD 0 ; Reserved
134 DCD 0 ; Reserved
135 DCD 0 ; Reserved
136 DCD 0 ; Reserved
137 DCD 0 ; Reserved
138 DCD 0 ; Reserved
139 DCD OTG_FS_IRQHandler ; USB OTG FS
140 DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
141 DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
142 DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
143 DCD USART6_IRQHandler ; USART6
144 DCD I2C3_EV_IRQHandler ; I2C3 event
145 DCD I2C3_ER_IRQHandler ; I2C3 error
146 DCD 0 ; Reserved
147 DCD 0 ; Reserved
148 DCD 0 ; Reserved
149 DCD 0 ; Reserved
150 DCD 0 ; Reserved
151 DCD 0 ; Reserved
152 DCD 0 ; Reserved
153 DCD FPU_IRQHandler ; FPU
154 DCD 0 ; Reserved
155 DCD 0 ; Reserved
156 DCD SPI4_IRQHandler ; SPI4
157 DCD SPI5_IRQHandler ; SPI5
158
159 __Vectors_End
160
161 __Vectors_Size EQU __Vectors_End - __Vectors
162
163 AREA |.text|, CODE, READONLY
164
165 ; Reset handler
166 Reset_Handler PROC
167 EXPORT Reset_Handler [WEAK]
168 IMPORT SystemInit
169 IMPORT __main
170
171 LDR R0, =SystemInit
172 BLX R0
173 LDR R0, =__main
174 BX R0
175 ENDP
176
177 ; Dummy Exception Handlers (infinite loops which can be modified)
178
179 NMI_Handler PROC
180 EXPORT NMI_Handler [WEAK]
181 B .
182 ENDP
183 HardFault_Handler\
184 PROC
185 EXPORT HardFault_Handler [WEAK]
186 B .
187 ENDP
188 MemManage_Handler\
189 PROC
190 EXPORT MemManage_Handler [WEAK]
191 B .
192 ENDP
193 BusFault_Handler\
194 PROC
195 EXPORT BusFault_Handler [WEAK]
196 B .
197 ENDP
198 UsageFault_Handler\
199 PROC
200 EXPORT UsageFault_Handler [WEAK]
201 B .
202 ENDP
203 SVC_Handler PROC
204 EXPORT SVC_Handler [WEAK]
205 B .
206 ENDP
207 DebugMon_Handler\
208 PROC
209 EXPORT DebugMon_Handler [WEAK]
210 B .
211 ENDP
212 PendSV_Handler PROC
213 EXPORT PendSV_Handler [WEAK]
214 B .
215 ENDP
216 SysTick_Handler PROC
217 EXPORT SysTick_Handler [WEAK]
218 B .
219 ENDP
220
221 Default_Handler PROC
222
223 EXPORT WWDG_IRQHandler [WEAK]
224 EXPORT PVD_IRQHandler [WEAK]
225 EXPORT TAMP_STAMP_IRQHandler [WEAK]
226 EXPORT RTC_WKUP_IRQHandler [WEAK]
227 EXPORT FLASH_IRQHandler [WEAK]
228 EXPORT RCC_IRQHandler [WEAK]
229 EXPORT EXTI0_IRQHandler [WEAK]
230 EXPORT EXTI1_IRQHandler [WEAK]
231 EXPORT EXTI2_IRQHandler [WEAK]
232 EXPORT EXTI3_IRQHandler [WEAK]
233 EXPORT EXTI4_IRQHandler [WEAK]
234 EXPORT DMA1_Stream0_IRQHandler [WEAK]
235 EXPORT DMA1_Stream1_IRQHandler [WEAK]
236 EXPORT DMA1_Stream2_IRQHandler [WEAK]
237 EXPORT DMA1_Stream3_IRQHandler [WEAK]
238 EXPORT DMA1_Stream4_IRQHandler [WEAK]
239 EXPORT DMA1_Stream5_IRQHandler [WEAK]
240 EXPORT DMA1_Stream6_IRQHandler [WEAK]
241 EXPORT ADC_IRQHandler [WEAK]
242 EXPORT EXTI9_5_IRQHandler [WEAK]
243 EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
244 EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
245 EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
246 EXPORT TIM1_CC_IRQHandler [WEAK]
247 EXPORT TIM2_IRQHandler [WEAK]
248 EXPORT TIM3_IRQHandler [WEAK]
249 EXPORT TIM4_IRQHandler [WEAK]
250 EXPORT I2C1_EV_IRQHandler [WEAK]
251 EXPORT I2C1_ER_IRQHandler [WEAK]
252 EXPORT I2C2_EV_IRQHandler [WEAK]
253 EXPORT I2C2_ER_IRQHandler [WEAK]
254 EXPORT SPI1_IRQHandler [WEAK]
255 EXPORT SPI2_IRQHandler [WEAK]
256 EXPORT USART1_IRQHandler [WEAK]
257 EXPORT USART2_IRQHandler [WEAK]
258 EXPORT EXTI15_10_IRQHandler [WEAK]
259 EXPORT RTC_Alarm_IRQHandler [WEAK]
260 EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
261 EXPORT DMA1_Stream7_IRQHandler [WEAK]
262 EXPORT SDIO_IRQHandler [WEAK]
263 EXPORT TIM5_IRQHandler [WEAK]
264 EXPORT SPI3_IRQHandler [WEAK]
265 EXPORT DMA2_Stream0_IRQHandler [WEAK]
266 EXPORT DMA2_Stream1_IRQHandler [WEAK]
267 EXPORT DMA2_Stream2_IRQHandler [WEAK]
268 EXPORT DMA2_Stream3_IRQHandler [WEAK]
269 EXPORT DMA2_Stream4_IRQHandler [WEAK]
270 EXPORT OTG_FS_IRQHandler [WEAK]
271 EXPORT DMA2_Stream5_IRQHandler [WEAK]
272 EXPORT DMA2_Stream6_IRQHandler [WEAK]
273 EXPORT DMA2_Stream7_IRQHandler [WEAK]
274 EXPORT USART6_IRQHandler [WEAK]
275 EXPORT I2C3_EV_IRQHandler [WEAK]
276 EXPORT I2C3_ER_IRQHandler [WEAK]
277 EXPORT FPU_IRQHandler [WEAK]
278 EXPORT SPI4_IRQHandler [WEAK]
279 EXPORT SPI5_IRQHandler [WEAK]
280
281 WWDG_IRQHandler
282 PVD_IRQHandler
283 TAMP_STAMP_IRQHandler
284 RTC_WKUP_IRQHandler
285 FLASH_IRQHandler
286 RCC_IRQHandler
287 EXTI0_IRQHandler
288 EXTI1_IRQHandler
289 EXTI2_IRQHandler
290 EXTI3_IRQHandler
291 EXTI4_IRQHandler
292 DMA1_Stream0_IRQHandler
293 DMA1_Stream1_IRQHandler
294 DMA1_Stream2_IRQHandler
295 DMA1_Stream3_IRQHandler
296 DMA1_Stream4_IRQHandler
297 DMA1_Stream5_IRQHandler
298 DMA1_Stream6_IRQHandler
299 ADC_IRQHandler
300 EXTI9_5_IRQHandler
301 TIM1_BRK_TIM9_IRQHandler
302 TIM1_UP_TIM10_IRQHandler
303 TIM1_TRG_COM_TIM11_IRQHandler
304 TIM1_CC_IRQHandler
305 TIM2_IRQHandler
306 TIM3_IRQHandler
307 TIM4_IRQHandler
308 I2C1_EV_IRQHandler
309 I2C1_ER_IRQHandler
310 I2C2_EV_IRQHandler
311 I2C2_ER_IRQHandler
312 SPI1_IRQHandler
313 SPI2_IRQHandler
314 USART1_IRQHandler
315 USART2_IRQHandler
316 EXTI15_10_IRQHandler
317 RTC_Alarm_IRQHandler
318 OTG_FS_WKUP_IRQHandler
319 DMA1_Stream7_IRQHandler
320 SDIO_IRQHandler
321 TIM5_IRQHandler
322 SPI3_IRQHandler
323 DMA2_Stream0_IRQHandler
324 DMA2_Stream1_IRQHandler
325 DMA2_Stream2_IRQHandler
326 DMA2_Stream3_IRQHandler
327 DMA2_Stream4_IRQHandler
328 OTG_FS_IRQHandler
329 DMA2_Stream5_IRQHandler
330 DMA2_Stream6_IRQHandler
331 DMA2_Stream7_IRQHandler
332 USART6_IRQHandler
333 I2C3_EV_IRQHandler
334 I2C3_ER_IRQHandler
335 FPU_IRQHandler
336 SPI4_IRQHandler
337 SPI5_IRQHandler
338
339 B .
340
341 ENDP
342
343 ALIGN
344 END
345
346 ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
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