tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_adc_ex.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f4xx_hal_adc.h
   4   * @author  MCD Application Team
   5   * @version V1.1.0
   6   * @date    19-June-2014
   7   * @brief   Header file of ADC HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32F4xx_ADC_EX_H
  40 #define __STM32F4xx_ADC_EX_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 /* Includes ------------------------------------------------------------------*/
  47 #include "stm32f4xx_hal_def.h"
  48
  49 /** @addtogroup STM32F4xx_HAL_Driver
  50   * @{
  51   */
  52
  53 /** @addtogroup ADCEx
  54   * @{
  55   */
  56
  57 /* Exported types ------------------------------------------------------------*/
  58
  59 /**
  60   * @brief   ADC Configuration injected Channel structure definition
  61   */
  62 typedef struct
  63 {
  64   uint32_t InjectedChannel;                /*!< Configure the ADC injected channel.
  65                                                 This parameter can be a value of @ref ADC_channels */
  66   uint32_t InjectedRank;                   /*!< The rank in the injected group sequencer
  67                                                 This parameter must be a number between Min_Data = 1 and Max_Data = 4. */
  68   uint32_t InjectedSamplingTime;           /*!< The sample time value to be set for the selected channel.
  69                                                 This parameter can be a value of @ref ADC_sampling_times */
  70   uint32_t InjectedOffset;                 /*!< Defines the offset to be subtracted from the raw converted data when convert injected channels.
  71                                                 This parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF. */
  72   uint32_t InjectedNbrOfConversion;        /*!< Specifies the number of ADC conversions that will be done using the sequencer for
  73                                                 injected channel group.
  74                                                 This parameter must be a number between Min_Data = 1 and Max_Data = 4. */
  75   uint32_t AutoInjectedConv;               /*!< Enables or disables the selected ADC automatic injected group
  76                                                 conversion after regular one */
  77   uint32_t InjectedDiscontinuousConvMode;  /*!< Specifies whether the conversion is performed in Discontinuous mode or not for injected channels.
  78                                                 This parameter can be set to ENABLE or DISABLE. */
  79   uint32_t ExternalTrigInjecConvEdge;      /*!< Select the external trigger edge and enable the trigger of an injected channels.
  80                                                 This parameter can be a value of @ref ADCEx_External_trigger_edge_Injected */
  81   uint32_t ExternalTrigInjecConv;          /*!< Select the external event used to trigger the start of conversion of a injected channels.
  82                                                 This parameter can be a value of @ref ADCEx_External_trigger_Source_Injected */
  83 }ADC_InjectionConfTypeDef;
  84
  85 /**
  86   * @brief   ADC Configuration multi-mode structure definition
  87   */
  88 typedef struct
  89 {
  90   uint32_t Mode;              /*!< Configures the ADC to operate in independent or multi mode.
  91                                    This parameter can be a value of @ref ADCEx_Common_mode */
  92   uint32_t DMAAccessMode;     /*!< Configures the Direct memory access mode for multi ADC mode.
  93                                    This parameter can be a value of @ref ADCEx_Direct_memory_access_mode_for_multi_mode */
  94   uint32_t TwoSamplingDelay;  /*!< Configures the Delay between 2 sampling phases.
  95                                    This parameter can be a value of @ref ADC_delay_between_2_sampling_phases */
  96 }ADC_MultiModeTypeDef;
  97
  98 /* Exported constants --------------------------------------------------------*/
  99
 100 /** @defgroup ADCEx_Exported_Constants
 101   * @{
 102   */
 103
 104
 105 /** @defgroup ADCEx_Common_mode
 106   * @{
 107   */
 108 #define ADC_MODE_INDEPENDENT                  ((uint32_t)0x00000000)
 109 #define ADC_DUALMODE_REGSIMULT_INJECSIMULT    ((uint32_t)ADC_CCR_MULTI_0)
 110 #define ADC_DUALMODE_REGSIMULT_ALTERTRIG      ((uint32_t)ADC_CCR_MULTI_1)
 111 #define ADC_DUALMODE_INJECSIMULT              ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
 112 #define ADC_DUALMODE_REGSIMULT                ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
 113 #define ADC_DUALMODE_INTERL                   ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
 114 #define ADC_DUALMODE_ALTERTRIG                ((uint32_t)(ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
 115 #define ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT  ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_0))
 116 #define ADC_TRIPLEMODE_REGSIMULT_AlterTrig    ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_1))
 117 #define ADC_TRIPLEMODE_INJECSIMULT            ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
 118 #define ADC_TRIPLEMODE_REGSIMULT              ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
 119 #define ADC_TRIPLEMODE_INTERL                 ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
 120 #define ADC_TRIPLEMODE_ALTERTRIG              ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
 121
 122 #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT)                 || \
 123                            ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT)   || \
 124                            ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG)     || \
 125                            ((MODE) == ADC_DUALMODE_INJECSIMULT)             || \
 126                            ((MODE) == ADC_DUALMODE_REGSIMULT)               || \
 127                            ((MODE) == ADC_DUALMODE_INTERL)                  || \
 128                            ((MODE) == ADC_DUALMODE_ALTERTRIG)               || \
 129                            ((MODE) == ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT) || \
 130                            ((MODE) == ADC_TRIPLEMODE_REGSIMULT_AlterTrig)   || \
 131                            ((MODE) == ADC_TRIPLEMODE_INJECSIMULT)           || \
 132                            ((MODE) == ADC_TRIPLEMODE_REGSIMULT)             || \
 133                            ((MODE) == ADC_TRIPLEMODE_INTERL)                || \
 134                            ((MODE) == ADC_TRIPLEMODE_ALTERTRIG))
 135 /**
 136   * @}
 137   */
 138
 139 /** @defgroup ADCEx_Direct_memory_access_mode_for_multi_mode
 140   * @{
 141   */
 142 #define ADC_DMAACCESSMODE_DISABLED  ((uint32_t)0x00000000)     /*!< DMA mode disabled */
 143 #define ADC_DMAACCESSMODE_1         ((uint32_t)ADC_CCR_DMA_0)  /*!< DMA mode 1 enabled (2 / 3 half-words one by one - 1 then 2 then 3)*/
 144 #define ADC_DMAACCESSMODE_2         ((uint32_t)ADC_CCR_DMA_1)  /*!< DMA mode 2 enabled (2 / 3 half-words by pairs - 2&1 then 1&3 then 3&2)*/
 145 #define ADC_DMAACCESSMODE_3         ((uint32_t)ADC_CCR_DMA)    /*!< DMA mode 3 enabled (2 / 3 bytes by pairs - 2&1 then 1&3 then 3&2) */
 146
 147 #define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAACCESSMODE_DISABLED) || \
 148                                       ((MODE) == ADC_DMAACCESSMODE_1)        || \
 149                                       ((MODE) == ADC_DMAACCESSMODE_2)        || \
 150                                       ((MODE) == ADC_DMAACCESSMODE_3))
 151 /**
 152   * @}
 153   */
 154
 155 /** @defgroup ADCEx_External_trigger_edge_Injected
 156   * @{
 157   */
 158 #define ADC_EXTERNALTRIGINJECCONVEDGE_NONE           ((uint32_t)0x00000000)
 159 #define ADC_EXTERNALTRIGINJECCONVEDGE_RISING         ((uint32_t)ADC_CR2_JEXTEN_0)
 160 #define ADC_EXTERNALTRIGINJECCONVEDGE_FALLING        ((uint32_t)ADC_CR2_JEXTEN_1)
 161 #define ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING  ((uint32_t)ADC_CR2_JEXTEN)
 162
 163 #define IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_NONE)    || \
 164                                           ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISING)  || \
 165                                           ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_FALLING) || \
 166                                           ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING))
 167 /**
 168   * @}
 169   */
 170
 171 /** @defgroup ADCEx_External_trigger_Source_Injected
 172   * @{
 173   */
 174 #define ADC_EXTERNALTRIGINJECCONV_T1_CC4           ((uint32_t)0x00000000)
 175 #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO          ((uint32_t)ADC_CR2_JEXTSEL_0)
 176 #define ADC_EXTERNALTRIGINJECCONV_T2_CC1           ((uint32_t)ADC_CR2_JEXTSEL_1)
 177 #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO          ((uint32_t)(ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
 178 #define ADC_EXTERNALTRIGINJECCONV_T3_CC2           ((uint32_t)ADC_CR2_JEXTSEL_2)
 179 #define ADC_EXTERNALTRIGINJECCONV_T3_CC4           ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
 180 #define ADC_EXTERNALTRIGINJECCONV_T4_CC1           ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
 181 #define ADC_EXTERNALTRIGINJECCONV_T4_CC2           ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
 182 #define ADC_EXTERNALTRIGINJECCONV_T4_CC3           ((uint32_t)ADC_CR2_JEXTSEL_3)
 183 #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO          ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_0))
 184 #define ADC_EXTERNALTRIGINJECCONV_T5_CC4           ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1))
 185 #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO          ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
 186 #define ADC_EXTERNALTRIGINJECCONV_T8_CC2           ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2))
 187 #define ADC_EXTERNALTRIGINJECCONV_T8_CC3           ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
 188 #define ADC_EXTERNALTRIGINJECCONV_T8_CC4           ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
 189 #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15         ((uint32_t)ADC_CR2_JEXTSEL)
 190
 191 #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)  || \
 192                                         ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
 193                                         ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)  || \
 194                                         ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
 195                                         ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC2)  || \
 196                                         ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)  || \
 197                                         ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC1)  || \
 198                                         ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC2)  || \
 199                                         ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3)  || \
 200                                         ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
 201                                         ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4)  || \
 202                                         ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \
 203                                         ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2)  || \
 204                                         ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC3)  || \
 205                                         ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4)  || \
 206                                         ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15))
 207 /**
 208   * @}
 209   */
 210
 211 /** @defgroup ADCEx_injected_channel_selection
 212   * @{
 213   */
 214 #define ADC_INJECTED_RANK_1    ((uint32_t)0x00000001)
 215 #define ADC_INJECTED_RANK_2    ((uint32_t)0x00000002)
 216 #define ADC_INJECTED_RANK_3    ((uint32_t)0x00000003)
 217 #define ADC_INJECTED_RANK_4    ((uint32_t)0x00000004)
 218
 219 /**
 220   * @}
 221   */
 222
 223 /** @defgroup ADCEx_injected_length
 224   * @{
 225   */
 226 #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)4)))
 227 /**
 228   * @}
 229   */
 230
 231 /** @defgroup ADCEx_injected_rank
 232   * @{
 233   */
 234 #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= ((uint32_t)1)) && ((RANK) <= ((uint32_t)4)))
 235 /**
 236   * @}
 237   */
 238
 239 /**
 240   * @}
 241   */
 242
 243 /* Exported macro ------------------------------------------------------------*/
 244
 245 /**
 246   * @brief  Set the selected injected Channel rank.
 247   * @param  _CHANNELNB_: Channel number.
 248   * @param  _RANKNB_: Rank number.
 249   * @param  _JSQR_JL_: Sequence length.
 250   * @retval None
 251   */
 252 #define   __HAL_ADC_JSQR(_CHANNELNB_, _RANKNB_,_JSQR_JL_) \
 253 ((_CHANNELNB_) << (5 * (uint8_t)(((_RANKNB_) + 3) - (_JSQR_JL_))))
 254
 255 /* Exported functions --------------------------------------------------------*/
 256
 257 /* I/O operation functions ******************************************************/
 258 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
 259 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
 260 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
 261 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
 262 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
 263 uint32_t          HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
 264 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
 265 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc);
 266 uint32_t          HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc);
 267 void       HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
 268
 269 /* Peripheral Control functions *************************************************/
 270 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
 271 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode);
 272
 273 /**
 274   * @}
 275   */
 276
 277 /**
 278   * @}
 279   */
 280
 281 #ifdef __cplusplus
 282 }
 283 #endif
 284
 285 #endif /*__STM32F4xx_ADC_EX_H */
 286
 287
 288 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/