tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_can.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f4xx_hal_can.h
   4   * @author  MCD Application Team
   5   * @version V1.1.0
   6   * @date    19-June-2014
   7   * @brief   Header file of CAN HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32F4xx_HAL_CAN_H
  40 #define __STM32F4xx_HAL_CAN_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
  47 /* Includes ------------------------------------------------------------------*/
  48 #include "stm32f4xx_hal_def.h"
  49
  50 /** @addtogroup STM32F4xx_HAL_Driver
  51   * @{
  52   */
  53
  54 /** @addtogroup CAN
  55   * @{
  56   */
  57
  58 /* Exported types ------------------------------------------------------------*/
  59
  60 /**
  61   * @brief  HAL State structures definition
  62   */
  63 typedef enum
  64 {
  65   HAL_CAN_STATE_RESET             = 0x00,  /*!< CAN not yet initialized or disabled */
  66   HAL_CAN_STATE_READY             = 0x01,  /*!< CAN initialized and ready for use   */
  67   HAL_CAN_STATE_BUSY              = 0x02,  /*!< CAN process is ongoing              */
  68   HAL_CAN_STATE_BUSY_TX           = 0x12,  /*!< CAN process is ongoing              */
  69   HAL_CAN_STATE_BUSY_RX           = 0x22,  /*!< CAN process is ongoing              */
  70   HAL_CAN_STATE_BUSY_TX_RX        = 0x32,  /*!< CAN process is ongoing              */
  71   HAL_CAN_STATE_TIMEOUT           = 0x03,  /*!< Timeout state                       */
  72   HAL_CAN_STATE_ERROR             = 0x04   /*!< CAN error state                     */
  73
  74 }HAL_CAN_StateTypeDef;
  75
  76 /**
  77   * @brief  CAN init structure definition
  78   */
  79 typedef struct
  80 {
  81   uint32_t Prescaler;  /*!< Specifies the length of a time quantum.
  82                             This parameter must be a number between Min_Data = 1 and Max_Data = 1024 */
  83
  84   uint32_t Mode;       /*!< Specifies the CAN operating mode.
  85                             This parameter can be a value of @ref CAN_operating_mode */
  86
  87   uint32_t SJW;        /*!< Specifies the maximum number of time quanta
  88                             the CAN hardware is allowed to lengthen or
  89                             shorten a bit to perform resynchronization.
  90                             This parameter can be a value of @ref CAN_synchronisation_jump_width */
  91
  92   uint32_t BS1;        /*!< Specifies the number of time quanta in Bit Segment 1.
  93                             This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
  94
  95   uint32_t BS2;        /*!< Specifies the number of time quanta in Bit Segment 2.
  96                             This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
  97
  98   uint32_t TTCM;       /*!< Enable or disable the time triggered communication mode.
  99                             This parameter can be set to ENABLE or DISABLE. */
 100
 101   uint32_t ABOM;       /*!< Enable or disable the automatic bus-off management.
 102                             This parameter can be set to ENABLE or DISABLE */
 103
 104   uint32_t AWUM;       /*!< Enable or disable the automatic wake-up mode.
 105                             This parameter can be set to ENABLE or DISABLE */
 106
 107   uint32_t NART;       /*!< Enable or disable the non-automatic retransmission mode.
 108                             This parameter can be set to ENABLE or DISABLE */
 109
 110   uint32_t RFLM;       /*!< Enable or disable the receive FIFO Locked mode.
 111                             This parameter can be set to ENABLE or DISABLE */
 112
 113   uint32_t TXFP;       /*!< Enable or disable the transmit FIFO priority.
 114                             This parameter can be set to ENABLE or DISABLE */
 115 }CAN_InitTypeDef;
 116
 117 /**
 118   * @brief  CAN filter configuration structure definition
 119   */
 120 typedef struct
 121 {
 122   uint32_t FilterIdHigh;          /*!< Specifies the filter identification number (MSBs for a 32-bit
 123                                        configuration, first one for a 16-bit configuration).
 124                                        This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
 125
 126   uint32_t FilterIdLow;           /*!< Specifies the filter identification number (LSBs for a 32-bit
 127                                        configuration, second one for a 16-bit configuration).
 128                                        This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
 129
 130   uint32_t FilterMaskIdHigh;      /*!< Specifies the filter mask number or identification number,
 131                                        according to the mode (MSBs for a 32-bit configuration,
 132                                        first one for a 16-bit configuration).
 133                                        This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
 134
 135   uint32_t FilterMaskIdLow;       /*!< Specifies the filter mask number or identification number,
 136                                        according to the mode (LSBs for a 32-bit configuration,
 137                                        second one for a 16-bit configuration).
 138                                        This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
 139
 140   uint32_t FilterFIFOAssignment;  /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter.
 141                                        This parameter can be a value of @ref CAN_filter_FIFO */
 142
 143   uint32_t FilterNumber;          /*!< Specifies the filter which will be initialized.
 144                                        This parameter must be a number between Min_Data = 0 and Max_Data = 27 */
 145
 146   uint32_t FilterMode;            /*!< Specifies the filter mode to be initialized.
 147                                        This parameter can be a value of @ref CAN_filter_mode */
 148
 149   uint32_t FilterScale;           /*!< Specifies the filter scale.
 150                                        This parameter can be a value of @ref CAN_filter_scale */
 151
 152   uint32_t FilterActivation;      /*!< Enable or disable the filter.
 153                                        This parameter can be set to ENABLE or DISABLE. */
 154
 155   uint32_t BankNumber;            /*!< Select the start slave bank filter.
 156                                        This parameter must be a number between Min_Data = 0 and Max_Data = 28 */
 157
 158 }CAN_FilterConfTypeDef;
 159
 160 /**
 161   * @brief  CAN Tx message structure definition
 162   */
 163 typedef struct
 164 {
 165   uint32_t StdId;    /*!< Specifies the standard identifier.
 166                           This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
 167
 168   uint32_t ExtId;    /*!< Specifies the extended identifier.
 169                           This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
 170
 171   uint32_t IDE;      /*!< Specifies the type of identifier for the message that will be transmitted.
 172                           This parameter can be a value of @ref CAN_identifier_type */
 173
 174   uint32_t RTR;      /*!< Specifies the type of frame for the message that will be transmitted.
 175                           This parameter can be a value of @ref CAN_remote_transmission_request */
 176
 177   uint32_t DLC;      /*!< Specifies the length of the frame that will be transmitted.
 178                           This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
 179
 180   uint32_t Data[8];  /*!< Contains the data to be transmitted.
 181                           This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
 182
 183 }CanTxMsgTypeDef;
 184
 185 /**
 186   * @brief  CAN Rx message structure definition
 187   */
 188 typedef struct
 189 {
 190   uint32_t StdId;       /*!< Specifies the standard identifier.
 191                              This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
 192
 193   uint32_t ExtId;       /*!< Specifies the extended identifier.
 194                              This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
 195
 196   uint32_t IDE;         /*!< Specifies the type of identifier for the message that will be received.
 197                              This parameter can be a value of @ref CAN_identifier_type */
 198
 199   uint32_t RTR;         /*!< Specifies the type of frame for the received message.
 200                              This parameter can be a value of @ref CAN_remote_transmission_request */
 201
 202   uint32_t DLC;         /*!< Specifies the length of the frame that will be received.
 203                              This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
 204
 205   uint32_t Data[8];     /*!< Contains the data to be received.
 206                              This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
 207
 208   uint32_t FMI;         /*!< Specifies the index of the filter the message stored in the mailbox passes through.
 209                              This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
 210
 211   uint32_t FIFONumber;  /*!< Specifies the receive FIFO number.
 212                              This parameter can be CAN_FIFO0 or CAN_FIFO1 */
 213
 214 }CanRxMsgTypeDef;
 215
 216 /**
 217   * @brief  CAN handle Structure definition
 218   */
 219 typedef struct
 220 {
 221   CAN_TypeDef                 *Instance;  /*!< Register base address          */
 222
 223   CAN_InitTypeDef             Init;       /*!< CAN required parameters        */
 224
 225   CanTxMsgTypeDef*            pTxMsg;     /*!< Pointer to transmit structure  */
 226
 227   CanRxMsgTypeDef*            pRxMsg;     /*!< Pointer to reception structure */
 228
 229   __IO HAL_CAN_StateTypeDef   State;      /*!< CAN communication state        */
 230
 231   HAL_LockTypeDef             Lock;       /*!< CAN locking object             */
 232
 233   __IO uint32_t               ErrorCode;  /*!< CAN Error code                 */
 234
 235 }CAN_HandleTypeDef;
 236
 237 /* Exported constants --------------------------------------------------------*/
 238
 239 /** @defgroup CAN_Exported_Constants
 240   * @{
 241   */
 242
 243 /** @defgroup HAL CAN Error Code
 244   * @{
 245   */
 246 #define   HAL_CAN_ERROR_NONE      0x00    /*!< No error             */
 247 #define   HAL_CAN_ERROR_EWG       0x01    /*!< EWG error            */
 248 #define   HAL_CAN_ERROR_EPV       0x02    /*!< EPV error            */
 249 #define   HAL_CAN_ERROR_BOF       0x04    /*!< BOF error            */
 250 #define   HAL_CAN_ERROR_STF       0x08    /*!< Stuff error          */
 251 #define   HAL_CAN_ERROR_FOR       0x10    /*!< Form error           */
 252 #define   HAL_CAN_ERROR_ACK       0x20    /*!< Acknowledgment error */
 253 #define   HAL_CAN_ERROR_BR        0x40    /*!< Bit recessive        */
 254 #define   HAL_CAN_ERROR_BD        0x80    /*!< LEC dominant         */
 255 #define   HAL_CAN_ERROR_CRC       0x100   /*!< LEC transfer error   */
 256 /**
 257   * @}
 258   */
 259
 260
 261 /** @defgroup CAN_InitStatus
 262   * @{
 263   */
 264 #define CAN_INITSTATUS_FAILED       ((uint8_t)0x00)  /*!< CAN initialization failed */
 265 #define CAN_INITSTATUS_SUCCESS      ((uint8_t)0x01)  /*!< CAN initialization OK */
 266 /**
 267   * @}
 268   */
 269
 270 /** @defgroup CAN_operating_mode
 271   * @{
 272   */
 273 #define CAN_MODE_NORMAL             ((uint32_t)0x00000000)                     /*!< Normal mode   */
 274 #define CAN_MODE_LOOPBACK           ((uint32_t)CAN_BTR_LBKM)                   /*!< Loopback mode */
 275 #define CAN_MODE_SILENT             ((uint32_t)CAN_BTR_SILM)                   /*!< Silent mode   */
 276 #define CAN_MODE_SILENT_LOOPBACK    ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM))  /*!< Loopback combined with silent mode */
 277
 278 #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \
 279                            ((MODE) == CAN_MODE_LOOPBACK)|| \
 280                            ((MODE) == CAN_MODE_SILENT) || \
 281                            ((MODE) == CAN_MODE_SILENT_LOOPBACK))
 282 /**
 283   * @}
 284   */
 285
 286
 287 /** @defgroup CAN_synchronisation_jump_width
 288   * @{
 289   */
 290 #define CAN_SJW_1TQ                 ((uint32_t)0x00000000)     /*!< 1 time quantum */
 291 #define CAN_SJW_2TQ                 ((uint32_t)CAN_BTR_SJW_0)  /*!< 2 time quantum */
 292 #define CAN_SJW_3TQ                 ((uint32_t)CAN_BTR_SJW_1)  /*!< 3 time quantum */
 293 #define CAN_SJW_4TQ                 ((uint32_t)CAN_BTR_SJW)    /*!< 4 time quantum */
 294
 295 #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ)|| \
 296                          ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ))
 297 /**
 298   * @}
 299   */
 300
 301 /** @defgroup CAN_time_quantum_in_bit_segment_1
 302   * @{
 303   */
 304 #define CAN_BS1_1TQ                 ((uint32_t)0x00000000)                                       /*!< 1 time quantum  */
 305 #define CAN_BS1_2TQ                 ((uint32_t)CAN_BTR_TS1_0)                                    /*!< 2 time quantum  */
 306 #define CAN_BS1_3TQ                 ((uint32_t)CAN_BTR_TS1_1)                                    /*!< 3 time quantum  */
 307 #define CAN_BS1_4TQ                 ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0))                  /*!< 4 time quantum  */
 308 #define CAN_BS1_5TQ                 ((uint32_t)CAN_BTR_TS1_2)                                    /*!< 5 time quantum  */
 309 #define CAN_BS1_6TQ                 ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0))                  /*!< 6 time quantum  */
 310 #define CAN_BS1_7TQ                 ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1))                  /*!< 7 time quantum  */
 311 #define CAN_BS1_8TQ                 ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0))  /*!< 8 time quantum  */
 312 #define CAN_BS1_9TQ                 ((uint32_t)CAN_BTR_TS1_3)                                    /*!< 9 time quantum  */
 313 #define CAN_BS1_10TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0))                  /*!< 10 time quantum */
 314 #define CAN_BS1_11TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1))                  /*!< 11 time quantum */
 315 #define CAN_BS1_12TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0))  /*!< 12 time quantum */
 316 #define CAN_BS1_13TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2))                  /*!< 13 time quantum */
 317 #define CAN_BS1_14TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0))  /*!< 14 time quantum */
 318 #define CAN_BS1_15TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1))  /*!< 15 time quantum */
 319 #define CAN_BS1_16TQ                ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */
 320
 321 #define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ)
 322 /**
 323   * @}
 324   */
 325
 326 /** @defgroup CAN_time_quantum_in_bit_segment_2
 327   * @{
 328   */
 329 #define CAN_BS2_1TQ                 ((uint32_t)0x00000000)                       /*!< 1 time quantum */
 330 #define CAN_BS2_2TQ                 ((uint32_t)CAN_BTR_TS2_0)                    /*!< 2 time quantum */
 331 #define CAN_BS2_3TQ                 ((uint32_t)CAN_BTR_TS2_1)                    /*!< 3 time quantum */
 332 #define CAN_BS2_4TQ                 ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0))  /*!< 4 time quantum */
 333 #define CAN_BS2_5TQ                 ((uint32_t)CAN_BTR_TS2_2)                    /*!< 5 time quantum */
 334 #define CAN_BS2_6TQ                 ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0))  /*!< 6 time quantum */
 335 #define CAN_BS2_7TQ                 ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1))  /*!< 7 time quantum */
 336 #define CAN_BS2_8TQ                 ((uint32_t)CAN_BTR_TS2)                      /*!< 8 time quantum */
 337
 338 #define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ)
 339 /**
 340   * @}
 341   */
 342
 343 /** @defgroup CAN_clock_prescaler
 344   * @{
 345   */
 346 #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024))
 347 /**
 348   * @}
 349   */
 350
 351 /** @defgroup CAN_filter_number
 352   * @{
 353   */
 354 #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27)
 355 /**
 356   * @}
 357   */
 358
 359 /** @defgroup CAN_filter_mode
 360   * @{
 361   */
 362 #define CAN_FILTERMODE_IDMASK       ((uint8_t)0x00)  /*!< Identifier mask mode */
 363 #define CAN_FILTERMODE_IDLIST       ((uint8_t)0x01)  /*!< Identifier list mode */
 364
 365 #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \
 366                                   ((MODE) == CAN_FILTERMODE_IDLIST))
 367 /**
 368   * @}
 369   */
 370
 371 /** @defgroup CAN_filter_scale
 372   * @{
 373   */
 374 #define CAN_FILTERSCALE_16BIT       ((uint8_t)0x00)  /*!< Two 16-bit filters */
 375 #define CAN_FILTERSCALE_32BIT       ((uint8_t)0x01)  /*!< One 32-bit filter  */
 376
 377 #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \
 378                                     ((SCALE) == CAN_FILTERSCALE_32BIT))
 379 /**
 380   * @}
 381   */
 382
 383 /** @defgroup CAN_filter_FIFO
 384   * @{
 385   */
 386 #define CAN_FILTER_FIFO0             ((uint8_t)0x00)  /*!< Filter FIFO 0 assignment for filter x */
 387 #define CAN_FILTER_FIFO1             ((uint8_t)0x01)  /*!< Filter FIFO 1 assignment for filter x */
 388
 389 #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \
 390                                   ((FIFO) == CAN_FILTER_FIFO1))
 391
 392 /* Legacy defines */
 393 #define CAN_FilterFIFO0  CAN_FILTER_FIFO0
 394 #define CAN_FilterFIFO1  CAN_FILTER_FIFO1
 395 /**
 396   * @}
 397   */
 398
 399 /** @defgroup CAN_Start_bank_filter_for_slave_CAN
 400   * @{
 401   */
 402 #define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28)
 403 /**
 404   * @}
 405   */
 406
 407 /** @defgroup CAN_Tx
 408   * @{
 409   */
 410 #define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02))
 411 #define IS_CAN_STDID(STDID)   ((STDID) <= ((uint32_t)0x7FF))
 412 #define IS_CAN_EXTID(EXTID)   ((EXTID) <= ((uint32_t)0x1FFFFFFF))
 413 #define IS_CAN_DLC(DLC)       ((DLC) <= ((uint8_t)0x08))
 414 /**
 415   * @}
 416   */
 417
 418 /** @defgroup CAN_identifier_type
 419   * @{
 420   */
 421 #define CAN_ID_STD             ((uint32_t)0x00000000)  /*!< Standard Id */
 422 #define CAN_ID_EXT             ((uint32_t)0x00000004)  /*!< Extended Id */
 423 #define IS_CAN_IDTYPE(IDTYPE)  (((IDTYPE) == CAN_ID_STD) || \
 424                                 ((IDTYPE) == CAN_ID_EXT))
 425 /**
 426   * @}
 427   */
 428
 429 /** @defgroup CAN_remote_transmission_request
 430   * @{
 431   */
 432 #define CAN_RTR_DATA                ((uint32_t)0x00000000)  /*!< Data frame */
 433 #define CAN_RTR_REMOTE              ((uint32_t)0x00000002)  /*!< Remote frame */
 434 #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE))
 435
 436 /**
 437   * @}
 438   */
 439
 440 /** @defgroup CAN_transmit_constants
 441   * @{
 442   */
 443 #define CAN_TXSTATUS_FAILED         ((uint8_t)0x00)  /*!< CAN transmission failed */
 444 #define CAN_TXSTATUS_OK             ((uint8_t)0x01)  /*!< CAN transmission succeeded */
 445 #define CAN_TXSTATUS_PENDING        ((uint8_t)0x02)  /*!< CAN transmission pending */
 446 #define CAN_TXSTATUS_NOMAILBOX      ((uint8_t)0x04)  /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */
 447
 448 /**
 449   * @}
 450   */
 451
 452 /** @defgroup CAN_receive_FIFO_number_constants
 453   * @{
 454   */
 455 #define CAN_FIFO0                   ((uint8_t)0x00)  /*!< CAN FIFO 0 used to receive */
 456 #define CAN_FIFO1                   ((uint8_t)0x01)  /*!< CAN FIFO 1 used to receive */
 457
 458 #define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1))
 459 /**
 460   * @}
 461   */
 462
 463 /** @defgroup CAN_flags
 464   * @{
 465   */
 466 /* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus()
 467    and CAN_ClearFlag() functions. */
 468 /* If the flag is 0x1XXXXXXX, it means that it can only be used with
 469    CAN_GetFlagStatus() function.  */
 470
 471 /* Transmit Flags */
 472 #define CAN_FLAG_RQCP0             ((uint32_t)0x00000500)  /*!< Request MailBox0 flag         */
 473 #define CAN_FLAG_RQCP1             ((uint32_t)0x00000508)  /*!< Request MailBox1 flag         */
 474 #define CAN_FLAG_RQCP2             ((uint32_t)0x00000510)  /*!< Request MailBox2 flag         */
 475 #define CAN_FLAG_TXOK0             ((uint32_t)0x00000501)  /*!< Transmission OK MailBox0 flag */
 476 #define CAN_FLAG_TXOK1             ((uint32_t)0x00000509)  /*!< Transmission OK MailBox1 flag */
 477 #define CAN_FLAG_TXOK2             ((uint32_t)0x00000511)  /*!< Transmission OK MailBox2 flag */
 478 #define CAN_FLAG_TME0              ((uint32_t)0x0000051A)  /*!< Transmit mailbox 0 empty flag */
 479 #define CAN_FLAG_TME1              ((uint32_t)0x0000051B)  /*!< Transmit mailbox 0 empty flag */
 480 #define CAN_FLAG_TME2              ((uint32_t)0x0000051C)  /*!< Transmit mailbox 0 empty flag */
 481
 482 /* Receive Flags */
 483 #define CAN_FLAG_FF0               ((uint32_t)0x00000203)  /*!< FIFO 0 Full flag    */
 484 #define CAN_FLAG_FOV0              ((uint32_t)0x00000204)  /*!< FIFO 0 Overrun flag */
 485
 486 #define CAN_FLAG_FF1               ((uint32_t)0x00000403)  /*!< FIFO 1 Full flag    */
 487 #define CAN_FLAG_FOV1              ((uint32_t)0x00000404)  /*!< FIFO 1 Overrun flag */
 488
 489 /* Operating Mode Flags */
 490 #define CAN_FLAG_WKU               ((uint32_t)0x00000103)  /*!< Wake up flag           */
 491 #define CAN_FLAG_SLAK              ((uint32_t)0x00000101)  /*!< Sleep acknowledge flag */
 492 #define CAN_FLAG_SLAKI             ((uint32_t)0x00000104)  /*!< Sleep acknowledge flag */
 493 /* @note When SLAK interrupt is disabled (SLKIE=0), no polling on SLAKI is possible.
 494          In this case the SLAK bit can be polled.*/
 495
 496 /* Error Flags */
 497 #define CAN_FLAG_EWG               ((uint32_t)0x00000300)  /*!< Error warning flag   */
 498 #define CAN_FLAG_EPV               ((uint32_t)0x00000301)  /*!< Error passive flag   */
 499 #define CAN_FLAG_BOF               ((uint32_t)0x00000302)  /*!< Bus-Off flag         */
 500
 501 #define IS_CAN_GET_FLAG(FLAG) (((FLAG) == CAN_FLAG_RQCP2) || ((FLAG) == CAN_FLAG_BOF)   || \
 502                                ((FLAG) == CAN_FLAG_EPV)   || ((FLAG) == CAN_FLAG_EWG)   || \
 503                                ((FLAG) == CAN_FLAG_WKU)   || ((FLAG) == CAN_FLAG_FOV0)  || \
 504                                ((FLAG) == CAN_FLAG_FF0)   || ((FLAG) == CAN_FLAG_SLAK)  || \
 505                                ((FLAG) == CAN_FLAG_FOV1)  || ((FLAG) == CAN_FLAG_FF1)   || \
 506                                ((FLAG) == CAN_FLAG_RQCP1) || ((FLAG) == CAN_FLAG_RQCP0))
 507
 508
 509 #define IS_CAN_CLEAR_FLAG(FLAG)(((FLAG) == CAN_FLAG_SLAK)  || ((FLAG) == CAN_FLAG_RQCP2) || \
 510                                 ((FLAG) == CAN_FLAG_RQCP1) || ((FLAG) == CAN_FLAG_RQCP0) || \
 511                                 ((FLAG) == CAN_FLAG_FF0)   || ((FLAG) == CAN_FLAG_FOV0)  || \
 512                                 ((FLAG) == CAN_FLAG_FF1)   || ((FLAG) == CAN_FLAG_FOV1)  || \
 513                                 ((FLAG) == CAN_FLAG_WKU))
 514 /**
 515   * @}
 516   */
 517
 518
 519 /** @defgroup CAN_interrupts
 520   * @{
 521   */
 522 #define CAN_IT_TME                  ((uint32_t)CAN_IER_TMEIE)   /*!< Transmit mailbox empty interrupt */
 523
 524 /* Receive Interrupts */
 525 #define CAN_IT_FMP0                 ((uint32_t)CAN_IER_FMPIE0)  /*!< FIFO 0 message pending interrupt */
 526 #define CAN_IT_FF0                  ((uint32_t)CAN_IER_FFIE0)   /*!< FIFO 0 full interrupt            */
 527 #define CAN_IT_FOV0                 ((uint32_t)CAN_IER_FOVIE0)  /*!< FIFO 0 overrun interrupt         */
 528 #define CAN_IT_FMP1                 ((uint32_t)CAN_IER_FMPIE1)  /*!< FIFO 1 message pending interrupt */
 529 #define CAN_IT_FF1                  ((uint32_t)CAN_IER_FFIE1)   /*!< FIFO 1 full interrupt            */
 530 #define CAN_IT_FOV1                 ((uint32_t)CAN_IER_FOVIE1)  /*!< FIFO 1 overrun interrupt         */
 531
 532 /* Operating Mode Interrupts */
 533 #define CAN_IT_WKU                  ((uint32_t)CAN_IER_WKUIE)  /*!< Wake-up interrupt           */
 534 #define CAN_IT_SLK                  ((uint32_t)CAN_IER_SLKIE)  /*!< Sleep acknowledge interrupt */
 535
 536 /* Error Interrupts */
 537 #define CAN_IT_EWG                  ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt   */
 538 #define CAN_IT_EPV                  ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt   */
 539 #define CAN_IT_BOF                  ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt         */
 540 #define CAN_IT_LEC                  ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */
 541 #define CAN_IT_ERR                  ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt           */
 542
 543 /* Flags named as Interrupts : kept only for FW compatibility */
 544 #define CAN_IT_RQCP0   CAN_IT_TME
 545 #define CAN_IT_RQCP1   CAN_IT_TME
 546 #define CAN_IT_RQCP2   CAN_IT_TME
 547
 548 #define IS_CAN_IT(IT)        (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FMP0)  ||\
 549                              ((IT) == CAN_IT_FF0)  || ((IT) == CAN_IT_FOV0)  ||\
 550                              ((IT) == CAN_IT_FMP1) || ((IT) == CAN_IT_FF1)   ||\
 551                              ((IT) == CAN_IT_FOV1) || ((IT) == CAN_IT_EWG)   ||\
 552                              ((IT) == CAN_IT_EPV)  || ((IT) == CAN_IT_BOF)   ||\
 553                              ((IT) == CAN_IT_LEC)  || ((IT) == CAN_IT_ERR)   ||\
 554                              ((IT) == CAN_IT_WKU)  || ((IT) == CAN_IT_SLK))
 555
 556 #define IS_CAN_CLEAR_IT(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FF0)    ||\
 557                              ((IT) == CAN_IT_FOV0)|| ((IT) == CAN_IT_FF1)    ||\
 558                              ((IT) == CAN_IT_FOV1)|| ((IT) == CAN_IT_EWG)    ||\
 559                              ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF)    ||\
 560                              ((IT) == CAN_IT_LEC) || ((IT) == CAN_IT_ERR)    ||\
 561                              ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK))
 562 /**
 563   * @}
 564   */
 565
 566 /* Time out for INAK bit */
 567 #define INAK_TIMEOUT      ((uint32_t)0x0000FFFF)
 568 /* Time out for SLAK bit */
 569 #define SLAK_TIMEOUT      ((uint32_t)0x0000FFFF)
 570
 571 /* Mailboxes definition */
 572 #define CAN_TXMAILBOX_0   ((uint8_t)0x00)
 573 #define CAN_TXMAILBOX_1   ((uint8_t)0x01)
 574 #define CAN_TXMAILBOX_2   ((uint8_t)0x02)
 575
 576 /**
 577   * @}
 578   */
 579
 580 /* Exported macro ------------------------------------------------------------*/
 581
 582 /** @brief Reset CAN handle state
 583   * @param  __HANDLE__: specifies the CAN Handle.
 584   * @retval None
 585   */
 586 #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
 587
 588 /**
 589   * @brief  Enable the specified CAN interrupts.
 590   * @param  __HANDLE__: CAN handle
 591   * @param  __INTERRUPT__: CAN Interrupt
 592   * @retval None
 593   */
 594 #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
 595
 596 /**
 597   * @brief  Disable the specified CAN interrupts.
 598   * @param  __HANDLE__: CAN handle
 599   * @param  __INTERRUPT__: CAN Interrupt
 600   * @retval None
 601   */
 602 #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
 603
 604 /**
 605   * @brief  Return the number of pending received messages.
 606   * @param  __HANDLE__: CAN handle
 607   * @param  __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
 608   * @retval The number of pending message.
 609   */
 610 #define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
 611 ((uint8_t)((__HANDLE__)->Instance->RF0R&(uint32_t)0x03)) : ((uint8_t)((__HANDLE__)->Instance->RF1R&(uint32_t)0x03)))
 612
 613 /** @brief  Check whether the specified CAN flag is set or not.
 614   * @param  __HANDLE__: CAN Handle
 615   * @param  __FLAG__: specifies the flag to check.
 616   *         This parameter can be one of the following values:
 617   *            @arg CAN_TSR_RQCP0: Request MailBox0 Flag
 618   *            @arg CAN_TSR_RQCP1: Request MailBox1 Flag
 619   *            @arg CAN_TSR_RQCP2: Request MailBox2 Flag
 620   *            @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
 621   *            @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
 622   *            @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
 623   *            @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
 624   *            @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
 625   *            @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
 626   *            @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
 627   *            @arg CAN_FLAG_FF0: FIFO 0 Full Flag
 628   *            @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
 629   *            @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
 630   *            @arg CAN_FLAG_FF1: FIFO 1 Full Flag
 631   *            @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
 632   *            @arg CAN_FLAG_WKU: Wake up Flag
 633   *            @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
 634   *            @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
 635   *            @arg CAN_FLAG_EWG: Error Warning Flag
 636   *            @arg CAN_FLAG_EPV: Error Passive Flag
 637   *            @arg CAN_FLAG_BOF: Bus-Off Flag
 638   * @retval The new state of __FLAG__ (TRUE or FALSE).
 639   */
 640 #define CAN_FLAG_MASK  ((uint32_t)0x000000FF)
 641 #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
 642 ((((__FLAG__) >> 8) == 5)? ((((__HANDLE__)->Instance->TSR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
 643  (((__FLAG__) >> 8) == 2)? ((((__HANDLE__)->Instance->RF0R) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
 644  (((__FLAG__) >> 8) == 4)? ((((__HANDLE__)->Instance->RF1R) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
 645  (((__FLAG__) >> 8) == 1)? ((((__HANDLE__)->Instance->MSR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
 646  ((((__HANDLE__)->Instance->ESR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))))
 647
 648 /** @brief  Clear the specified CAN pending flag.
 649   * @param  __HANDLE__: CAN Handle.
 650   * @param  __FLAG__: specifies the flag to check.
 651   *         This parameter can be one of the following values:
 652   *            @arg CAN_TSR_RQCP0: Request MailBox0 Flag
 653   *            @arg CAN_TSR_RQCP1: Request MailBox1 Flag
 654   *            @arg CAN_TSR_RQCP2: Request MailBox2 Flag
 655   *            @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
 656   *            @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
 657   *            @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
 658   *            @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
 659   *            @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
 660   *            @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
 661   *            @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
 662   *            @arg CAN_FLAG_FF0: FIFO 0 Full Flag
 663   *            @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
 664   *            @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
 665   *            @arg CAN_FLAG_FF1: FIFO 1 Full Flag
 666   *            @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
 667   *            @arg CAN_FLAG_WKU: Wake up Flag
 668   *            @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
 669   *            @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
 670   *            @arg CAN_FLAG_EWG: Error Warning Flag
 671   *            @arg CAN_FLAG_EPV: Error Passive Flag
 672   *            @arg CAN_FLAG_BOF: Bus-Off Flag
 673   * @retval The new state of __FLAG__ (TRUE or FALSE).
 674   */
 675 #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
 676 ((((__FLAG__) >> 8) == 5)? (((__HANDLE__)->Instance->TSR) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
 677  (((__FLAG__) >> 8) == 2)? (((__HANDLE__)->Instance->RF0R) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
 678  (((__FLAG__) >> 8) == 4)? (((__HANDLE__)->Instance->RF1R) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
 679  (((__FLAG__) >> 8) == 1)? (((__HANDLE__)->Instance->MSR) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
 680  (((__HANDLE__)->Instance->ESR) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))))
 681
 682 /** @brief  Check if the specified CAN interrupt source is enabled or disabled.
 683   * @param  __HANDLE__: CAN Handle
 684   * @param  __INTERRUPT__: specifies the CAN interrupt source to check.
 685   *          This parameter can be one of the following values:
 686   *             @arg CAN_IT_TME: Transmit mailbox empty interrupt enable
 687   *             @arg CAN_IT_FMP0: FIFO0 message pending interrupt enablev
 688   *             @arg CAN_IT_FMP1: FIFO1 message pending interrupt enable
 689   * @retval The new state of __IT__ (TRUE or FALSE).
 690   */
 691 #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
 692
 693 /**
 694   * @brief  Check the transmission status of a CAN Frame.
 695   * @param  __HANDLE__: CAN Handle
 696   * @param  __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
 697   * @retval The new status of transmission  (TRUE or FALSE).
 698   */
 699 #define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\
 700 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) == (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) :\
 701  ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) == (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) :\
 702  ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)))
 703
 704
 705
 706 /**
 707   * @brief  Release the specified receive FIFO.
 708   * @param  __HANDLE__: CAN handle
 709   * @param  __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
 710   * @retval None
 711   */
 712 #define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
 713 ((__HANDLE__)->Instance->RF0R |= CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R |= CAN_RF1R_RFOM1))
 714
 715 /**
 716   * @brief  Cancel a transmit request.
 717   * @param  __HANDLE__: CAN Handle
 718   * @param  __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
 719   * @retval None
 720   */
 721 #define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\
 722 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ0) :\
 723  ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ1) :\
 724  ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ2))
 725
 726 /**
 727   * @brief  Enable or disable the DBG Freeze for CAN.
 728   * @param  __HANDLE__: CAN Handle
 729   * @param  __NEWSTATE__: new state of the CAN peripheral.
 730   *          This parameter can be: ENABLE (CAN reception/transmission is frozen
 731   *          during debug. Reception FIFOs can still be accessed/controlled normally)
 732   *          or DISABLE (CAN is working during debug).
 733   * @retval None
 734   */
 735 #define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \
 736 ((__HANDLE__)->Instance->MCR |= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF))
 737
 738 /* Exported functions --------------------------------------------------------*/
 739
 740 /* Initialization/de-initialization functions ***********************************/
 741 HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan);
 742 HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig);
 743 HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan);
 744 void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan);
 745 void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan);
 746
 747 /* I/O operation functions ******************************************************/
 748 HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout);
 749 HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan);
 750 HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout);
 751 HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber);
 752 HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan);
 753 HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
 754
 755 /* Peripheral State functions ***************************************************/
 756 void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan);
 757 uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
 758 HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan);
 759
 760 void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan);
 761 void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan);
 762 void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
 763
 764 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
 765
 766 /**
 767   * @}
 768   */
 769
 770 /**
 771   * @}
 772   */
 773
 774 #ifdef __cplusplus
 775 }
 776 #endif
 777
 778 #endif /* __STM32F4xx_CAN_H */
 779
 780
 781 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/