tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_cortex.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f4xx_hal_cortex.c
   4   * @author  MCD Application Team
   5   * @version V1.1.0
   6   * @date    19-June-2014
   7   * @brief   CORTEX HAL module driver.
   8   *          This file provides firmware functions to manage the following
   9   *          functionalities of the CORTEX:
  10   *           + Initialization and de-initialization functions
  11   *           + Peripheral Control functions
  12   *
  13   @verbatim
  14   ==============================================================================
  15                         ##### How to use this driver #####
  16   ==============================================================================
  17
  18     [..]
  19     *** How to configure Interrupts using CORTEX HAL driver ***
  20     ===========================================================
  21     [..]
  22     This section provides functions allowing to configure the NVIC interrupts (IRQ).
  23     The Cortex-M4 exceptions are managed by CMSIS functions.
  24
  25     (#) Configure the NVIC Priority Grouping using HAL_NVIC_SetPriorityGrouping()
  26         function according to the following table.
  27     (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority().
  28     (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ().
  29     (#) please refer to programing manual for details in how to configure priority.
  30
  31      -@- When the NVIC_PRIORITYGROUP_0 is selected, IRQ pre-emption is no more possible.
  32          The pending IRQ priority will be managed only by the sub priority.
  33
  34      -@- IRQ priority order (sorted by highest to lowest priority):
  35         (+@) Lowest pre-emption priority
  36         (+@) Lowest sub priority
  37         (+@) Lowest hardware priority (IRQ number)
  38
  39     [..]
  40     *** How to configure Systick using CORTEX HAL driver ***
  41     ========================================================
  42     [..]
  43     Setup SysTick Timer for time base.
  44
  45    (+) The HAL_SYSTICK_Config() function calls the SysTick_Config() function which
  46        is a CMSIS function that:
  47         (++) Configures the SysTick Reload register with value passed as function parameter.
  48         (++) Configures the SysTick IRQ priority to the lowest value (0x0F).
  49         (++) Resets the SysTick Counter register.
  50         (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK).
  51         (++) Enables the SysTick Interrupt.
  52         (++) Starts the SysTick Counter.
  53
  54    (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro
  55        __HAL_CORTEX_SYSTICKCLK_CONFIG(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the
  56        HAL_SYSTICK_Config() function call. The __HAL_CORTEX_SYSTICKCLK_CONFIG() macro is defined
  57        inside the stm32f4xx_hal_cortex.h file.
  58
  59    (+) You can change the SysTick IRQ priority by calling the
  60        HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function
  61        call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function.
  62
  63    (+) To adjust the SysTick time base, use the following formula:
  64
  65        Reload Value = SysTick Counter Clock (Hz) x  Desired Time base (s)
  66        (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function
  67        (++) Reload Value should not exceed 0xFFFFFF
  68
  69   @endverbatim
  70   ******************************************************************************
  71   * @attention
  72   *
  73   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  74   *
  75   * Redistribution and use in source and binary forms, with or without modification,
  76   * are permitted provided that the following conditions are met:
  77   *   1. Redistributions of source code must retain the above copyright notice,
  78   *      this list of conditions and the following disclaimer.
  79   *   2. Redistributions in binary form must reproduce the above copyright notice,
  80   *      this list of conditions and the following disclaimer in the documentation
  81   *      and/or other materials provided with the distribution.
  82   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  83   *      may be used to endorse or promote products derived from this software
  84   *      without specific prior written permission.
  85   *
  86   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  87   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  88   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  89   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  90   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  91   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  92   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  93   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  94   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  95   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  96   *
  97   ******************************************************************************
  98   */
  99
 100 /* Includes ------------------------------------------------------------------*/
 101 #include "stm32f4xx_hal.h"
 102
 103 /** @addtogroup STM32F4xx_HAL_Driver
 104   * @{
 105   */
 106
 107 /** @defgroup CORTEX
 108   * @brief CORTEX HAL module driver
 109   * @{
 110   */
 111
 112 #ifdef HAL_CORTEX_MODULE_ENABLED
 113
 114 /* Private typedef -----------------------------------------------------------*/
 115 /* Private define ------------------------------------------------------------*/
 116 /* Private macro -------------------------------------------------------------*/
 117 /* Private variables ---------------------------------------------------------*/
 118 /* Private function prototypes -----------------------------------------------*/
 119 /* Private functions ---------------------------------------------------------*/
 120
 121 /** @defgroup CORTEX_Private_Functions
 122   * @{
 123   */
 124
 125
 126 /** @defgroup CORTEX_Group1 Initialization and de-initialization functions
 127  *  @brief    Initialization and Configuration functions
 128  *
 129 @verbatim
 130   ==============================================================================
 131               ##### Initialization and de-initialization functions #####
 132   ==============================================================================
 133     [..]
 134       This section provides the CORTEX HAL driver functions allowing to configure Interrupts
 135       Systick functionalities
 136
 137 @endverbatim
 138   * @{
 139   */
 140
 141
 142 /**
 143   * @brief  Sets the priority grouping field (pre-emption priority and subpriority)
 144   *         using the required unlock sequence.
 145   * @param  PriorityGroup: The priority grouping bits length.
 146   *         This parameter can be one of the following values:
 147   *         @arg NVIC_PRIORITYGROUP_0: 0 bits for pre-emption priority
 148   *                                    4 bits for subpriority
 149   *         @arg NVIC_PRIORITYGROUP_1: 1 bits for pre-emption priority
 150   *                                    3 bits for subpriority
 151   *         @arg NVIC_PRIORITYGROUP_2: 2 bits for pre-emption priority
 152   *                                    2 bits for subpriority
 153   *         @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority
 154   *                                    1 bits for subpriority
 155   *         @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority
 156   *                                    0 bits for subpriority
 157   * @note   When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible.
 158   *         The pending IRQ priority will be managed only by the subpriority.
 159   * @retval None
 160   */
 161 void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
 162 {
 163   /* Check the parameters */
 164   assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
 165
 166   /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
 167   NVIC_SetPriorityGrouping(PriorityGroup);
 168 }
 169
 170 /**
 171   * @brief  Sets the priority of an interrupt.
 172   * @param  IRQn: External interrupt number.
 173   *         This parameter can be an enumerator of IRQn_Type enumeration
 174   *         (For the complete STM32 Devices IRQ Channels list, please refer to stm32f4xx.h file)
 175   * @param  PreemptPriority: The pre-emption priority for the IRQn channel.
 176   *         This parameter can be a value between 0 and 15
 177   *         A lower priority value indicates a higher priority
 178   * @param  SubPriority: the subpriority level for the IRQ channel.
 179   *         This parameter can be a value between 0 and 15
 180   *         A lower priority value indicates a higher priority.
 181   * @retval None
 182   */
 183 void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
 184 {
 185   uint32_t prioritygroup = 0x00;
 186
 187   /* Check the parameters */
 188   assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
 189   assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
 190
 191   prioritygroup = NVIC_GetPriorityGrouping();
 192
 193   NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
 194 }
 195
 196 /**
 197   * @brief  Enables a device specific interrupt in the NVIC interrupt controller.
 198   * @note   To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
 199   *         function should be called before.
 200   * @param  IRQn External interrupt number.
 201   *         This parameter can be an enumerator of IRQn_Type enumeration
 202   *         (For the complete STM32 Devices IRQ Channels list, please refer to stm32f4xx.h file)
 203   * @retval None
 204   */
 205 void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
 206 {
 207   /* Enable interrupt */
 208   NVIC_EnableIRQ(IRQn);
 209 }
 210
 211 /**
 212   * @brief  Disables a device specific interrupt in the NVIC interrupt controller.
 213   * @param  IRQn External interrupt number.
 214   *         This parameter can be an enumerator of IRQn_Type enumeration
 215   *         (For the complete STM32 Devices IRQ Channels list, please refer to stm32f4xx.h file)
 216   * @retval None
 217   */
 218 void HAL_NVIC_DisableIRQ(IRQn_Type IRQn)
 219 {
 220   /* Disable interrupt */
 221   NVIC_DisableIRQ(IRQn);
 222 }
 223
 224 /**
 225   * @brief  Initiates a system reset request to reset the MCU.
 226   * @param None
 227   * @retval None
 228   */
 229 void HAL_NVIC_SystemReset(void)
 230 {
 231   /* System Reset */
 232   NVIC_SystemReset();
 233 }
 234
 235 /**
 236   * @brief  Initializes the System Timer and its interrupt, and starts the System Tick Timer.
 237   *         Counter is in free running mode to generate periodic interrupts.
 238   * @param  TicksNumb: Specifies the ticks Number of ticks between two interrupts.
 239   * @retval status:  - 0  Function succeeded.
 240   *                  - 1  Function failed.
 241   */
 242 uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
 243 {
 244    return SysTick_Config(TicksNumb);
 245 }
 246 /**
 247   * @}
 248   */
 249
 250 /** @defgroup CORTEX_Group2 Peripheral Control functions
 251  *  @brief   Cortex control functions
 252  *
 253 @verbatim
 254   ==============================================================================
 255                       ##### Peripheral Control functions #####
 256   ==============================================================================
 257     [..]
 258       This subsection provides a set of functions allowing to control the CORTEX
 259       (NVIC, SYSTICK) functionalities.
 260
 261
 262 @endverbatim
 263   * @{
 264   */
 265
 266 /**
 267   * @brief  Gets the priority grouping field from the NVIC Interrupt Controller.
 268   * @param  None
 269   * @retval Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field)
 270   */
 271 uint32_t HAL_NVIC_GetPriorityGrouping(void)
 272 {
 273   /* Get the PRIGROUP[10:8] field value */
 274   return NVIC_GetPriorityGrouping();
 275 }
 276
 277 /**
 278   * @brief  Gets the priority of an interrupt.
 279   * @param  IRQn: External interrupt number.
 280   *         This parameter can be an enumerator of IRQn_Type enumeration
 281   *         (For the complete STM32 Devices IRQ Channels list, please refer to stm32f4xx.h file)
 282   * @param   PriorityGroup: the priority grouping bits length.
 283   *         This parameter can be one of the following values:
 284   *           @arg NVIC_PRIORITYGROUP_0: 0 bits for pre-emption priority
 285   *                                      4 bits for subpriority
 286   *           @arg NVIC_PRIORITYGROUP_1: 1 bits for pre-emption priority
 287   *                                      3 bits for subpriority
 288   *           @arg NVIC_PRIORITYGROUP_2: 2 bits for pre-emption priority
 289   *                                      2 bits for subpriority
 290   *           @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority
 291   *                                      1 bits for subpriority
 292   *           @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority
 293   *                                      0 bits for subpriority
 294   * @param  pPreemptPriority: Pointer on the Preemptive priority value (starting from 0).
 295   * @param  pSubPriority: Pointer on the Subpriority value (starting from 0).
 296   * @retval None
 297   */
 298 void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t *pPreemptPriority, uint32_t *pSubPriority)
 299 {
 300   /* Check the parameters */
 301   assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
 302  /* Get priority for Cortex-M system or device specific interrupts */
 303   NVIC_DecodePriority(NVIC_GetPriority(IRQn), PriorityGroup, pPreemptPriority, pSubPriority);
 304 }
 305
 306 /**
 307   * @brief  Sets Pending bit of an external interrupt.
 308   * @param  IRQn External interrupt number
 309   *         This parameter can be an enumerator of @ref IRQn_Type enumeration
 310   *         (For the complete STM32 Devices IRQ Channels list, please refer to stm32f4xx.h file)
 311   * @retval None
 312   */
 313 void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn)
 314 {
 315   /* Set interrupt pending */
 316   NVIC_SetPendingIRQ(IRQn);
 317 }
 318
 319 /**
 320   * @brief  Gets Pending Interrupt (reads the pending register in the NVIC
 321   *         and returns the pending bit for the specified interrupt).
 322   * @param  IRQn External interrupt number.
 323   *          This parameter can be an enumerator of IRQn_Type enumeration
 324   *          (For the complete STM32 Devices IRQ Channels list, please refer to stm32f4xx.h file)
 325   * @retval status: - 0  Interrupt status is not pending.
 326   *                 - 1  Interrupt status is pending.
 327   */
 328 uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn)
 329 {
 330   /* Return 1 if pending else 0 */
 331   return NVIC_GetPendingIRQ(IRQn);
 332 }
 333
 334 /**
 335   * @brief  Clears the pending bit of an external interrupt.
 336   * @param  IRQn External interrupt number.
 337   *         This parameter can be an enumerator of IRQn_Type enumeration
 338   *         (For the complete STM32 Devices IRQ Channels list, please refer to stm32f4xx.h file)
 339   * @retval None
 340   */
 341 void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn)
 342 {
 343   /* Clear pending interrupt */
 344   NVIC_ClearPendingIRQ(IRQn);
 345 }
 346
 347 /**
 348   * @brief Gets active interrupt ( reads the active register in NVIC and returns the active bit).
 349   * @param IRQn External interrupt number
 350   *         This parameter can be an enumerator of IRQn_Type enumeration
 351   *         (For the complete STM32 Devices IRQ Channels list, please refer to stm32f4xx.h file)
 352   * @retval status: - 0  Interrupt status is not pending.
 353   *                 - 1  Interrupt status is pending.
 354   */
 355 uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn)
 356 {
 357   /* Return 1 if active else 0 */
 358   return NVIC_GetActive(IRQn);
 359 }
 360
 361 /**
 362   * @brief  Configures the SysTick clock source.
 363   * @param  CLKSource: specifies the SysTick clock source.
 364   *          This parameter can be one of the following values:
 365   *             @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source.
 366   *             @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.
 367   * @retval None
 368   */
 369 void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource)
 370 {
 371   /* Check the parameters */
 372   assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource));
 373   if (CLKSource == SYSTICK_CLKSOURCE_HCLK)
 374   {
 375     SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
 376   }
 377   else
 378   {
 379     SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK;
 380   }
 381 }
 382
 383 /**
 384   * @brief  This function handles SYSTICK interrupt request.
 385   * @param  None
 386   * @retval None
 387   */
 388 void HAL_SYSTICK_IRQHandler(void)
 389 {
 390   HAL_SYSTICK_Callback();
 391 }
 392
 393 /**
 394   * @brief  SYSTICK callback.
 395   * @param  None
 396   * @retval None
 397   */
 398 __weak void HAL_SYSTICK_Callback(void)
 399 {
 400   /* NOTE : This function Should not be modified, when the callback is needed,
 401             the HAL_SYSTICK_Callback could be implemented in the user file
 402    */
 403 }
 404
 405 /**
 406   * @}
 407   */
 408
 409 /**
 410   * @}
 411   */
 412
 413 #endif /* HAL_CORTEX_MODULE_ENABLED */
 414 /**
 415   * @}
 416   */
 417
 418 /**
 419   * @}
 420   */
 421
 422 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/