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[tmk_keyboard.git] / tool / mbed / mbed-sdk / libraries / mbed / targets / cmsis / TARGET_STM / TARGET_STM32F4 / stm32f4xx_hal_flash_ex.c
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_flash_ex.c
4 * @author MCD Application Team
5 * @version V1.1.0
6 * @date 19-June-2014
7 * @brief Extended FLASH HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the FLASH extension peripheral:
10 * + Extended programming operations functions
11 *
12 @verbatim
13 ==============================================================================
14 ##### Flash Extension features #####
15 ==============================================================================
16
17 [..] Comparing to other previous devices, the FLASH interface for STM32F427xx/437xx and
18 STM32F429xx/439xx devices contains the following additional features
19
20 (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write
21 capability (RWW)
22 (+) Dual bank memory organization
23 (+) PCROP protection for all banks
24
25 ##### How to use this driver #####
26 ==============================================================================
27 [..] This driver provides functions to configure and program the FLASH memory
28 of all STM32F427xx/437xx andSTM32F429xx/439xx devices. It includes
29 (#) FLASH Memory Erase functions:
30 (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and
31 HAL_FLASH_Lock() functions
32 (++) Erase function: Erase sector, erase all sectors
33 (++) There are two modes of erase :
34 (+++) Polling Mode using HAL_FLASHEx_Erase()
35 (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT()
36
37 (#) Option Bytes Programming functions: Use HAL_FLASHEx_OBProgram() to :
38 (++) Set/Reset the write protection
39 (++) Set the Read protection Level
40 (++) Set the BOR level
41 (++) Program the user Option Bytes
42 (#) Advanced Option Bytes Programming functions: Use HAL_FLASHEx_AdvOBProgram() to :
43 (++) Extended space (bank 2) erase function
44 (++) Full FLASH space (2 Mo) erase (bank 1 and bank 2)
45 (++) Dual Boot actrivation
46 (++) Write protection configuration for bank 2
47 (++) PCROP protection configuration and control for both banks
48
49 @endverbatim
50 ******************************************************************************
51 * @attention
52 *
53 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
54 *
55 * Redistribution and use in source and binary forms, with or without modification,
56 * are permitted provided that the following conditions are met:
57 * 1. Redistributions of source code must retain the above copyright notice,
58 * this list of conditions and the following disclaimer.
59 * 2. Redistributions in binary form must reproduce the above copyright notice,
60 * this list of conditions and the following disclaimer in the documentation
61 * and/or other materials provided with the distribution.
62 * 3. Neither the name of STMicroelectronics nor the names of its contributors
63 * may be used to endorse or promote products derived from this software
64 * without specific prior written permission.
65 *
66 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
67 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
68 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
69 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
70 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
71 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
72 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
73 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
74 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
75 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
76 *
77 ******************************************************************************
78 */
79
80 /* Includes ------------------------------------------------------------------*/
81 #include "stm32f4xx_hal.h"
82
83 /** @addtogroup STM32F4xx_HAL_Driver
84 * @{
85 */
86
87 /** @defgroup FLASHEx
88 * @brief FLASH HAL Extension module driver
89 * @{
90 */
91
92 #ifdef HAL_FLASH_MODULE_ENABLED
93
94 /* Private typedef -----------------------------------------------------------*/
95 /* Private define ------------------------------------------------------------*/
96 #define SECTOR_MASK ((uint32_t)0xFFFFFF07)
97
98 #define HAL_FLASH_TIMEOUT_VALUE ((uint32_t)50000)/* 50 s */
99 /* Private macro -------------------------------------------------------------*/
100 /* Private variables ---------------------------------------------------------*/
101 extern FLASH_ProcessTypeDef pFlash;
102
103 /* Private function prototypes -----------------------------------------------*/
104 /* Option bytes control */
105 static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks);
106 static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks);
107 static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks);
108 static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level);
109 static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby);
110 static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level);
111 static uint8_t FLASH_OB_GetUser(void);
112 static uint16_t FLASH_OB_GetWRP(void);
113 static FlagStatus FLASH_OB_GetRDP(void);
114 static uint8_t FLASH_OB_GetBOR(void);
115
116 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
117 static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector);
118 static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector);
119 #endif /* STM32F401xC || STM32F401xE || STM32F411xE */
120
121 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
122 static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
123 static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
124 static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig);
125 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
126
127 /* Private functions ---------------------------------------------------------*/
128 extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
129
130 /** @defgroup FLASHEx_Private_Functions Extended FLASH Private functions
131 * @{
132 */
133
134 /** @defgroup FLASHEx_Group1 Extended IO operation functions
135 * @brief Extended IO operation functions
136 *
137 @verbatim
138 ===============================================================================
139 ##### Extended programming operation functions #####
140 ===============================================================================
141 [..]
142 This subsection provides a set of functions allowing to manage the Extension FLASH
143 programming operations Operations.
144
145 @endverbatim
146 * @{
147 */
148 /**
149 * @brief Perform a mass erase or erase the specified FLASH memory sectors
150 * @param[in] pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
151 * contains the configuration information for the erasing.
152 *
153 * @param[out] SectorError: pointer to variable that
154 * contains the configuration information on faulty sector in case of error
155 * (0xFFFFFFFF means that all the sectors have been correctly erased)
156 *
157 * @retval HAL Status
158 */
159 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError)
160 {
161 HAL_StatusTypeDef status = HAL_ERROR;
162 uint32_t index = 0;
163
164 /* Process Locked */
165 __HAL_LOCK(&pFlash);
166
167 /* Check the parameters */
168 assert_param(IS_TYPEERASE(pEraseInit->TypeErase));
169
170 /* Wait for last operation to be completed */
171 status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
172
173 if (status == HAL_OK)
174 {
175 /*Initialization of SectorError variable*/
176 *SectorError = 0xFFFFFFFF;
177
178 if (pEraseInit->TypeErase == TYPEERASE_MASSERASE)
179 {
180 /*Mass erase to be done*/
181 FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
182
183 /* Wait for last operation to be completed */
184 status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
185
186 /* if the erase operation is completed, disable the MER Bit */
187 FLASH->CR &= (~FLASH_MER_BIT);
188 }
189 else
190 {
191 /* Check the parameters */
192 assert_param(IS_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
193
194 /* Erase by sector by sector to be done*/
195 for(index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++)
196 {
197 FLASH_Erase_Sector(index, (uint8_t) pEraseInit->VoltageRange);
198
199 /* Wait for last operation to be completed */
200 status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
201
202 /* If the erase operation is completed, disable the SER Bit */
203 FLASH->CR &= (~FLASH_CR_SER);
204 FLASH->CR &= SECTOR_MASK;
205
206 if (status != HAL_OK)
207 {
208 /* In case of error, stop erase procedure and return the faulty sector*/
209 *SectorError = index;
210 break;
211 }
212 }
213 }
214 }
215
216 /* Process Unlocked */
217 __HAL_UNLOCK(&pFlash);
218
219 return status;
220 }
221
222 /**
223 * @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled
224 * @param pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
225 * contains the configuration information for the erasing.
226 *
227 * @retval HAL Status
228 */
229 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
230 {
231 HAL_StatusTypeDef status = HAL_OK;
232
233 /* Process Locked */
234 __HAL_LOCK(&pFlash);
235
236 /* Check the parameters */
237 assert_param(IS_TYPEERASE(pEraseInit->TypeErase));
238
239 /* Enable End of FLASH Operation interrupt */
240 __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP);
241
242 /* Enable Error source interrupt */
243 __HAL_FLASH_ENABLE_IT(FLASH_IT_ERR);
244
245 /* Clear pending flags (if any) */
246 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |\
247 FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR| FLASH_FLAG_PGSERR);
248
249 if (pEraseInit->TypeErase == TYPEERASE_MASSERASE)
250 {
251 /*Mass erase to be done*/
252 pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE;
253 pFlash.Bank = pEraseInit->Banks;
254 FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
255 }
256 else
257 {
258 /* Erase by sector to be done*/
259
260 /* Check the parameters */
261 assert_param(IS_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
262
263 pFlash.ProcedureOnGoing = FLASH_PROC_SECTERASE;
264 pFlash.NbSectorsToErase = pEraseInit->NbSectors;
265 pFlash.Sector = pEraseInit->Sector;
266 pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange;
267
268 /*Erase 1st sector and wait for IT*/
269 FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->VoltageRange);
270 }
271
272 return status;
273 }
274
275 /**
276 * @brief Program option bytes
277 * @param pOBInit: pointer to an FLASH_OBInitStruct structure that
278 * contains the configuration information for the programming.
279 *
280 * @retval HAL Status
281 */
282 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
283 {
284 HAL_StatusTypeDef status = HAL_ERROR;
285
286 /* Process Locked */
287 __HAL_LOCK(&pFlash);
288
289 /* Check the parameters */
290 assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
291
292 /*Write protection configuration*/
293 if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
294 {
295 assert_param(IS_WRPSTATE(pOBInit->WRPState));
296 if (pOBInit->WRPState == WRPSTATE_ENABLE)
297 {
298 /*Enable of Write protection on the selected Sector*/
299 status = FLASH_OB_EnableWRP(pOBInit->WRPSector, pOBInit->Banks);
300 }
301 else
302 {
303 /*Disable of Write protection on the selected Sector*/
304 status = FLASH_OB_DisableWRP(pOBInit->WRPSector, pOBInit->Banks);
305 }
306 }
307
308 /*Read protection configuration*/
309 if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP)
310 {
311 status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel);
312 }
313
314 /*USER configuration*/
315 if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER)
316 {
317 status = FLASH_OB_UserConfig(pOBInit->USERConfig&OB_IWDG_SW,
318 pOBInit->USERConfig&OB_STOP_NO_RST,
319 pOBInit->USERConfig&OB_STDBY_NO_RST);
320 }
321
322 /*BOR Level configuration*/
323 if((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR)
324 {
325 status = FLASH_OB_BOR_LevelConfig(pOBInit->BORLevel);
326 }
327
328 /* Process Unlocked */
329 __HAL_UNLOCK(&pFlash);
330
331 return status;
332 }
333
334 /**
335 * @brief Get the Option byte configuration
336 * @param pOBInit: pointer to an FLASH_OBInitStruct structure that
337 * contains the configuration information for the programming.
338 *
339 * @retval None
340 */
341 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
342 {
343 pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_BOR;
344
345 /*Get WRP*/
346 pOBInit->WRPSector = FLASH_OB_GetWRP();
347
348 /*Get RDP Level*/
349 pOBInit->RDPLevel = FLASH_OB_GetRDP();
350
351 /*Get USER*/
352 pOBInit->USERConfig = FLASH_OB_GetUser();
353
354 /*Get BOR Level*/
355 pOBInit->BORLevel = FLASH_OB_GetBOR();
356 }
357
358 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
359 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
360 /**
361 * @brief Program option bytes
362 * @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that
363 * contains the configuration information for the programming.
364 *
365 * @retval HAL Status
366 */
367 HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
368 {
369 HAL_StatusTypeDef status = HAL_ERROR;
370
371 /* Check the parameters */
372 assert_param(IS_OBEX(pAdvOBInit->OptionType));
373
374 /*Program PCROP option byte*/
375 if (((pAdvOBInit->OptionType) & OBEX_PCROP) == OBEX_PCROP)
376 {
377 /* Check the parameters */
378 assert_param(IS_PCROPSTATE(pAdvOBInit->PCROPState));
379 if ((pAdvOBInit->PCROPState) == PCROPSTATE_ENABLE)
380 {
381 /*Enable of Write protection on the selected Sector*/
382 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
383 status = FLASH_OB_EnablePCROP(pAdvOBInit->Sectors);
384 #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
385 status = FLASH_OB_EnablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
386 #endif /* STM32F401xC || STM32F401xE || STM32F411xE */
387 }
388 else
389 {
390 /*Disable of Write protection on the selected Sector*/
391 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
392 status = FLASH_OB_DisablePCROP(pAdvOBInit->Sectors);
393 #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
394 status = FLASH_OB_DisablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
395 #endif /* STM32F401xC || STM32F401xE || STM32F411xE */
396 }
397 }
398
399 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
400 /*Program BOOT config option byte*/
401 if (((pAdvOBInit->OptionType) & OBEX_BOOTCONFIG) == OBEX_BOOTCONFIG)
402 {
403 status = FLASH_OB_BootConfig(pAdvOBInit->BootConfig);
404 }
405 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
406
407 return status;
408 }
409
410 /**
411 * @brief Get the OBEX byte configuration
412 * @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that
413 * contains the configuration information for the programming.
414 *
415 * @retval None
416 */
417 void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
418 {
419 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
420 /*Get Sector*/
421 pAdvOBInit->Sectors = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
422 #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
423 /*Get Sector for Bank1*/
424 pAdvOBInit->SectorsBank1 = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
425
426 /*Get Sector for Bank2*/
427 pAdvOBInit->SectorsBank2 = (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
428
429 /*Get Boot config OB*/
430 pAdvOBInit->BootConfig = *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS;
431 #endif /* STM32F401xC || STM32F401xE || STM32F411xE */
432 }
433
434 /**
435 * @brief Select the Protection Mode
436 *
437 * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
438 * Global Read Out Protection modification (from level1 to level0)
439 * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
440 * @note Read a prtotected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
441 * @note This function can be used only for STM32F427xx/STM32F429xx/STM32F437xx/STM32F439xx/STM32F401xx devices.
442 *
443 * @param None
444 * @retval HAL Status
445 */
446 HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void)
447 {
448 uint8_t optiontmp = 0xFF;
449
450 /* Mask SPRMOD bit */
451 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
452
453 /* Update Option Byte */
454 *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_SELECTED | optiontmp);
455
456 return HAL_OK;
457
458 }
459
460 /**
461 * @brief Deselect the Protection Mode
462 *
463 * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
464 * Global Read Out Protection modification (from level1 to level0)
465 * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
466 * @note Read a prtotected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
467 * @note This function can be used only for STM32F427xx/STM32F429xx/STM32F437xx/STM32F439xx/STM32F401xx devices.
468 *
469 * @param None
470 * @retval HAL Status
471 */
472 HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void)
473 {
474 uint8_t optiontmp = 0xFF;
475
476 /* Mask SPRMOD bit */
477 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
478
479 /* Update Option Byte */
480 *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_DESELECTED | optiontmp);
481
482 return HAL_OK;
483 }
484
485 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE */
486
487 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
488
489 /**
490 * @brief Returns the FLASH Write Protection Option Bytes value for Bank 2
491 * @note This function can be used only for STM32F427X and STM32F429X devices.
492 * @param None
493 * @retval The FLASH Write Protection Option Bytes value
494 */
495 uint16_t HAL_FLASHEx_OB_GetBank2WRP(void)
496 {
497 /* Return the FLASH write protection Register value */
498 return (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
499 }
500 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
501
502 /**
503 * @}
504 */
505
506 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
507 /**
508 * @brief Full erase of FLASH memory sectors
509 * @param VoltageRange: The device voltage range which defines the erase parallelism.
510 * This parameter can be one of the following values:
511 * @arg VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
512 * the operation will be done by byte (8-bit)
513 * @arg VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
514 * the operation will be done by half word (16-bit)
515 * @arg VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
516 * the operation will be done by word (32-bit)
517 * @arg VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
518 * the operation will be done by double word (64-bit)
519 *
520 * @param Banks: Banks to be erased
521 * This parameter can be one of the following values:
522 * @arg FLASH_BANK_1: Bank1 to be erased
523 * @arg FLASH_BANK_2: Bank2 to be erased
524 * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
525 *
526 * @retval HAL Status
527 */
528 static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
529 {
530 uint32_t tmp_psize = 0;
531
532 /* Check the parameters */
533 assert_param(IS_VOLTAGERANGE(VoltageRange));
534 assert_param(IS_FLASH_BANK(Banks));
535
536 /* if the previous operation is completed, proceed to erase all sectors */
537 FLASH->CR &= CR_PSIZE_MASK;
538 FLASH->CR |= tmp_psize;
539 if(Banks == FLASH_BANK_BOTH)
540 {
541 /* bank1 & bank2 will be erased*/
542 FLASH->CR |= FLASH_MER_BIT;
543 }
544 else if(Banks == FLASH_BANK_1)
545 {
546 /*Only bank1 will be erased*/
547 FLASH->CR |= FLASH_CR_MER1;
548 }
549 else
550 {
551 /*Only bank2 will be erased*/
552 FLASH->CR |= FLASH_CR_MER2;
553 }
554 FLASH->CR |= FLASH_CR_STRT;
555 }
556
557 /**
558 * @brief Erase the specified FLASH memory sector
559 * @param Sector: FLASH sector to erase
560 * The value of this parameter depend on device used within the same series
561 * @param VoltageRange: The device voltage range which defines the erase parallelism.
562 * This parameter can be one of the following values:
563 * @arg VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
564 * the operation will be done by byte (8-bit)
565 * @arg VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
566 * the operation will be done by half word (16-bit)
567 * @arg VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
568 * the operation will be done by word (32-bit)
569 * @arg VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
570 * the operation will be done by double word (64-bit)
571 *
572 * @retval None
573 */
574 void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
575 {
576 uint32_t tmp_psize = 0;
577
578 /* Check the parameters */
579 assert_param(IS_FLASH_SECTOR(Sector));
580 assert_param(IS_VOLTAGERANGE(VoltageRange));
581
582 if(VoltageRange == VOLTAGE_RANGE_1)
583 {
584 tmp_psize = FLASH_PSIZE_BYTE;
585 }
586 else if(VoltageRange == VOLTAGE_RANGE_2)
587 {
588 tmp_psize = FLASH_PSIZE_HALF_WORD;
589 }
590 else if(VoltageRange == VOLTAGE_RANGE_3)
591 {
592 tmp_psize = FLASH_PSIZE_WORD;
593 }
594 else
595 {
596 tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
597 }
598
599 /* Need to add offset of 4 when sector higher than FLASH_SECTOR_11 */
600 if (Sector > FLASH_SECTOR_11)
601 {
602 Sector += 4;
603 }
604 /* If the previous operation is completed, proceed to erase the sector */
605 FLASH->CR &= CR_PSIZE_MASK;
606 FLASH->CR |= tmp_psize;
607 FLASH->CR &= SECTOR_MASK;
608 FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
609 FLASH->CR |= FLASH_CR_STRT;
610 }
611
612 /**
613 * @brief Enable the write protection of the desired bank1 or bank 2 sectors
614 *
615 * @note When the memory read protection level is selected (RDP level = 1),
616 * it is not possible to program or erase the flash sector i if CortexM4
617 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
618 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
619 *
620 * @param WRPSector: specifies the sector(s) to be write protected.
621 * This parameter can be one of the following values:
622 * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
623 * @arg OB_WRP_SECTOR_All
624 * @note BANK2 starts from OB_WRP_SECTOR_12
625 *
626 * @param Banks: Enable write protection on all the sectors for the specific bank
627 * This parameter can be one of the following values:
628 * @arg FLASH_BANK_1: WRP on all sectors of bank1
629 * @arg FLASH_BANK_2: WRP on all sectors of bank2
630 * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
631 *
632 * @retval HAL FLASH State
633 */
634 static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
635 {
636 HAL_StatusTypeDef status = HAL_OK;
637
638 /* Check the parameters */
639 assert_param(IS_OB_WRP_SECTOR(WRPSector));
640 assert_param(IS_FLASH_BANK(Banks));
641
642 /* Wait for last operation to be completed */
643 status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
644
645 if(status == HAL_OK)
646 {
647 if (((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
648 (WRPSector < OB_WRP_SECTOR_12))
649 {
650 if (WRPSector == OB_WRP_SECTOR_All)
651 {
652 /*Write protection on all sector of BANK1*/
653 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~(WRPSector>>12));
654 }
655 else
656 {
657 /*Write protection done on sectors of BANK1*/
658 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
659 }
660 }
661 else
662 {
663 /*Write protection done on sectors of BANK2*/
664 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));
665 }
666
667 /*Write protection on all sector of BANK2*/
668 if ((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
669 {
670 /* Wait for last operation to be completed */
671 status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
672
673 if(status == HAL_OK)
674 {
675 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));
676 }
677 }
678
679 }
680
681 return status;
682 }
683
684 /**
685 * @brief Disable the write protection of the desired bank1 or bank 2 sectors
686 *
687 * @note When the memory read protection level is selected (RDP level = 1),
688 * it is not possible to program or erase the flash sector i if CortexM4
689 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
690 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
691 *
692 * @param WRPSector: specifies the sector(s) to be write protected.
693 * This parameter can be one of the following values:
694 * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
695 * @arg OB_WRP_Sector_All
696 * @note BANK2 starts from OB_WRP_SECTOR_12
697 *
698 * @param Banks: Disable write protection on all the sectors for the specific bank
699 * This parameter can be one of the following values:
700 * @arg FLASH_BANK_1: Bank1 to be erased
701 * @arg FLASH_BANK_2: Bank2 to be erased
702 * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
703 *
704 * @retval HAL Staus
705 */
706 static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
707 {
708 HAL_StatusTypeDef status = HAL_OK;
709
710 /* Check the parameters */
711 assert_param(IS_OB_WRP_SECTOR(WRPSector));
712 assert_param(IS_FLASH_BANK(Banks));
713
714 /* Wait for last operation to be completed */
715 status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
716
717 if(status == HAL_OK)
718 {
719 if (((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
720 (WRPSector < OB_WRP_SECTOR_12))
721 {
722 if (WRPSector == OB_WRP_SECTOR_All)
723 {
724 /*Write protection on all sector of BANK1*/
725 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
726 }
727 else
728 {
729 /*Write protection done on sectors of BANK1*/
730 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
731 }
732 }
733 else
734 {
735 /*Write protection done on sectors of BANK2*/
736 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
737 }
738
739 /*Write protection on all sector of BANK2*/
740 if ((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
741 {
742 /* Wait for last operation to be completed */
743 status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
744
745 if(status == HAL_OK)
746 {
747 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
748 }
749 }
750
751 }
752
753 return status;
754 }
755
756 /**
757 * @brief Configure the Dual Bank Boot.
758 *
759 * @note This function can be used only for STM32F42xxx/43xxx devices.
760 *
761 * @param BootConfig specifies the Dual Bank Boot Option byte.
762 * This parameter can be one of the following values:
763 * @arg OB_Dual_BootEnabled: Dual Bank Boot Enable
764 * @arg OB_Dual_BootDisabled: Dual Bank Boot Disabled
765 * @retval None
766 */
767 static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig)
768 {
769 HAL_StatusTypeDef status = HAL_OK;
770
771 /* Check the parameters */
772 assert_param(IS_OB_BOOT(BootConfig));
773
774 /* Wait for last operation to be completed */
775 status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
776
777 if(status == HAL_OK)
778 {
779 /* Set Dual Bank Boot */
780 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BFB2);
781 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= BootConfig;
782 }
783
784 return status;
785 }
786
787 /**
788 * @brief Enable the read/write protection (PCROP) of the desired
789 * sectors of Bank 1 and/or Bank 2.
790 * @note This function can be used only for STM32F42xxx/43xxx devices.
791 * @param SectorBank1 Specifies the sector(s) to be read/write protected or unprotected for bank1.
792 * This parameter can be one of the following values:
793 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
794 * @arg OB_PCROP_SECTOR__All
795 * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
796 * This parameter can be one of the following values:
797 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
798 * @arg OB_PCROP_SECTOR__All
799 * @param Banks Enable PCROP protection on all the sectors for the specific bank
800 * This parameter can be one of the following values:
801 * @arg FLASH_BANK_1: WRP on all sectors of bank1
802 * @arg FLASH_BANK_2: WRP on all sectors of bank2
803 * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
804 *
805 * @retval HAL Status
806 */
807 static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
808 {
809 HAL_StatusTypeDef status = HAL_OK;
810
811 assert_param(IS_FLASH_BANK(Banks));
812
813 /* Wait for last operation to be completed */
814 status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
815
816 if(status == HAL_OK)
817 {
818 if ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
819 {
820 assert_param(IS_OB_PCROP(SectorBank1));
821 /*Write protection done on sectors of BANK1*/
822 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)SectorBank1;
823 }
824 else
825 {
826 assert_param(IS_OB_PCROP(SectorBank2));
827 /*Write protection done on sectors of BANK2*/
828 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
829 }
830
831 /*Write protection on all sector of BANK2*/
832 if (Banks == FLASH_BANK_BOTH)
833 {
834 assert_param(IS_OB_PCROP(SectorBank2));
835 /* Wait for last operation to be completed */
836 status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
837
838 if(status == HAL_OK)
839 {
840 /*Write protection done on sectors of BANK2*/
841 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
842 }
843 }
844
845 }
846
847 return status;
848 }
849
850
851 /**
852 * @brief Disable the read/write protection (PCROP) of the desired
853 * sectors of Bank 1 and/or Bank 2.
854 * @note This function can be used only for STM32F42xxx/43xxx devices.
855 * @param SectorBank1 specifies the sector(s) to be read/write protected or unprotected for bank1.
856 * This parameter can be one of the following values:
857 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
858 * @arg OB_PCROP_SECTOR__All
859 * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
860 * This parameter can be one of the following values:
861 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
862 * @arg OB_PCROP_SECTOR__All
863 * @param Banks Disable PCROP protection on all the sectors for the specific bank
864 * This parameter can be one of the following values:
865 * @arg FLASH_BANK_1: WRP on all sectors of bank1
866 * @arg FLASH_BANK_2: WRP on all sectors of bank2
867 * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
868 *
869 * @retval HAL Status
870 */
871 static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
872 {
873 HAL_StatusTypeDef status = HAL_OK;
874
875 /* Check the parameters */
876 assert_param(IS_FLASH_BANK(Banks));
877
878 /* Wait for last operation to be completed */
879 status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
880
881 if(status == HAL_OK)
882 {
883 if ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
884 {
885 assert_param(IS_OB_PCROP(SectorBank1));
886 /*Write protection done on sectors of BANK1*/
887 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~SectorBank1);
888 }
889 else
890 {
891 /*Write protection done on sectors of BANK2*/
892 assert_param(IS_OB_PCROP(SectorBank2));
893 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
894 }
895
896 /*Write protection on all sector of BANK2*/
897 if (Banks == FLASH_BANK_BOTH)
898 {
899 assert_param(IS_OB_PCROP(SectorBank2));
900 /* Wait for last operation to be completed */
901 status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
902
903 if(status == HAL_OK)
904 {
905 /*Write protection done on sectors of BANK2*/
906 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
907 }
908 }
909
910 }
911
912 return status;
913
914 }
915
916 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
917
918 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx) ||\
919 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
920 /**
921 * @brief Mass erase of FLASH memory
922 * @param VoltageRange: The device voltage range which defines the erase parallelism.
923 * This parameter can be one of the following values:
924 * @arg VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
925 * the operation will be done by byte (8-bit)
926 * @arg VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
927 * the operation will be done by half word (16-bit)
928 * @arg VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
929 * the operation will be done by word (32-bit)
930 * @arg VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
931 * the operation will be done by double word (64-bit)
932 *
933 * @param Banks: Banks to be erased
934 * This parameter can be one of the following values:
935 * @arg FLASH_BANK_1: Bank1 to be erased
936 *
937 * @retval None
938 */
939 static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
940 {
941 uint32_t tmp_psize = 0;
942
943 /* Check the parameters */
944 assert_param(IS_VOLTAGERANGE(VoltageRange));
945 assert_param(IS_FLASH_BANK(Banks));
946
947 /* If the previous operation is completed, proceed to erase all sectors */
948 FLASH->CR &= CR_PSIZE_MASK;
949 FLASH->CR |= tmp_psize;
950 FLASH->CR |= FLASH_CR_MER;
951 FLASH->CR |= FLASH_CR_STRT;
952 }
953
954 /**
955 * @brief Erase the specified FLASH memory sector
956 * @param Sector: FLASH sector to erase
957 * The value of this parameter depend on device used within the same series
958 * @param VoltageRange: The device voltage range which defines the erase parallelism.
959 * This parameter can be one of the following values:
960 * @arg VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
961 * the operation will be done by byte (8-bit)
962 * @arg VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
963 * the operation will be done by half word (16-bit)
964 * @arg VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
965 * the operation will be done by word (32-bit)
966 * @arg VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
967 * the operation will be done by double word (64-bit)
968 *
969 * @retval None
970 */
971 void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
972 {
973 uint32_t tmp_psize = 0;
974
975 /* Check the parameters */
976 assert_param(IS_FLASH_SECTOR(Sector));
977 assert_param(IS_VOLTAGERANGE(VoltageRange));
978
979 if(VoltageRange == VOLTAGE_RANGE_1)
980 {
981 tmp_psize = FLASH_PSIZE_BYTE;
982 }
983 else if(VoltageRange == VOLTAGE_RANGE_2)
984 {
985 tmp_psize = FLASH_PSIZE_HALF_WORD;
986 }
987 else if(VoltageRange == VOLTAGE_RANGE_3)
988 {
989 tmp_psize = FLASH_PSIZE_WORD;
990 }
991 else
992 {
993 tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
994 }
995
996 /* If the previous operation is completed, proceed to erase the sector */
997 FLASH->CR &= CR_PSIZE_MASK;
998 FLASH->CR |= tmp_psize;
999 FLASH->CR &= SECTOR_MASK;
1000 FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
1001 FLASH->CR |= FLASH_CR_STRT;
1002 }
1003
1004 /**
1005 * @brief Enable the write protection of the desired bank 1 sectors
1006 *
1007 * @note When the memory read protection level is selected (RDP level = 1),
1008 * it is not possible to program or erase the flash sector i if CortexM4
1009 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
1010 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
1011 *
1012 * @param WRPSector: specifies the sector(s) to be write protected.
1013 * The value of this parameter depend on device used within the same series
1014 *
1015 * @param Banks: Enable write protection on all the sectors for the specific bank
1016 * This parameter can be one of the following values:
1017 * @arg FLASH_BANK_1: WRP on all sectors of bank1
1018 *
1019 * @retval HAL Status
1020 */
1021 static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
1022 {
1023 HAL_StatusTypeDef status = HAL_OK;
1024
1025 /* Check the parameters */
1026 assert_param(IS_OB_WRP_SECTOR(WRPSector));
1027 assert_param(IS_FLASH_BANK(Banks));
1028
1029 /* Wait for last operation to be completed */
1030 status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
1031
1032 if(status == HAL_OK)
1033 {
1034 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
1035 }
1036
1037 return status;
1038 }
1039
1040 /**
1041 * @brief Disable the write protection of the desired bank 1 sectors
1042 *
1043 * @note When the memory read protection level is selected (RDP level = 1),
1044 * it is not possible to program or erase the flash sector i if CortexM4
1045 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
1046 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
1047 *
1048 * @param WRPSector: specifies the sector(s) to be write protected.
1049 * The value of this parameter depend on device used within the same series
1050 *
1051 * @param Banks: Enable write protection on all the sectors for the specific bank
1052 * This parameter can be one of the following values:
1053 * @arg FLASH_BANK_1: WRP on all sectors of bank1
1054 *
1055 * @retval HAL Status
1056 */
1057 static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
1058 {
1059 HAL_StatusTypeDef status = HAL_OK;
1060
1061 /* Check the parameters */
1062 assert_param(IS_OB_WRP_SECTOR(WRPSector));
1063 assert_param(IS_FLASH_BANK(Banks));
1064
1065 /* Wait for last operation to be completed */
1066 status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
1067
1068 if(status == HAL_OK)
1069 {
1070 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
1071 }
1072
1073 return status;
1074 }
1075 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F411xE */
1076
1077 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
1078 /**
1079 * @brief Enable the read/write protection (PCROP) of the desired sectors.
1080 * @note This function can be used only for STM32F401xx devices.
1081 * @param Sector specifies the sector(s) to be read/write protected or unprotected.
1082 * This parameter can be one of the following values:
1083 * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
1084 * @arg OB_PCROP_Sector_All
1085 * @retval HAL Status
1086 */
1087 static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector)
1088 {
1089 HAL_StatusTypeDef status = HAL_OK;
1090
1091 /* Check the parameters */
1092 assert_param(IS_OB_PCROP(Sector));
1093
1094 /* Wait for last operation to be completed */
1095 status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
1096
1097 if(status == HAL_OK)
1098 {
1099 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)Sector;
1100 }
1101
1102 return status;
1103 }
1104
1105
1106 /**
1107 * @brief Disable the read/write protection (PCROP) of the desired sectors.
1108 * @note This function can be used only for STM32F401xx devices.
1109 * @param Sector specifies the sector(s) to be read/write protected or unprotected.
1110 * This parameter can be one of the following values:
1111 * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
1112 * @arg OB_PCROP_Sector_All
1113 * @retval HAL Status
1114 */
1115 static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector)
1116 {
1117 HAL_StatusTypeDef status = HAL_OK;
1118
1119 /* Check the parameters */
1120 assert_param(IS_OB_PCROP(Sector));
1121
1122 /* Wait for last operation to be completed */
1123 status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
1124
1125 if(status == HAL_OK)
1126 {
1127 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~Sector);
1128 }
1129
1130 return status;
1131
1132 }
1133 #endif /* STM32F401xC || STM32F401xE || STM32F411xE */
1134
1135 /**
1136 * @brief Set the read protection level.
1137 * @param Level: specifies the read protection level.
1138 * This parameter can be one of the following values:
1139 * @arg OB_RDP_LEVEL_0: No protection
1140 * @arg OB_RDP_LEVEL_1: Read protection of the memory
1141 * @arg OB_RDP_LEVEL_2: Full chip protection
1142 *
1143 * @note WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
1144 *
1145 * @retval HAL Status
1146 */
1147 static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level)
1148 {
1149 HAL_StatusTypeDef status = HAL_OK;
1150
1151 /* Check the parameters */
1152 assert_param(IS_OB_RDP_LEVEL(Level));
1153
1154 /* Wait for last operation to be completed */
1155 status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
1156
1157 if(status == HAL_OK)
1158 {
1159 *(__IO uint8_t*)OPTCR_BYTE1_ADDRESS = Level;
1160 }
1161
1162 return status;
1163 }
1164
1165 /**
1166 * @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
1167 * @param Iwdg: Selects the IWDG mode
1168 * This parameter can be one of the following values:
1169 * @arg OB_IWDG_SW: Software IWDG selected
1170 * @arg OB_IWDG_HW: Hardware IWDG selected
1171 * @param Stop: Reset event when entering STOP mode.
1172 * This parameter can be one of the following values:
1173 * @arg OB_STOP_NO_RST: No reset generated when entering in STOP
1174 * @arg OB_STOP_RST: Reset generated when entering in STOP
1175 * @param Stdby: Reset event when entering Standby mode.
1176 * This parameter can be one of the following values:
1177 * @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY
1178 * @arg OB_STDBY_RST: Reset generated when entering in STANDBY
1179 * @retval HAL Status
1180 */
1181 static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby)
1182 {
1183 uint8_t optiontmp = 0xFF;
1184 HAL_StatusTypeDef status = HAL_OK;
1185
1186 /* Check the parameters */
1187 assert_param(IS_OB_IWDG_SOURCE(Iwdg));
1188 assert_param(IS_OB_STOP_SOURCE(Stop));
1189 assert_param(IS_OB_STDBY_SOURCE(Stdby));
1190
1191 /* Wait for last operation to be completed */
1192 status = FLASH_WaitForLastOperation((uint32_t)HAL_FLASH_TIMEOUT_VALUE);
1193
1194 if(status == HAL_OK)
1195 {
1196 /* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */
1197 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1F);
1198
1199 /* Update User Option Byte */
1200 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS = Iwdg | (uint8_t)(Stdby | (uint8_t)(Stop | ((uint8_t)optiontmp)));
1201 }
1202
1203 return status;
1204
1205 }
1206
1207 /**
1208 * @brief Set the BOR Level.
1209 * @param Level: specifies the Option Bytes BOR Reset Level.
1210 * This parameter can be one of the following values:
1211 * @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
1212 * @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
1213 * @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
1214 * @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V
1215 * @retval HAL Status
1216 */
1217 static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level)
1218 {
1219 /* Check the parameters */
1220 assert_param(IS_OB_BOR_LEVEL(Level));
1221
1222 /* Set the BOR Level */
1223 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV);
1224 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= Level;
1225
1226 return HAL_OK;
1227
1228 }
1229
1230 /**
1231 * @brief Return the FLASH User Option Byte value.
1232 * @param None
1233 * @retval uint8_t FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1)
1234 * and RST_STDBY(Bit2).
1235 */
1236 static uint8_t FLASH_OB_GetUser(void)
1237 {
1238 /* Return the User Option Byte */
1239 return ((uint8_t)(FLASH->OPTCR & 0xE0));
1240 }
1241
1242 /**
1243 * @brief Return the FLASH Write Protection Option Bytes value.
1244 * @param None
1245 * @retval uint16_t FLASH Write Protection Option Bytes value
1246 */
1247 static uint16_t FLASH_OB_GetWRP(void)
1248 {
1249 /* Return the FLASH write protection Register value */
1250 return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
1251 }
1252
1253 /**
1254 * @brief Returns the FLASH Read Protection level.
1255 * @param None
1256 * @retval FlagStatus FLASH ReadOut Protection Status:
1257 * - SET, when OB_RDP_Level_1 or OB_RDP_Level_2 is set
1258 * - RESET, when OB_RDP_Level_0 is set
1259 */
1260 static FlagStatus FLASH_OB_GetRDP(void)
1261 {
1262 FlagStatus readstatus = RESET;
1263
1264 if ((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) != (uint8_t)OB_RDP_LEVEL_0))
1265 {
1266 readstatus = SET;
1267 }
1268
1269 return readstatus;
1270 }
1271
1272 /**
1273 * @brief Returns the FLASH BOR level.
1274 * @param None
1275 * @retval uint8_t The FLASH BOR level:
1276 * - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
1277 * - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
1278 * - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
1279 * - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V
1280 */
1281 static uint8_t FLASH_OB_GetBOR(void)
1282 {
1283 /* Return the FLASH BOR level */
1284 return (uint8_t)(*(__IO uint8_t *)(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0C);
1285 }
1286
1287 /**
1288 * @}
1289 */
1290
1291 #endif /* HAL_FLASH_MODULE_ENABLED */
1292
1293 /**
1294 * @}
1295 */
1296
1297 /**
1298 * @}
1299 */
1300
1301 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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