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1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_i2c.c
4 * @author MCD Application Team
5 * @version V1.1.0
6 * @date 19-June-2014
7 * @brief I2C HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the Inter Integrated Circuit (I2C) peripheral:
10 * + Initialization and de-initialization functions
11 * + IO operation functions
12 * + Peripheral Control functions
13 * + Peripheral State functions
14 *
15 @verbatim
16 ==============================================================================
17 ##### How to use this driver #####
18 ==============================================================================
19 [..]
20 The I2C HAL driver can be used as follows:
21
22 (#) Declare a I2C_HandleTypeDef handle structure, for example:
23 I2C_HandleTypeDef hi2c;
24
25 (#)Initialize the I2C low level resources by implement the HAL_I2C_MspInit() API:
26 (##) Enable the I2Cx interface clock
27 (##) I2C pins configuration
28 (+++) Enable the clock for the I2C GPIOs
29 (+++) Configure I2C pins as alternate function open-drain
30 (##) NVIC configuration if you need to use interrupt process
31 (+++) Configure the I2Cx interrupt priority
32 (+++) Enable the NVIC I2C IRQ Channel
33 (##) DMA Configuration if you need to use DMA process
34 (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream
35 (+++) Enable the DMAx interface clock using
36 (+++) Configure the DMA handle parameters
37 (+++) Configure the DMA Tx or Rx Stream
38 (+++) Associate the initilalized DMA handle to the hi2c DMA Tx or Rx handle
39 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
40 the DMA Tx or Rx Stream
41
42 (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
43 Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
44
45 (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
46 (GPIO, CLOCK, NVIC...etc) by calling the customed HAL_I2C_MspInit(&hi2c) API.
47
48 (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
49
50 (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
51
52 *** Polling mode IO operation ***
53 =================================
54 [..]
55 (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
56 (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
57 (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
58 (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
59
60 *** Polling mode IO MEM operation ***
61 =====================================
62 [..]
63 (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
64 (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
65
66
67 *** Interrupt mode IO operation ***
68 ===================================
69 [..]
70 (+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT()
71 (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
72 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
73 (+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT()
74 (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
75 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
76 (+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT()
77 (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
78 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
79 (+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT()
80 (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
81 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
82 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
83 add his own code by customization of function pointer HAL_I2C_ErrorCallback
84
85 *** Interrupt mode IO MEM operation ***
86 =======================================
87 [..]
88 (+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using
89 HAL_I2C_Mem_Write_IT()
90 (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
91 add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
92 (+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using
93 HAL_I2C_Mem_Read_IT()
94 (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
95 add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
96 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
97 add his own code by customization of function pointer HAL_I2C_ErrorCallback
98
99 *** DMA mode IO operation ***
100 ==============================
101 [..]
102 (+) Transmit in master mode an amount of data in non blocking mode (DMA) using
103 HAL_I2C_Master_Transmit_DMA()
104 (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
105 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
106 (+) Receive in master mode an amount of data in non blocking mode (DMA) using
107 HAL_I2C_Master_Receive_DMA()
108 (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
109 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
110 (+) Transmit in slave mode an amount of data in non blocking mode (DMA) using
111 HAL_I2C_Slave_Transmit_DMA()
112 (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
113 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
114 (+) Receive in slave mode an amount of data in non blocking mode (DMA) using
115 HAL_I2C_Slave_Receive_DMA()
116 (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
117 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
118 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
119 add his own code by customization of function pointer HAL_I2C_ErrorCallback
120
121 *** DMA mode IO MEM operation ***
122 =================================
123 [..]
124 (+) Write an amount of data in no-blocking mode with DMA to a specific memory address using
125 HAL_I2C_Mem_Write_DMA()
126 (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
127 add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
128 (+) Read an amount of data in no-blocking mode with DMA from a specific memory address using
129 HAL_I2C_Mem_Read_DMA()
130 (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
131 add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
132 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
133 add his own code by customization of function pointer HAL_I2C_ErrorCallback
134
135
136 *** I2C HAL driver macros list ***
137 ==================================
138 [..]
139 Below the list of most used macros in I2C HAL driver.
140
141 (+) __HAL_I2C_ENABLE: Enable the I2C peripheral
142 (+) __HAL_I2C_DISABLE: Disable the I2C peripheral
143 (+) __HAL_I2C_GET_FLAG : Checks whether the specified I2C flag is set or not
144 (+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag
145 (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
146 (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
147
148 [..]
149 (@) You can refer to the I2C HAL driver header file for more useful macros
150
151
152 @endverbatim
153 ******************************************************************************
154 * @attention
155 *
156 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
157 *
158 * Redistribution and use in source and binary forms, with or without modification,
159 * are permitted provided that the following conditions are met:
160 * 1. Redistributions of source code must retain the above copyright notice,
161 * this list of conditions and the following disclaimer.
162 * 2. Redistributions in binary form must reproduce the above copyright notice,
163 * this list of conditions and the following disclaimer in the documentation
164 * and/or other materials provided with the distribution.
165 * 3. Neither the name of STMicroelectronics nor the names of its contributors
166 * may be used to endorse or promote products derived from this software
167 * without specific prior written permission.
168 *
169 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
170 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
171 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
172 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
173 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
174 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
175 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
176 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
177 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
178 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
179 *
180 ******************************************************************************
181 */
182
183 /* Includes ------------------------------------------------------------------*/
184 #include "stm32f4xx_hal.h"
185
186 /** @addtogroup STM32F4xx_HAL_Driver
187 * @{
188 */
189
190 /** @defgroup I2C
191 * @brief I2C HAL module driver
192 * @{
193 */
194
195 #ifdef HAL_I2C_MODULE_ENABLED
196
197 /* Private typedef -----------------------------------------------------------*/
198 /* Private define ------------------------------------------------------------*/
199 #define I2C_TIMEOUT_FLAG ((uint32_t)35) /* 35 ms */
200 #define I2C_TIMEOUT_ADDR_SLAVE ((uint32_t)10000) /* 10 s */
201
202 /* Private macro -------------------------------------------------------------*/
203 /* Private variables ---------------------------------------------------------*/
204 /* Private function prototypes -----------------------------------------------*/
205 static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma);
206 static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma);
207 static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma);
208 static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma);
209 static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma);
210 static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma);
211 static void I2C_DMAError(DMA_HandleTypeDef *hdma);
212
213 static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout);
214 static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout);
215 static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
216 static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
217 static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
218 static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout);
219
220 static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
221 static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
222 static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
223 static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
224
225 static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
226 static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
227 static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
228 static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
229 static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c);
230 static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
231 static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
232
233 /* Private functions ---------------------------------------------------------*/
234
235 /** @defgroup I2C_Private_Functions
236 * @{
237 */
238
239 /** @defgroup I2C_Group1 Initialization and de-initialization functions
240 * @brief Initialization and Configuration functions
241 *
242 @verbatim
243 ===============================================================================
244 ##### Initialization and de-initialization functions #####
245 ===============================================================================
246 [..] This subsection provides a set of functions allowing to initialize and
247 de-initialiaze the I2Cx peripheral:
248
249 (+) User must Implement HAL_I2C_MspInit() function in which he configures
250 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC).
251
252 (+) Call the function HAL_I2C_Init() to configure the selected device with
253 the selected configuration:
254 (++) Communication Speed
255 (++) Duty cycle
256 (++) Addressing mode
257 (++) Own Address 1
258 (++) Dual Addressing mode
259 (++) Own Address 2
260 (++) General call mode
261 (++) Nostretch mode
262
263 (+) Call the function HAL_I2C_DeInit() to restore the default configuration
264 of the selected I2Cx periperal.
265
266 @endverbatim
267 * @{
268 */
269
270 /**
271 * @brief Initializes the I2C according to the specified parameters
272 * in the I2C_InitTypeDef and create the associated handle.
273 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
274 * the configuration information for I2C module
275 * @retval HAL status
276 */
277 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
278 {
279 uint32_t freqrange = 0;
280 uint32_t pclk1 = 0;
281
282 /* Check the I2C handle allocation */
283 if(hi2c == HAL_NULL)
284 {
285 return HAL_ERROR;
286 }
287
288 /* Check the parameters */
289 assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
290 assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
291 assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
292 assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
293 assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
294 assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
295 assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
296 assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
297 assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
298
299 if(hi2c->State == HAL_I2C_STATE_RESET)
300 {
301 /* Init the low level hardware : GPIO, CLOCK, NVIC */
302 HAL_I2C_MspInit(hi2c);
303 }
304
305 hi2c->State = HAL_I2C_STATE_BUSY;
306
307 /* Disble the selected I2C peripheral */
308 __HAL_I2C_DISABLE(hi2c);
309
310 /* Get PCLK1 frequency */
311 pclk1 = HAL_RCC_GetPCLK1Freq();
312
313 /* Calculate frequency range */
314 freqrange = __HAL_I2C_FREQRANGE(pclk1);
315
316 /*---------------------------- I2Cx CR2 Configuration ----------------------*/
317 /* Configure I2Cx: Frequency range */
318 hi2c->Instance->CR2 = freqrange;
319
320 /*---------------------------- I2Cx TRISE Configuration --------------------*/
321 /* Configure I2Cx: Rise Time */
322 hi2c->Instance->TRISE = __HAL_I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
323
324 /*---------------------------- I2Cx CCR Configuration ----------------------*/
325 /* Configure I2Cx: Speed */
326 hi2c->Instance->CCR = __HAL_I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
327
328 /*---------------------------- I2Cx CR1 Configuration ----------------------*/
329 /* Configure I2Cx: Generalcall and NoStretch mode */
330 hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
331
332 /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
333 /* Configure I2Cx: Own Address1 and addressing mode */
334 hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1);
335
336 /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
337 /* Configure I2Cx: Dual mode and Own Address2 */
338 hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2);
339
340 /* Enable the selected I2C peripheral */
341 __HAL_I2C_ENABLE(hi2c);
342
343 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
344 hi2c->State = HAL_I2C_STATE_READY;
345
346 return HAL_OK;
347 }
348
349 /**
350 * @brief DeInitializes the I2C peripheral.
351 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
352 * the configuration information for I2C module
353 * @retval HAL status
354 */
355 HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
356 {
357 /* Check the I2C handle allocation */
358 if(hi2c == HAL_NULL)
359 {
360 return HAL_ERROR;
361 }
362
363 /* Check the parameters */
364 assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
365
366 hi2c->State = HAL_I2C_STATE_BUSY;
367
368 /* Disable the I2C Peripheral Clock */
369 __HAL_I2C_DISABLE(hi2c);
370
371 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
372 HAL_I2C_MspDeInit(hi2c);
373
374 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
375
376 hi2c->State = HAL_I2C_STATE_RESET;
377
378 /* Release Lock */
379 __HAL_UNLOCK(hi2c);
380
381 return HAL_OK;
382 }
383
384 /**
385 * @brief I2C MSP Init.
386 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
387 * the configuration information for I2C module
388 * @retval None
389 */
390 __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
391 {
392 /* NOTE : This function Should not be modified, when the callback is needed,
393 the HAL_I2C_MspInit could be implemented in the user file
394 */
395 }
396
397 /**
398 * @brief I2C MSP DeInit
399 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
400 * the configuration information for I2C module
401 * @retval None
402 */
403 __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
404 {
405 /* NOTE : This function Should not be modified, when the callback is needed,
406 the HAL_I2C_MspDeInit could be implemented in the user file
407 */
408 }
409
410 /**
411 * @}
412 */
413
414 /** @defgroup I2C_Group2 IO operation functions
415 * @brief Data transfers functions
416 *
417 @verbatim
418 ===============================================================================
419 ##### IO operation functions #####
420 ===============================================================================
421 [..]
422 This subsection provides a set of functions allowing to manage the I2C data
423 transfers.
424
425 (#) There are two modes of transfer:
426 (++) Blocking mode : The communication is performed in the polling mode.
427 The status of all data processing is returned by the same function
428 after finishing transfer.
429 (++) No-Blocking mode : The communication is performed using Interrupts
430 or DMA. These functions return the status of the transfer startup.
431 The end of the data processing will be indicated through the
432 dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
433 using DMA mode.
434
435 (#) Blocking mode functions are :
436 (++) HAL_I2C_Master_Transmit()
437 (++) HAL_I2C_Master_Receive()
438 (++) HAL_I2C_Slave_Transmit()
439 (++) HAL_I2C_Slave_Receive()
440 (++) HAL_I2C_Mem_Write()
441 (++) HAL_I2C_Mem_Read()
442 (++) HAL_I2C_IsDeviceReady()
443
444 (#) No-Blocking mode functions with Interrupt are :
445 (++) HAL_I2C_Master_Transmit_IT()
446 (++) HAL_I2C_Master_Receive_IT()
447 (++) HAL_I2C_Slave_Transmit_IT()
448 (++) HAL_I2C_Slave_Receive_IT()
449 (++) HAL_I2C_Mem_Write_IT()
450 (++) HAL_I2C_Mem_Read_IT()
451
452 (#) No-Blocking mode functions with DMA are :
453 (++) HAL_I2C_Master_Transmit_DMA()
454 (++) HAL_I2C_Master_Receive_DMA()
455 (++) HAL_I2C_Slave_Transmit_DMA()
456 (++) HAL_I2C_Slave_Receive_DMA()
457 (++) HAL_I2C_Mem_Write_DMA()
458 (++) HAL_I2C_Mem_Read_DMA()
459
460 (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
461 (++) HAL_I2C_MemTxCpltCallback()
462 (++) HAL_I2C_MemRxCpltCallback()
463 (++) HAL_I2C_MasterTxCpltCallback()
464 (++) HAL_I2C_MasterRxCpltCallback()
465 (++) HAL_I2C_SlaveTxCpltCallback()
466 (++) HAL_I2C_SlaveRxCpltCallback()
467 (++) HAL_I2C_ErrorCallback()
468
469 @endverbatim
470 * @{
471 */
472
473 /**
474 * @brief Transmits in master mode an amount of data in blocking mode.
475 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
476 * the configuration information for I2C module
477 * @param DevAddress: Target device address
478 * @param pData: Pointer to data buffer
479 * @param Size: Amount of data to be sent
480 * @param Timeout: Timeout duration
481 * @retval HAL status
482 */
483 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
484 {
485 if(hi2c->State == HAL_I2C_STATE_READY)
486 {
487 if((pData == HAL_NULL) || (Size == 0))
488 {
489 return HAL_ERROR;
490 }
491
492 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
493 {
494 return HAL_BUSY;
495 }
496
497 /* Process Locked */
498 __HAL_LOCK(hi2c);
499
500 hi2c->State = HAL_I2C_STATE_BUSY_TX;
501 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
502
503 /* Send Slave Address */
504 if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout) != HAL_OK)
505 {
506 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
507 {
508 /* Process Unlocked */
509 __HAL_UNLOCK(hi2c);
510 return HAL_ERROR;
511 }
512 else
513 {
514 /* Process Unlocked */
515 __HAL_UNLOCK(hi2c);
516 return HAL_TIMEOUT;
517 }
518 }
519
520 /* Clear ADDR flag */
521 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
522
523 while(Size > 0)
524 {
525 /* Wait until TXE flag is set */
526 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
527 {
528 return HAL_TIMEOUT;
529 }
530
531 /* Write data to DR */
532 hi2c->Instance->DR = (*pData++);
533 Size--;
534
535 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
536 {
537 /* Write data to DR */
538 hi2c->Instance->DR = (*pData++);
539 Size--;
540 }
541 }
542
543 /* Wait until TXE flag is set */
544 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
545 {
546 return HAL_TIMEOUT;
547 }
548
549 /* Generate Stop */
550 hi2c->Instance->CR1 |= I2C_CR1_STOP;
551
552 /* Wait until BUSY flag is reset */
553 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
554 {
555 return HAL_TIMEOUT;
556 }
557
558 hi2c->State = HAL_I2C_STATE_READY;
559
560 /* Process Unlocked */
561 __HAL_UNLOCK(hi2c);
562
563 return HAL_OK;
564 }
565 else
566 {
567 return HAL_BUSY;
568 }
569 }
570
571 /**
572 * @brief Receives in master mode an amount of data in blocking mode.
573 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
574 * the configuration information for I2C module
575 * @param DevAddress: Target device address
576 * @param pData: Pointer to data buffer
577 * @param Size: Amount of data to be sent
578 * @param Timeout: Timeout duration
579 * @retval HAL status
580 */
581 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
582 {
583 if(hi2c->State == HAL_I2C_STATE_READY)
584 {
585 if((pData == HAL_NULL) || (Size == 0))
586 {
587 return HAL_ERROR;
588 }
589
590 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
591 {
592 return HAL_BUSY;
593 }
594
595 /* Process Locked */
596 __HAL_LOCK(hi2c);
597
598 hi2c->State = HAL_I2C_STATE_BUSY_RX;
599 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
600
601 /* Send Slave Address */
602 if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout) != HAL_OK)
603 {
604 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
605 {
606 /* Process Unlocked */
607 __HAL_UNLOCK(hi2c);
608 return HAL_ERROR;
609 }
610 else
611 {
612 /* Process Unlocked */
613 __HAL_UNLOCK(hi2c);
614 return HAL_TIMEOUT;
615 }
616 }
617
618 if(Size == 1)
619 {
620 /* Disable Acknowledge */
621 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
622
623 /* Clear ADDR flag */
624 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
625
626 /* Generate Stop */
627 hi2c->Instance->CR1 |= I2C_CR1_STOP;
628 }
629 else if(Size == 2)
630 {
631 /* Disable Acknowledge */
632 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
633
634 /* Enable Pos */
635 hi2c->Instance->CR1 |= I2C_CR1_POS;
636
637 /* Clear ADDR flag */
638 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
639 }
640 else
641 {
642 /* Enable Acknowledge */
643 hi2c->Instance->CR1 |= I2C_CR1_ACK;
644
645 /* Clear ADDR flag */
646 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
647 }
648
649 while(Size > 0)
650 {
651 if(Size <= 3)
652 {
653 /* One byte */
654 if(Size == 1)
655 {
656 /* Wait until RXNE flag is set */
657 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
658 {
659 return HAL_TIMEOUT;
660 }
661
662 /* Read data from DR */
663 (*pData++) = hi2c->Instance->DR;
664 Size--;
665 }
666 /* Two bytes */
667 else if(Size == 2)
668 {
669 /* Wait until BTF flag is set */
670 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
671 {
672 return HAL_TIMEOUT;
673 }
674
675 /* Generate Stop */
676 hi2c->Instance->CR1 |= I2C_CR1_STOP;
677
678 /* Read data from DR */
679 (*pData++) = hi2c->Instance->DR;
680 Size--;
681
682 /* Read data from DR */
683 (*pData++) = hi2c->Instance->DR;
684 Size--;
685 }
686 /* 3 Last bytes */
687 else
688 {
689 /* Wait until BTF flag is set */
690 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
691 {
692 return HAL_TIMEOUT;
693 }
694
695 /* Disable Acknowledge */
696 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
697
698 /* Read data from DR */
699 (*pData++) = hi2c->Instance->DR;
700 Size--;
701
702 /* Wait until BTF flag is set */
703 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
704 {
705 return HAL_TIMEOUT;
706 }
707
708 /* Generate Stop */
709 hi2c->Instance->CR1 |= I2C_CR1_STOP;
710
711 /* Read data from DR */
712 (*pData++) = hi2c->Instance->DR;
713 Size--;
714
715 /* Read data from DR */
716 (*pData++) = hi2c->Instance->DR;
717 Size--;
718 }
719 }
720 else
721 {
722 /* Wait until RXNE flag is set */
723 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
724 {
725 return HAL_TIMEOUT;
726 }
727
728 /* Read data from DR */
729 (*pData++) = hi2c->Instance->DR;
730 Size--;
731
732 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
733 {
734 /* Read data from DR */
735 (*pData++) = hi2c->Instance->DR;
736 Size--;
737 }
738 }
739 }
740
741 /* Disable Pos */
742 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
743
744 /* Wait until BUSY flag is reset */
745 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
746 {
747 return HAL_TIMEOUT;
748 }
749
750 hi2c->State = HAL_I2C_STATE_READY;
751
752 /* Process Unlocked */
753 __HAL_UNLOCK(hi2c);
754
755 return HAL_OK;
756 }
757 else
758 {
759 return HAL_BUSY;
760 }
761 }
762
763 /**
764 * @brief Transmits in slave mode an amount of data in blocking mode.
765 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
766 * the configuration information for I2C module
767 * @param pData: Pointer to data buffer
768 * @param Size: Amount of data to be sent
769 * @param Timeout: Timeout duration
770 * @retval HAL status
771 */
772 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
773 {
774 if(hi2c->State == HAL_I2C_STATE_READY)
775 {
776 if((pData == HAL_NULL) || (Size == 0))
777 {
778 return HAL_ERROR;
779 }
780
781 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
782 {
783 return HAL_BUSY;
784 }
785
786 /* Process Locked */
787 __HAL_LOCK(hi2c);
788
789 hi2c->State = HAL_I2C_STATE_BUSY_TX;
790 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
791
792 /* Enable Address Acknowledge */
793 hi2c->Instance->CR1 |= I2C_CR1_ACK;
794
795 /* Wait until ADDR flag is set */
796 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
797 {
798 return HAL_TIMEOUT;
799 }
800
801 /* Clear ADDR flag */
802 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
803
804 /* If 10bit addressing mode is selected */
805 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
806 {
807 /* Wait until ADDR flag is set */
808 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
809 {
810 return HAL_TIMEOUT;
811 }
812
813 /* Clear ADDR flag */
814 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
815 }
816
817 while(Size > 0)
818 {
819 /* Wait until TXE flag is set */
820 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
821 {
822 return HAL_TIMEOUT;
823 }
824
825 /* Write data to DR */
826 hi2c->Instance->DR = (*pData++);
827 Size--;
828
829 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
830 {
831 /* Write data to DR */
832 hi2c->Instance->DR = (*pData++);
833 Size--;
834 }
835 }
836
837 /* Wait until AF flag is set */
838 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout) != HAL_OK)
839 {
840 return HAL_TIMEOUT;
841 }
842
843 /* Clear AF flag */
844 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
845
846 /* Disable Address Acknowledge */
847 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
848
849 /* Wait until BUSY flag is reset */
850 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
851 {
852 return HAL_TIMEOUT;
853 }
854
855 hi2c->State = HAL_I2C_STATE_READY;
856
857 /* Process Unlocked */
858 __HAL_UNLOCK(hi2c);
859
860 return HAL_OK;
861 }
862 else
863 {
864 return HAL_BUSY;
865 }
866 }
867
868 /**
869 * @brief Receive in slave mode an amount of data in blocking mode
870 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
871 * the configuration information for I2C module
872 * @param pData: Pointer to data buffer
873 * @param Size: Amount of data to be sent
874 * @param Timeout: Timeout duration
875 * @retval HAL status
876 */
877 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
878 {
879 if(hi2c->State == HAL_I2C_STATE_READY)
880 {
881 if((pData == HAL_NULL) || (Size == 0))
882 {
883 return HAL_ERROR;
884 }
885
886 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
887 {
888 return HAL_BUSY;
889 }
890
891 /* Process Locked */
892 __HAL_LOCK(hi2c);
893
894 hi2c->State = HAL_I2C_STATE_BUSY_RX;
895 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
896
897 /* Enable Address Acknowledge */
898 hi2c->Instance->CR1 |= I2C_CR1_ACK;
899
900 /* Wait until ADDR flag is set */
901 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
902 {
903 return HAL_TIMEOUT;
904 }
905
906 /* Clear ADDR flag */
907 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
908
909 while(Size > 0)
910 {
911 /* Wait until RXNE flag is set */
912 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
913 {
914 return HAL_TIMEOUT;
915 }
916
917 /* Read data from DR */
918 (*pData++) = hi2c->Instance->DR;
919 Size--;
920
921 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
922 {
923 /* Read data from DR */
924 (*pData++) = hi2c->Instance->DR;
925 Size--;
926 }
927 }
928
929 /* Wait until STOP flag is set */
930 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK)
931 {
932 return HAL_TIMEOUT;
933 }
934
935 /* Clear STOP flag */
936 __HAL_I2C_CLEAR_STOPFLAG(hi2c);
937
938 /* Disable Address Acknowledge */
939 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
940
941 /* Wait until BUSY flag is reset */
942 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
943 {
944 return HAL_TIMEOUT;
945 }
946
947 hi2c->State = HAL_I2C_STATE_READY;
948
949 /* Process Unlocked */
950 __HAL_UNLOCK(hi2c);
951
952 return HAL_OK;
953 }
954 else
955 {
956 return HAL_BUSY;
957 }
958 }
959
960 /**
961 * @brief Transmit in master mode an amount of data in no-blocking mode with Interrupt
962 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
963 * the configuration information for I2C module
964 * @param DevAddress: Target device address
965 * @param pData: Pointer to data buffer
966 * @param Size: Amount of data to be sent
967 * @retval HAL status
968 */
969 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
970 {
971 if(hi2c->State == HAL_I2C_STATE_READY)
972 {
973 if((pData == HAL_NULL) || (Size == 0))
974 {
975 return HAL_ERROR;
976 }
977
978 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
979 {
980 return HAL_BUSY;
981 }
982
983 /* Process Locked */
984 __HAL_LOCK(hi2c);
985
986 hi2c->State = HAL_I2C_STATE_BUSY_TX;
987 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
988
989 hi2c->pBuffPtr = pData;
990 hi2c->XferSize = Size;
991 hi2c->XferCount = Size;
992
993 /* Send Slave Address */
994 if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
995 {
996 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
997 {
998 /* Process Unlocked */
999 __HAL_UNLOCK(hi2c);
1000 return HAL_ERROR;
1001 }
1002 else
1003 {
1004 /* Process Unlocked */
1005 __HAL_UNLOCK(hi2c);
1006 return HAL_TIMEOUT;
1007 }
1008 }
1009
1010 /* Clear ADDR flag */
1011 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1012
1013 /* Process Unlocked */
1014 __HAL_UNLOCK(hi2c);
1015
1016 /* Note : The I2C interrupts must be enabled after unlocking current process
1017 to avoid the risk of I2C interrupt handle execution before current
1018 process unlock */
1019
1020 /* Enable EVT, BUF and ERR interrupt */
1021 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1022
1023 return HAL_OK;
1024 }
1025 else
1026 {
1027 return HAL_BUSY;
1028 }
1029 }
1030
1031 /**
1032 * @brief Receive in master mode an amount of data in no-blocking mode with Interrupt
1033 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1034 * the configuration information for I2C module
1035 * @param DevAddress: Target device address
1036 * @param pData: Pointer to data buffer
1037 * @param Size: Amount of data to be sent
1038 * @retval HAL status
1039 */
1040 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
1041 {
1042 if(hi2c->State == HAL_I2C_STATE_READY)
1043 {
1044 if((pData == HAL_NULL) || (Size == 0))
1045 {
1046 return HAL_ERROR;
1047 }
1048
1049 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1050 {
1051 return HAL_BUSY;
1052 }
1053
1054 /* Process Locked */
1055 __HAL_LOCK(hi2c);
1056
1057 hi2c->State = HAL_I2C_STATE_BUSY_RX;
1058 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1059
1060 hi2c->pBuffPtr = pData;
1061 hi2c->XferSize = Size;
1062 hi2c->XferCount = Size;
1063
1064 /* Send Slave Address */
1065 if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
1066 {
1067 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1068 {
1069 /* Process Unlocked */
1070 __HAL_UNLOCK(hi2c);
1071 return HAL_ERROR;
1072 }
1073 else
1074 {
1075 /* Process Unlocked */
1076 __HAL_UNLOCK(hi2c);
1077 return HAL_TIMEOUT;
1078 }
1079 }
1080
1081 if(hi2c->XferCount == 1)
1082 {
1083 /* Disable Acknowledge */
1084 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
1085
1086 /* Clear ADDR flag */
1087 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1088
1089 /* Generate Stop */
1090 hi2c->Instance->CR1 |= I2C_CR1_STOP;
1091 }
1092 else if(hi2c->XferCount == 2)
1093 {
1094 /* Disable Acknowledge */
1095 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
1096
1097 /* Enable Pos */
1098 hi2c->Instance->CR1 |= I2C_CR1_POS;
1099
1100 /* Clear ADDR flag */
1101 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1102 }
1103 else
1104 {
1105 /* Enable Acknowledge */
1106 hi2c->Instance->CR1 |= I2C_CR1_ACK;
1107
1108 /* Clear ADDR flag */
1109 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1110 }
1111
1112 /* Process Unlocked */
1113 __HAL_UNLOCK(hi2c);
1114
1115 /* Note : The I2C interrupts must be enabled after unlocking current process
1116 to avoid the risk of I2C interrupt handle execution before current
1117 process unlock */
1118
1119 /* Enable EVT, BUF and ERR interrupt */
1120 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1121
1122 return HAL_OK;
1123 }
1124 else
1125 {
1126 return HAL_BUSY;
1127 }
1128 }
1129
1130 /**
1131 * @brief Transmit in slave mode an amount of data in no-blocking mode with Interrupt
1132 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1133 * the configuration information for I2C module
1134 * @param pData: Pointer to data buffer
1135 * @param Size: Amount of data to be sent
1136 * @retval HAL status
1137 */
1138 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
1139 {
1140 if(hi2c->State == HAL_I2C_STATE_READY)
1141 {
1142 if((pData == HAL_NULL) || (Size == 0))
1143 {
1144 return HAL_ERROR;
1145 }
1146
1147 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1148 {
1149 return HAL_BUSY;
1150 }
1151
1152 /* Process Locked */
1153 __HAL_LOCK(hi2c);
1154
1155 hi2c->State = HAL_I2C_STATE_BUSY_TX;
1156 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1157
1158 hi2c->pBuffPtr = pData;
1159 hi2c->XferSize = Size;
1160 hi2c->XferCount = Size;
1161
1162 /* Enable Address Acknowledge */
1163 hi2c->Instance->CR1 |= I2C_CR1_ACK;
1164
1165 /* Process Unlocked */
1166 __HAL_UNLOCK(hi2c);
1167
1168 /* Note : The I2C interrupts must be enabled after unlocking current process
1169 to avoid the risk of I2C interrupt handle execution before current
1170 process unlock */
1171
1172 /* Enable EVT, BUF and ERR interrupt */
1173 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1174
1175 return HAL_OK;
1176 }
1177 else
1178 {
1179 return HAL_BUSY;
1180 }
1181 }
1182
1183 /**
1184 * @brief Receive in slave mode an amount of data in no-blocking mode with Interrupt
1185 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1186 * the configuration information for I2C module
1187 * @param pData: Pointer to data buffer
1188 * @param Size: Amount of data to be sent
1189 * @retval HAL status
1190 */
1191 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
1192 {
1193 if(hi2c->State == HAL_I2C_STATE_READY)
1194 {
1195 if((pData == HAL_NULL) || (Size == 0))
1196 {
1197 return HAL_ERROR;
1198 }
1199
1200 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1201 {
1202 return HAL_BUSY;
1203 }
1204
1205 /* Process Locked */
1206 __HAL_LOCK(hi2c);
1207
1208 hi2c->State = HAL_I2C_STATE_BUSY_RX;
1209 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1210
1211 hi2c->pBuffPtr = pData;
1212 hi2c->XferSize = Size;
1213 hi2c->XferCount = Size;
1214
1215 /* Enable Address Acknowledge */
1216 hi2c->Instance->CR1 |= I2C_CR1_ACK;
1217
1218 /* Process Unlocked */
1219 __HAL_UNLOCK(hi2c);
1220
1221 /* Note : The I2C interrupts must be enabled after unlocking current process
1222 to avoid the risk of I2C interrupt handle execution before current
1223 process unlock */
1224
1225 /* Enable EVT, BUF and ERR interrupt */
1226 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1227
1228 return HAL_OK;
1229 }
1230 else
1231 {
1232 return HAL_BUSY;
1233 }
1234 }
1235
1236 /**
1237 * @brief Transmit in master mode an amount of data in no-blocking mode with DMA
1238 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1239 * the configuration information for I2C module
1240 * @param DevAddress: Target device address
1241 * @param pData: Pointer to data buffer
1242 * @param Size: Amount of data to be sent
1243 * @retval HAL status
1244 */
1245 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
1246 {
1247 if(hi2c->State == HAL_I2C_STATE_READY)
1248 {
1249 if((pData == HAL_NULL) || (Size == 0))
1250 {
1251 return HAL_ERROR;
1252 }
1253
1254 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1255 {
1256 return HAL_BUSY;
1257 }
1258
1259 /* Process Locked */
1260 __HAL_LOCK(hi2c);
1261
1262 hi2c->State = HAL_I2C_STATE_BUSY_TX;
1263 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1264
1265 hi2c->pBuffPtr = pData;
1266 hi2c->XferSize = Size;
1267 hi2c->XferCount = Size;
1268
1269 /* Set the I2C DMA transfert complete callback */
1270 hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt;
1271
1272 /* Set the DMA error callback */
1273 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
1274
1275 /* Enable the DMA Stream */
1276 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
1277
1278 /* Send Slave Address */
1279 if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
1280 {
1281 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1282 {
1283 /* Process Unlocked */
1284 __HAL_UNLOCK(hi2c);
1285 return HAL_ERROR;
1286 }
1287 else
1288 {
1289 /* Process Unlocked */
1290 __HAL_UNLOCK(hi2c);
1291 return HAL_TIMEOUT;
1292 }
1293 }
1294
1295 /* Enable DMA Request */
1296 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
1297
1298 /* Clear ADDR flag */
1299 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1300
1301 /* Process Unlocked */
1302 __HAL_UNLOCK(hi2c);
1303
1304 return HAL_OK;
1305 }
1306 else
1307 {
1308 return HAL_BUSY;
1309 }
1310 }
1311
1312 /**
1313 * @brief Receive in master mode an amount of data in no-blocking mode with DMA
1314 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1315 * the configuration information for I2C module
1316 * @param DevAddress: Target device address
1317 * @param pData: Pointer to data buffer
1318 * @param Size: Amount of data to be sent
1319 * @retval HAL status
1320 */
1321 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
1322 {
1323 if(hi2c->State == HAL_I2C_STATE_READY)
1324 {
1325 if((pData == HAL_NULL) || (Size == 0))
1326 {
1327 return HAL_ERROR;
1328 }
1329
1330 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1331 {
1332 return HAL_BUSY;
1333 }
1334
1335 /* Process Locked */
1336 __HAL_LOCK(hi2c);
1337
1338 hi2c->State = HAL_I2C_STATE_BUSY_RX;
1339 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1340
1341 hi2c->pBuffPtr = pData;
1342 hi2c->XferSize = Size;
1343 hi2c->XferCount = Size;
1344
1345 /* Set the I2C DMA transfert complete callback */
1346 hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt;
1347
1348 /* Set the DMA error callback */
1349 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
1350
1351 /* Enable the DMA Stream */
1352 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
1353
1354 /* Send Slave Address */
1355 if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
1356 {
1357 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1358 {
1359 /* Process Unlocked */
1360 __HAL_UNLOCK(hi2c);
1361 return HAL_ERROR;
1362 }
1363 else
1364 {
1365 /* Process Unlocked */
1366 __HAL_UNLOCK(hi2c);
1367 return HAL_TIMEOUT;
1368 }
1369 }
1370
1371 if(Size == 1)
1372 {
1373 /* Disable Acknowledge */
1374 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
1375 }
1376 else
1377 {
1378 /* Enable Last DMA bit */
1379 hi2c->Instance->CR2 |= I2C_CR2_LAST;
1380 }
1381
1382 /* Enable DMA Request */
1383 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
1384
1385 /* Clear ADDR flag */
1386 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1387
1388 /* Process Unlocked */
1389 __HAL_UNLOCK(hi2c);
1390
1391 return HAL_OK;
1392 }
1393 else
1394 {
1395 return HAL_BUSY;
1396 }
1397 }
1398
1399 /**
1400 * @brief Transmit in slave mode an amount of data in no-blocking mode with DMA
1401 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1402 * the configuration information for I2C module
1403 * @param pData: Pointer to data buffer
1404 * @param Size: Amount of data to be sent
1405 * @retval HAL status
1406 */
1407 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
1408 {
1409 if(hi2c->State == HAL_I2C_STATE_READY)
1410 {
1411 if((pData == HAL_NULL) || (Size == 0))
1412 {
1413 return HAL_ERROR;
1414 }
1415
1416 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1417 {
1418 return HAL_BUSY;
1419 }
1420
1421 /* Process Locked */
1422 __HAL_LOCK(hi2c);
1423
1424 hi2c->State = HAL_I2C_STATE_BUSY_TX;
1425 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1426
1427 hi2c->pBuffPtr = pData;
1428 hi2c->XferSize = Size;
1429 hi2c->XferCount = Size;
1430
1431 /* Set the I2C DMA transfert complete callback */
1432 hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt;
1433
1434 /* Set the DMA error callback */
1435 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
1436
1437 /* Enable the DMA Stream */
1438 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
1439
1440 /* Enable DMA Request */
1441 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
1442
1443 /* Enable Address Acknowledge */
1444 hi2c->Instance->CR1 |= I2C_CR1_ACK;
1445
1446 /* Wait until ADDR flag is set */
1447 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
1448 {
1449 return HAL_TIMEOUT;
1450 }
1451
1452 /* If 7bit addressing mode is selected */
1453 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
1454 {
1455 /* Clear ADDR flag */
1456 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1457 }
1458 else
1459 {
1460 /* Clear ADDR flag */
1461 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1462
1463 /* Wait until ADDR flag is set */
1464 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
1465 {
1466 return HAL_TIMEOUT;
1467 }
1468
1469 /* Clear ADDR flag */
1470 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1471 }
1472
1473 /* Process Unlocked */
1474 __HAL_UNLOCK(hi2c);
1475
1476 return HAL_OK;
1477 }
1478 else
1479 {
1480 return HAL_BUSY;
1481 }
1482 }
1483
1484 /**
1485 * @brief Receive in slave mode an amount of data in no-blocking mode with DMA
1486 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1487 * the configuration information for I2C module
1488 * @param pData: Pointer to data buffer
1489 * @param Size: Amount of data to be sent
1490 * @retval HAL status
1491 */
1492 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
1493 {
1494 if(hi2c->State == HAL_I2C_STATE_READY)
1495 {
1496 if((pData == HAL_NULL) || (Size == 0))
1497 {
1498 return HAL_ERROR;
1499 }
1500
1501 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1502 {
1503 return HAL_BUSY;
1504 }
1505
1506 /* Process Locked */
1507 __HAL_LOCK(hi2c);
1508
1509 hi2c->State = HAL_I2C_STATE_BUSY_RX;
1510 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1511
1512 hi2c->pBuffPtr = pData;
1513 hi2c->XferSize = Size;
1514 hi2c->XferCount = Size;
1515
1516 /* Set the I2C DMA transfert complete callback */
1517 hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt;
1518
1519 /* Set the DMA error callback */
1520 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
1521
1522 /* Enable the DMA Stream */
1523 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
1524
1525 /* Enable DMA Request */
1526 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
1527
1528 /* Enable Address Acknowledge */
1529 hi2c->Instance->CR1 |= I2C_CR1_ACK;
1530
1531 /* Wait until ADDR flag is set */
1532 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
1533 {
1534 return HAL_TIMEOUT;
1535 }
1536
1537 /* Clear ADDR flag */
1538 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1539
1540 /* Process Unlocked */
1541 __HAL_UNLOCK(hi2c);
1542
1543 return HAL_OK;
1544 }
1545 else
1546 {
1547 return HAL_BUSY;
1548 }
1549 }
1550 /**
1551 * @brief Write an amount of data in blocking mode to a specific memory address
1552 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1553 * the configuration information for I2C module
1554 * @param DevAddress: Target device address
1555 * @param MemAddress: Internal memory address
1556 * @param MemAddSize: Size of internal memory address
1557 * @param pData: Pointer to data buffer
1558 * @param Size: Amount of data to be sent
1559 * @param Timeout: Timeout duration
1560 * @retval HAL status
1561 */
1562 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1563 {
1564 /* Check the parameters */
1565 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
1566
1567 if(hi2c->State == HAL_I2C_STATE_READY)
1568 {
1569 if((pData == HAL_NULL) || (Size == 0))
1570 {
1571 return HAL_ERROR;
1572 }
1573
1574 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1575 {
1576 return HAL_BUSY;
1577 }
1578
1579 /* Process Locked */
1580 __HAL_LOCK(hi2c);
1581
1582 hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
1583 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1584
1585 /* Send Slave Address and Memory Address */
1586 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
1587 {
1588 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1589 {
1590 /* Process Unlocked */
1591 __HAL_UNLOCK(hi2c);
1592 return HAL_ERROR;
1593 }
1594 else
1595 {
1596 /* Process Unlocked */
1597 __HAL_UNLOCK(hi2c);
1598 return HAL_TIMEOUT;
1599 }
1600 }
1601
1602 while(Size > 0)
1603 {
1604 /* Wait until TXE flag is set */
1605 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
1606 {
1607 return HAL_TIMEOUT;
1608 }
1609
1610 /* Write data to DR */
1611 hi2c->Instance->DR = (*pData++);
1612 Size--;
1613
1614 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
1615 {
1616 /* Write data to DR */
1617 hi2c->Instance->DR = (*pData++);
1618 Size--;
1619 }
1620 }
1621
1622 /* Wait until TXE flag is set */
1623 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
1624 {
1625 return HAL_TIMEOUT;
1626 }
1627
1628 /* Generate Stop */
1629 hi2c->Instance->CR1 |= I2C_CR1_STOP;
1630
1631 /* Wait until BUSY flag is reset */
1632 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
1633 {
1634 return HAL_TIMEOUT;
1635 }
1636
1637 hi2c->State = HAL_I2C_STATE_READY;
1638
1639 /* Process Unlocked */
1640 __HAL_UNLOCK(hi2c);
1641
1642 return HAL_OK;
1643 }
1644 else
1645 {
1646 return HAL_BUSY;
1647 }
1648 }
1649
1650 /**
1651 * @brief Read an amount of data in blocking mode from a specific memory address
1652 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1653 * the configuration information for I2C module
1654 * @param DevAddress: Target device address
1655 * @param MemAddress: Internal memory address
1656 * @param MemAddSize: Size of internal memory address
1657 * @param pData: Pointer to data buffer
1658 * @param Size: Amount of data to be sent
1659 * @param Timeout: Timeout duration
1660 * @retval HAL status
1661 */
1662 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1663 {
1664 /* Check the parameters */
1665 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
1666
1667 if(hi2c->State == HAL_I2C_STATE_READY)
1668 {
1669 if((pData == HAL_NULL) || (Size == 0))
1670 {
1671 return HAL_ERROR;
1672 }
1673
1674 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1675 {
1676 return HAL_BUSY;
1677 }
1678
1679 /* Process Locked */
1680 __HAL_LOCK(hi2c);
1681
1682 hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
1683 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1684
1685 /* Send Slave Address and Memory Address */
1686 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
1687 {
1688 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1689 {
1690 /* Process Unlocked */
1691 __HAL_UNLOCK(hi2c);
1692 return HAL_ERROR;
1693 }
1694 else
1695 {
1696 /* Process Unlocked */
1697 __HAL_UNLOCK(hi2c);
1698 return HAL_TIMEOUT;
1699 }
1700 }
1701
1702 if(Size == 1)
1703 {
1704 /* Disable Acknowledge */
1705 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
1706
1707 /* Clear ADDR flag */
1708 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1709
1710 /* Generate Stop */
1711 hi2c->Instance->CR1 |= I2C_CR1_STOP;
1712 }
1713 else if(Size == 2)
1714 {
1715 /* Disable Acknowledge */
1716 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
1717
1718 /* Enable Pos */
1719 hi2c->Instance->CR1 |= I2C_CR1_POS;
1720
1721 /* Clear ADDR flag */
1722 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1723 }
1724 else
1725 {
1726 /* Clear ADDR flag */
1727 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1728 }
1729
1730 while(Size > 0)
1731 {
1732 if(Size <= 3)
1733 {
1734 /* One byte */
1735 if(Size== 1)
1736 {
1737 /* Wait until RXNE flag is set */
1738 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
1739 {
1740 return HAL_TIMEOUT;
1741 }
1742
1743 /* Read data from DR */
1744 (*pData++) = hi2c->Instance->DR;
1745 Size--;
1746 }
1747 /* Two bytes */
1748 else if(Size == 2)
1749 {
1750 /* Wait until BTF flag is set */
1751 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
1752 {
1753 return HAL_TIMEOUT;
1754 }
1755
1756 /* Generate Stop */
1757 hi2c->Instance->CR1 |= I2C_CR1_STOP;
1758
1759 /* Read data from DR */
1760 (*pData++) = hi2c->Instance->DR;
1761 Size--;
1762
1763 /* Read data from DR */
1764 (*pData++) = hi2c->Instance->DR;
1765 Size--;
1766 }
1767 /* 3 Last bytes */
1768 else
1769 {
1770 /* Wait until BTF flag is set */
1771 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
1772 {
1773 return HAL_TIMEOUT;
1774 }
1775
1776 /* Disable Acknowledge */
1777 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
1778
1779 /* Read data from DR */
1780 (*pData++) = hi2c->Instance->DR;
1781 Size--;
1782
1783 /* Wait until BTF flag is set */
1784 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
1785 {
1786 return HAL_TIMEOUT;
1787 }
1788
1789 /* Generate Stop */
1790 hi2c->Instance->CR1 |= I2C_CR1_STOP;
1791
1792 /* Read data from DR */
1793 (*pData++) = hi2c->Instance->DR;
1794 Size--;
1795
1796 /* Read data from DR */
1797 (*pData++) = hi2c->Instance->DR;
1798 Size--;
1799 }
1800 }
1801 else
1802 {
1803 /* Wait until RXNE flag is set */
1804 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
1805 {
1806 return HAL_TIMEOUT;
1807 }
1808
1809 /* Read data from DR */
1810 (*pData++) = hi2c->Instance->DR;
1811 Size--;
1812
1813 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
1814 {
1815 /* Read data from DR */
1816 (*pData++) = hi2c->Instance->DR;
1817 Size--;
1818 }
1819 }
1820 }
1821
1822 /* Disable Pos */
1823 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
1824
1825 /* Wait until BUSY flag is reset */
1826 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
1827 {
1828 return HAL_TIMEOUT;
1829 }
1830
1831 hi2c->State = HAL_I2C_STATE_READY;
1832
1833 /* Process Unlocked */
1834 __HAL_UNLOCK(hi2c);
1835
1836 return HAL_OK;
1837 }
1838 else
1839 {
1840 return HAL_BUSY;
1841 }
1842 }
1843 /**
1844 * @brief Write an amount of data in no-blocking mode with Interrupt to a specific memory address
1845 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1846 * the configuration information for I2C module
1847 * @param DevAddress: Target device address
1848 * @param MemAddress: Internal memory address
1849 * @param MemAddSize: Size of internal memory address
1850 * @param pData: Pointer to data buffer
1851 * @param Size: Amount of data to be sent
1852 * @retval HAL status
1853 */
1854 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
1855 {
1856 /* Check the parameters */
1857 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
1858
1859 if(hi2c->State == HAL_I2C_STATE_READY)
1860 {
1861 if((pData == HAL_NULL) || (Size == 0))
1862 {
1863 return HAL_ERROR;
1864 }
1865
1866 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1867 {
1868 return HAL_BUSY;
1869 }
1870
1871 /* Process Locked */
1872 __HAL_LOCK(hi2c);
1873
1874 hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
1875 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1876
1877 hi2c->pBuffPtr = pData;
1878 hi2c->XferSize = Size;
1879 hi2c->XferCount = Size;
1880
1881 /* Send Slave Address and Memory Address */
1882 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
1883 {
1884 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1885 {
1886 /* Process Unlocked */
1887 __HAL_UNLOCK(hi2c);
1888 return HAL_ERROR;
1889 }
1890 else
1891 {
1892 /* Process Unlocked */
1893 __HAL_UNLOCK(hi2c);
1894 return HAL_TIMEOUT;
1895 }
1896 }
1897
1898 /* Process Unlocked */
1899 __HAL_UNLOCK(hi2c);
1900
1901 /* Note : The I2C interrupts must be enabled after unlocking current process
1902 to avoid the risk of I2C interrupt handle execution before current
1903 process unlock */
1904
1905 /* Enable EVT, BUF and ERR interrupt */
1906 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1907
1908 return HAL_OK;
1909 }
1910 else
1911 {
1912 return HAL_BUSY;
1913 }
1914 }
1915
1916 /**
1917 * @brief Read an amount of data in no-blocking mode with Interrupt from a specific memory address
1918 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1919 * the configuration information for I2C module
1920 * @param DevAddress: Target device address
1921 * @param MemAddress: Internal memory address
1922 * @param MemAddSize: Size of internal memory address
1923 * @param pData: Pointer to data buffer
1924 * @param Size: Amount of data to be sent
1925 * @retval HAL status
1926 */
1927 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
1928 {
1929 /* Check the parameters */
1930 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
1931
1932 if(hi2c->State == HAL_I2C_STATE_READY)
1933 {
1934 if((pData == HAL_NULL) || (Size == 0))
1935 {
1936 return HAL_ERROR;
1937 }
1938
1939 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1940 {
1941 return HAL_BUSY;
1942 }
1943
1944 /* Process Locked */
1945 __HAL_LOCK(hi2c);
1946
1947 hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
1948 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1949
1950 hi2c->pBuffPtr = pData;
1951 hi2c->XferSize = Size;
1952 hi2c->XferCount = Size;
1953
1954 /* Send Slave Address and Memory Address */
1955 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
1956 {
1957 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1958 {
1959 /* Process Unlocked */
1960 __HAL_UNLOCK(hi2c);
1961 return HAL_ERROR;
1962 }
1963 else
1964 {
1965 /* Process Unlocked */
1966 __HAL_UNLOCK(hi2c);
1967 return HAL_TIMEOUT;
1968 }
1969 }
1970
1971 if(hi2c->XferCount == 1)
1972 {
1973 /* Disable Acknowledge */
1974 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
1975
1976 /* Clear ADDR flag */
1977 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1978
1979 /* Generate Stop */
1980 hi2c->Instance->CR1 |= I2C_CR1_STOP;
1981 }
1982 else if(hi2c->XferCount == 2)
1983 {
1984 /* Disable Acknowledge */
1985 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
1986
1987 /* Enable Pos */
1988 hi2c->Instance->CR1 |= I2C_CR1_POS;
1989
1990 /* Clear ADDR flag */
1991 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1992 }
1993 else
1994 {
1995 /* Enable Acknowledge */
1996 hi2c->Instance->CR1 |= I2C_CR1_ACK;
1997
1998 /* Clear ADDR flag */
1999 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2000 }
2001
2002 /* Process Unlocked */
2003 __HAL_UNLOCK(hi2c);
2004
2005 /* Note : The I2C interrupts must be enabled after unlocking current process
2006 to avoid the risk of I2C interrupt handle execution before current
2007 process unlock */
2008
2009 /* Enable EVT, BUF and ERR interrupt */
2010 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2011
2012 return HAL_OK;
2013 }
2014 else
2015 {
2016 return HAL_BUSY;
2017 }
2018 }
2019 /**
2020 * @brief Write an amount of data in no-blocking mode with DMA to a specific memory address
2021 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2022 * the configuration information for I2C module
2023 * @param DevAddress: Target device address
2024 * @param MemAddress: Internal memory address
2025 * @param MemAddSize: Size of internal memory address
2026 * @param pData: Pointer to data buffer
2027 * @param Size: Amount of data to be sent
2028 * @retval HAL status
2029 */
2030 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
2031 {
2032 /* Check the parameters */
2033 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
2034
2035 if(hi2c->State == HAL_I2C_STATE_READY)
2036 {
2037 if((pData == HAL_NULL) || (Size == 0))
2038 {
2039 return HAL_ERROR;
2040 }
2041
2042 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
2043 {
2044 return HAL_BUSY;
2045 }
2046
2047 /* Process Locked */
2048 __HAL_LOCK(hi2c);
2049
2050 hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
2051 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2052
2053 hi2c->pBuffPtr = pData;
2054 hi2c->XferSize = Size;
2055 hi2c->XferCount = Size;
2056
2057 /* Set the I2C DMA transfert complete callback */
2058 hi2c->hdmatx->XferCpltCallback = I2C_DMAMemTransmitCplt;
2059
2060 /* Set the DMA error callback */
2061 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
2062
2063 /* Enable the DMA Stream */
2064 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
2065
2066 /* Send Slave Address and Memory Address */
2067 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
2068 {
2069 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
2070 {
2071 /* Process Unlocked */
2072 __HAL_UNLOCK(hi2c);
2073 return HAL_ERROR;
2074 }
2075 else
2076 {
2077 /* Process Unlocked */
2078 __HAL_UNLOCK(hi2c);
2079 return HAL_TIMEOUT;
2080 }
2081 }
2082
2083 /* Enable DMA Request */
2084 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
2085
2086 /* Process Unlocked */
2087 __HAL_UNLOCK(hi2c);
2088
2089 return HAL_OK;
2090 }
2091 else
2092 {
2093 return HAL_BUSY;
2094 }
2095 }
2096
2097 /**
2098 * @brief Reads an amount of data in no-blocking mode with DMA from a specific memory address.
2099 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2100 * the configuration information for I2C module
2101 * @param DevAddress: Target device address
2102 * @param MemAddress: Internal memory address
2103 * @param MemAddSize: Size of internal memory address
2104 * @param pData: Pointer to data buffer
2105 * @param Size: Amount of data to be read
2106 * @retval HAL status
2107 */
2108 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
2109 {
2110 /* Check the parameters */
2111 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
2112
2113 if(hi2c->State == HAL_I2C_STATE_READY)
2114 {
2115 if((pData == HAL_NULL) || (Size == 0))
2116 {
2117 return HAL_ERROR;
2118 }
2119
2120 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
2121 {
2122 return HAL_BUSY;
2123 }
2124
2125 /* Process Locked */
2126 __HAL_LOCK(hi2c);
2127
2128 hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
2129 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2130
2131 hi2c->pBuffPtr = pData;
2132 hi2c->XferSize = Size;
2133 hi2c->XferCount = Size;
2134
2135 /* Set the I2C DMA transfert complete callback */
2136 hi2c->hdmarx->XferCpltCallback = I2C_DMAMemReceiveCplt;
2137
2138 /* Set the DMA error callback */
2139 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
2140
2141 /* Enable the DMA Stream */
2142 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
2143
2144 /* Send Slave Address and Memory Address */
2145 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
2146 {
2147 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
2148 {
2149 /* Process Unlocked */
2150 __HAL_UNLOCK(hi2c);
2151 return HAL_ERROR;
2152 }
2153 else
2154 {
2155 /* Process Unlocked */
2156 __HAL_UNLOCK(hi2c);
2157 return HAL_TIMEOUT;
2158 }
2159 }
2160
2161 if(Size == 1)
2162 {
2163 /* Disable Acknowledge */
2164 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
2165 }
2166 else
2167 {
2168 /* Enable Last DMA bit */
2169 hi2c->Instance->CR2 |= I2C_CR2_LAST;
2170 }
2171
2172 /* Enable DMA Request */
2173 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
2174
2175 /* Clear ADDR flag */
2176 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2177
2178 /* Process Unlocked */
2179 __HAL_UNLOCK(hi2c);
2180
2181 return HAL_OK;
2182 }
2183 else
2184 {
2185 return HAL_BUSY;
2186 }
2187 }
2188
2189 /**
2190 * @brief Checks if target device is ready for communication.
2191 * @note This function is used with Memory devices
2192 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2193 * the configuration information for I2C module
2194 * @param DevAddress: Target device address
2195 * @param Trials: Number of trials
2196 * @param Timeout: Timeout duration
2197 * @retval HAL status
2198 */
2199 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
2200 {
2201 uint32_t tickstart = 0, tmp1 = 0, tmp2 = 0, tmp3 = 0, I2C_Trials = 1;
2202
2203 if(hi2c->State == HAL_I2C_STATE_READY)
2204 {
2205 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
2206 {
2207 return HAL_BUSY;
2208 }
2209
2210 /* Process Locked */
2211 __HAL_LOCK(hi2c);
2212
2213 hi2c->State = HAL_I2C_STATE_BUSY;
2214 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2215
2216 do
2217 {
2218 /* Generate Start */
2219 hi2c->Instance->CR1 |= I2C_CR1_START;
2220
2221 /* Wait until SB flag is set */
2222 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
2223 {
2224 return HAL_TIMEOUT;
2225 }
2226
2227 /* Send slave address */
2228 hi2c->Instance->DR = __HAL_I2C_7BIT_ADD_WRITE(DevAddress);
2229
2230 /* Wait until ADDR or AF flag are set */
2231 /* Get tick */
2232 tickstart = HAL_GetTick();
2233
2234 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
2235 tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
2236 tmp3 = hi2c->State;
2237 while((tmp1 == RESET) && (tmp2 == RESET) && (tmp3 != HAL_I2C_STATE_TIMEOUT))
2238 {
2239 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
2240 {
2241 hi2c->State = HAL_I2C_STATE_TIMEOUT;
2242 }
2243 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
2244 tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
2245 tmp3 = hi2c->State;
2246 }
2247
2248 hi2c->State = HAL_I2C_STATE_READY;
2249
2250 /* Check if the ADDR flag has been set */
2251 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
2252 {
2253 /* Generate Stop */
2254 hi2c->Instance->CR1 |= I2C_CR1_STOP;
2255
2256 /* Clear ADDR Flag */
2257 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2258
2259 /* Wait until BUSY flag is reset */
2260 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
2261 {
2262 return HAL_TIMEOUT;
2263 }
2264
2265 hi2c->State = HAL_I2C_STATE_READY;
2266
2267 /* Process Unlocked */
2268 __HAL_UNLOCK(hi2c);
2269
2270 return HAL_OK;
2271 }
2272 else
2273 {
2274 /* Generate Stop */
2275 hi2c->Instance->CR1 |= I2C_CR1_STOP;
2276
2277 /* Clear AF Flag */
2278 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
2279
2280 /* Wait until BUSY flag is reset */
2281 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
2282 {
2283 return HAL_TIMEOUT;
2284 }
2285 }
2286 }while(I2C_Trials++ < Trials);
2287
2288 hi2c->State = HAL_I2C_STATE_READY;
2289
2290 /* Process Unlocked */
2291 __HAL_UNLOCK(hi2c);
2292
2293 return HAL_ERROR;
2294 }
2295 else
2296 {
2297 return HAL_BUSY;
2298 }
2299 }
2300
2301 /**
2302 * @brief This function handles I2C event interrupt request.
2303 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2304 * the configuration information for I2C module
2305 * @retval HAL status
2306 */
2307 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
2308 {
2309 uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0, tmp4 = 0;
2310 /* Master mode selected */
2311 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_MSL) == SET)
2312 {
2313 /* I2C in mode Transmitter -----------------------------------------------*/
2314 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == SET)
2315 {
2316 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE);
2317 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
2318 tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
2319 tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
2320 /* TXE set and BTF reset -----------------------------------------------*/
2321 if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
2322 {
2323 I2C_MasterTransmit_TXE(hi2c);
2324 }
2325 /* BTF set -------------------------------------------------------------*/
2326 else if((tmp3 == SET) && (tmp4 == SET))
2327 {
2328 I2C_MasterTransmit_BTF(hi2c);
2329 }
2330 }
2331 /* I2C in mode Receiver --------------------------------------------------*/
2332 else
2333 {
2334 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE);
2335 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
2336 tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
2337 tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
2338 /* RXNE set and BTF reset -----------------------------------------------*/
2339 if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
2340 {
2341 I2C_MasterReceive_RXNE(hi2c);
2342 }
2343 /* BTF set -------------------------------------------------------------*/
2344 else if((tmp3 == SET) && (tmp4 == SET))
2345 {
2346 I2C_MasterReceive_BTF(hi2c);
2347 }
2348 }
2349 }
2350 /* Slave mode selected */
2351 else
2352 {
2353 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
2354 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_EVT));
2355 tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF);
2356 tmp4 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA);
2357 /* ADDR set --------------------------------------------------------------*/
2358 if((tmp1 == SET) && (tmp2 == SET))
2359 {
2360 I2C_Slave_ADDR(hi2c);
2361 }
2362 /* STOPF set --------------------------------------------------------------*/
2363 else if((tmp3 == SET) && (tmp2 == SET))
2364 {
2365 I2C_Slave_STOPF(hi2c);
2366 }
2367 /* I2C in mode Transmitter -----------------------------------------------*/
2368 else if(tmp4 == SET)
2369 {
2370 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE);
2371 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
2372 tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
2373 tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
2374 /* TXE set and BTF reset -----------------------------------------------*/
2375 if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
2376 {
2377 I2C_SlaveTransmit_TXE(hi2c);
2378 }
2379 /* BTF set -------------------------------------------------------------*/
2380 else if((tmp3 == SET) && (tmp4 == SET))
2381 {
2382 I2C_SlaveTransmit_BTF(hi2c);
2383 }
2384 }
2385 /* I2C in mode Receiver --------------------------------------------------*/
2386 else
2387 {
2388 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE);
2389 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
2390 tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
2391 tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
2392 /* RXNE set and BTF reset ----------------------------------------------*/
2393 if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
2394 {
2395 I2C_SlaveReceive_RXNE(hi2c);
2396 }
2397 /* BTF set -------------------------------------------------------------*/
2398 else if((tmp3 == SET) && (tmp4 == SET))
2399 {
2400 I2C_SlaveReceive_BTF(hi2c);
2401 }
2402 }
2403 }
2404 }
2405
2406 /**
2407 * @brief This function handles I2C error interrupt request.
2408 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2409 * the configuration information for I2C module
2410 * @retval HAL status
2411 */
2412 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
2413 {
2414 uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0;
2415
2416 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BERR);
2417 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
2418 /* I2C Bus error interrupt occurred ----------------------------------------*/
2419 if((tmp1 == SET) && (tmp2 == SET))
2420 {
2421 hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;
2422
2423 /* Clear BERR flag */
2424 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
2425 }
2426
2427 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ARLO);
2428 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
2429 /* I2C Arbitration Loss error interrupt occurred ---------------------------*/
2430 if((tmp1 == SET) && (tmp2 == SET))
2431 {
2432 hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;
2433
2434 /* Clear ARLO flag */
2435 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
2436 }
2437
2438 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
2439 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
2440 /* I2C Acknowledge failure error interrupt occurred ------------------------*/
2441 if((tmp1 == SET) && (tmp2 == SET))
2442 {
2443 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_MSL);
2444 tmp2 = hi2c->XferCount;
2445 tmp3 = hi2c->State;
2446 if((tmp1 == RESET) && (tmp2 == 0) && (tmp3 == HAL_I2C_STATE_BUSY_TX))
2447 {
2448 I2C_Slave_AF(hi2c);
2449 }
2450 else
2451 {
2452 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
2453 /* Clear AF flag */
2454 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
2455 }
2456 }
2457
2458 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_OVR);
2459 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
2460 /* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
2461 if((tmp1 == SET) && (tmp2 == SET))
2462 {
2463 hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;
2464 /* Clear OVR flag */
2465 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
2466 }
2467
2468 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
2469 {
2470 hi2c->State = HAL_I2C_STATE_READY;
2471
2472 HAL_I2C_ErrorCallback(hi2c);
2473 }
2474 }
2475
2476 /**
2477 * @brief Master Tx Transfer completed callbacks.
2478 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2479 * the configuration information for I2C module
2480 * @retval None
2481 */
2482 __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
2483 {
2484 /* NOTE : This function Should not be modified, when the callback is needed,
2485 the HAL_I2C_TxCpltCallback could be implemented in the user file
2486 */
2487 }
2488
2489 /**
2490 * @brief Master Rx Transfer completed callbacks.
2491 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2492 * the configuration information for I2C module
2493 * @retval None
2494 */
2495 __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
2496 {
2497 /* NOTE : This function Should not be modified, when the callback is needed,
2498 the HAL_I2C_TxCpltCallback could be implemented in the user file
2499 */
2500 }
2501
2502 /** @brief Slave Tx Transfer completed callbacks.
2503 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2504 * the configuration information for I2C module
2505 * @retval None
2506 */
2507 __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
2508 {
2509 /* NOTE : This function Should not be modified, when the callback is needed,
2510 the HAL_I2C_TxCpltCallback could be implemented in the user file
2511 */
2512 }
2513
2514 /**
2515 * @brief Slave Rx Transfer completed callbacks.
2516 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2517 * the configuration information for I2C module
2518 * @retval None
2519 */
2520 __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
2521 {
2522 /* NOTE : This function Should not be modified, when the callback is needed,
2523 the HAL_I2C_TxCpltCallback could be implemented in the user file
2524 */
2525 }
2526
2527 /**
2528 * @brief Memory Tx Transfer completed callbacks.
2529 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2530 * the configuration information for I2C module
2531 * @retval None
2532 */
2533 __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
2534 {
2535 /* NOTE : This function Should not be modified, when the callback is needed,
2536 the HAL_I2C_TxCpltCallback could be implemented in the user file
2537 */
2538 }
2539
2540 /**
2541 * @brief Memory Rx Transfer completed callbacks.
2542 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2543 * the configuration information for I2C module
2544 * @retval None
2545 */
2546 __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
2547 {
2548 /* NOTE : This function Should not be modified, when the callback is needed,
2549 the HAL_I2C_TxCpltCallback could be implemented in the user file
2550 */
2551 }
2552
2553 /**
2554 * @brief I2C error callbacks.
2555 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2556 * the configuration information for I2C module
2557 * @retval None
2558 */
2559 __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
2560 {
2561 /* NOTE : This function Should not be modified, when the callback is needed,
2562 the HAL_I2C_ErrorCallback could be implemented in the user file
2563 */
2564 }
2565
2566 /**
2567 * @}
2568 */
2569
2570 /** @defgroup I2C_Group3 Peripheral State and Errors functions
2571 * @brief Peripheral State and Errors functions
2572 *
2573 @verbatim
2574 ===============================================================================
2575 ##### Peripheral State and Errors functions #####
2576 ===============================================================================
2577 [..]
2578 This subsection permits to get in run-time the status of the peripheral
2579 and the data flow.
2580
2581 @endverbatim
2582 * @{
2583 */
2584
2585 /**
2586 * @brief Returns the I2C state.
2587 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2588 * the configuration information for I2C module
2589 * @retval HAL state
2590 */
2591 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
2592 {
2593 return hi2c->State;
2594 }
2595
2596 /**
2597 * @brief Return the I2C error code
2598 * @param hi2c : pointer to a I2C_HandleTypeDef structure that contains
2599 * the configuration information for the specified I2C.
2600 * @retval I2C Error Code
2601 */
2602 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
2603 {
2604 return hi2c->ErrorCode;
2605 }
2606
2607 /**
2608 * @}
2609 */
2610
2611 /**
2612 * @brief Handle TXE flag for Master
2613 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2614 * the configuration information for I2C module
2615 * @retval HAL status
2616 */
2617 static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
2618 {
2619 /* Write data to DR */
2620 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
2621 hi2c->XferCount--;
2622
2623 if(hi2c->XferCount == 0)
2624 {
2625 /* Disable BUF interrupt */
2626 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
2627 }
2628
2629 return HAL_OK;
2630 }
2631
2632 /**
2633 * @brief Handle BTF flag for Master transmitter
2634 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2635 * the configuration information for I2C module
2636 * @retval HAL status
2637 */
2638 static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
2639 {
2640 if(hi2c->XferCount != 0)
2641 {
2642 /* Write data to DR */
2643 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
2644 hi2c->XferCount--;
2645 }
2646 else
2647 {
2648 /* Disable EVT, BUF and ERR interrupt */
2649 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2650
2651 /* Generate Stop */
2652 hi2c->Instance->CR1 |= I2C_CR1_STOP;
2653
2654 /* Wait until BUSY flag is reset */
2655 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
2656 {
2657 return HAL_TIMEOUT;
2658 }
2659
2660 if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX)
2661 {
2662 hi2c->State = HAL_I2C_STATE_READY;
2663
2664 HAL_I2C_MemTxCpltCallback(hi2c);
2665 }
2666 else
2667 {
2668 hi2c->State = HAL_I2C_STATE_READY;
2669
2670 HAL_I2C_MasterTxCpltCallback(hi2c);
2671 }
2672 }
2673 return HAL_OK;
2674 }
2675
2676 /**
2677 * @brief Handle RXNE flag for Master
2678 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2679 * the configuration information for I2C module
2680 * @retval HAL status
2681 */
2682 static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
2683 {
2684 uint32_t tmp = 0;
2685
2686 tmp = hi2c->XferCount;
2687 if(tmp > 3)
2688 {
2689 /* Read data from DR */
2690 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2691 hi2c->XferCount--;
2692 }
2693 else if((tmp == 2) || (tmp == 3))
2694 {
2695 /* Disable BUF interrupt */
2696 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
2697 }
2698 else
2699 {
2700 /* Disable EVT, BUF and ERR interrupt */
2701 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2702
2703 /* Read data from DR */
2704 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2705 hi2c->XferCount--;
2706
2707 /* Wait until BUSY flag is reset */
2708 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
2709 {
2710 return HAL_TIMEOUT;
2711 }
2712
2713 if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)
2714 {
2715 hi2c->State = HAL_I2C_STATE_READY;
2716
2717 HAL_I2C_MemRxCpltCallback(hi2c);
2718 }
2719 else
2720 {
2721 hi2c->State = HAL_I2C_STATE_READY;
2722
2723 HAL_I2C_MasterRxCpltCallback(hi2c);
2724 }
2725 }
2726 return HAL_OK;
2727 }
2728
2729 /**
2730 * @brief Handle BTF flag for Master receiver
2731 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2732 * the configuration information for I2C module
2733 * @retval HAL status
2734 */
2735 static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
2736 {
2737 if(hi2c->XferCount == 3)
2738 {
2739 /* Disable Acknowledge */
2740 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
2741
2742 /* Read data from DR */
2743 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2744 hi2c->XferCount--;
2745 }
2746 else if(hi2c->XferCount == 2)
2747 {
2748 /* Generate Stop */
2749 hi2c->Instance->CR1 |= I2C_CR1_STOP;
2750
2751 /* Read data from DR */
2752 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2753 hi2c->XferCount--;
2754
2755 /* Read data from DR */
2756 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2757 hi2c->XferCount--;
2758
2759 /* Disable EVT and ERR interrupt */
2760 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
2761
2762 /* Wait until BUSY flag is reset */
2763 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
2764 {
2765 return HAL_TIMEOUT;
2766 }
2767
2768 if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)
2769 {
2770 hi2c->State = HAL_I2C_STATE_READY;
2771
2772 HAL_I2C_MemRxCpltCallback(hi2c);
2773 }
2774 else
2775 {
2776 hi2c->State = HAL_I2C_STATE_READY;
2777
2778 HAL_I2C_MasterRxCpltCallback(hi2c);
2779 }
2780 }
2781 else
2782 {
2783 /* Read data from DR */
2784 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2785 hi2c->XferCount--;
2786 }
2787 return HAL_OK;
2788 }
2789
2790 /**
2791 * @brief Handle TXE flag for Slave
2792 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2793 * the configuration information for I2C module
2794 * @retval HAL status
2795 */
2796 static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
2797 {
2798 if(hi2c->XferCount != 0)
2799 {
2800 /* Write data to DR */
2801 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
2802 hi2c->XferCount--;
2803 }
2804 return HAL_OK;
2805 }
2806
2807 /**
2808 * @brief Handle BTF flag for Slave transmitter
2809 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2810 * the configuration information for I2C module
2811 * @retval HAL status
2812 */
2813 static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
2814 {
2815 if(hi2c->XferCount != 0)
2816 {
2817 /* Write data to DR */
2818 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
2819 hi2c->XferCount--;
2820 }
2821 return HAL_OK;
2822 }
2823
2824 /**
2825 * @brief Handle RXNE flag for Slave
2826 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2827 * the configuration information for I2C module
2828 * @retval HAL status
2829 */
2830 static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
2831 {
2832 if(hi2c->XferCount != 0)
2833 {
2834 /* Read data from DR */
2835 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2836 hi2c->XferCount--;
2837 }
2838 return HAL_OK;
2839 }
2840
2841 /**
2842 * @brief Handle BTF flag for Slave receiver
2843 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2844 * the configuration information for I2C module
2845 * @retval HAL status
2846 */
2847 static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
2848 {
2849 if(hi2c->XferCount != 0)
2850 {
2851 /* Read data from DR */
2852 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2853 hi2c->XferCount--;
2854 }
2855 return HAL_OK;
2856 }
2857
2858 /**
2859 * @brief Handle ADD flag for Slave
2860 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2861 * the configuration information for I2C module
2862 * @retval HAL status
2863 */
2864 static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c)
2865 {
2866 /* Clear ADDR flag */
2867 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2868
2869 return HAL_OK;
2870 }
2871
2872 /**
2873 * @brief Handle STOPF flag for Slave
2874 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2875 * the configuration information for I2C module
2876 * @retval HAL status
2877 */
2878 static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
2879 {
2880 /* Disable EVT, BUF and ERR interrupt */
2881 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2882
2883 /* Clear STOPF flag */
2884 __HAL_I2C_CLEAR_STOPFLAG(hi2c);
2885
2886 /* Disable Acknowledge */
2887 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
2888
2889 /* Wait until BUSY flag is reset */
2890 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
2891 {
2892 return HAL_TIMEOUT;
2893 }
2894
2895 hi2c->State = HAL_I2C_STATE_READY;
2896
2897 HAL_I2C_SlaveRxCpltCallback(hi2c);
2898
2899 return HAL_OK;
2900 }
2901
2902 /**
2903 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2904 * the configuration information for I2C module
2905 * @retval HAL status
2906 */
2907 static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
2908 {
2909 /* Disable EVT, BUF and ERR interrupt */
2910 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2911
2912 /* Clear AF flag */
2913 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
2914
2915 /* Disable Acknowledge */
2916 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
2917
2918 /* Wait until BUSY flag is reset */
2919 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
2920 {
2921 return HAL_TIMEOUT;
2922 }
2923
2924 hi2c->State = HAL_I2C_STATE_READY;
2925
2926 HAL_I2C_SlaveTxCpltCallback(hi2c);
2927
2928 return HAL_OK;
2929 }
2930
2931 /**
2932 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2933 * the configuration information for I2C module
2934 * @param DevAddress: Target device address
2935 * @retval HAL status
2936 */
2937 static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout)
2938 {
2939 /* Generate Start */
2940 hi2c->Instance->CR1 |= I2C_CR1_START;
2941
2942 /* Wait until SB flag is set */
2943 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
2944 {
2945 return HAL_TIMEOUT;
2946 }
2947
2948 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
2949 {
2950 /* Send slave address */
2951 hi2c->Instance->DR = __HAL_I2C_7BIT_ADD_WRITE(DevAddress);
2952 }
2953 else
2954 {
2955 /* Send header of slave address */
2956 hi2c->Instance->DR = __HAL_I2C_10BIT_HEADER_WRITE(DevAddress);
2957
2958 /* Wait until ADD10 flag is set */
2959 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout) != HAL_OK)
2960 {
2961 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
2962 {
2963 return HAL_ERROR;
2964 }
2965 else
2966 {
2967 return HAL_TIMEOUT;
2968 }
2969 }
2970
2971 /* Send slave address */
2972 hi2c->Instance->DR = __HAL_I2C_10BIT_ADDRESS(DevAddress);
2973 }
2974
2975 /* Wait until ADDR flag is set */
2976 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
2977 {
2978 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
2979 {
2980 return HAL_ERROR;
2981 }
2982 else
2983 {
2984 return HAL_TIMEOUT;
2985 }
2986 }
2987
2988 return HAL_OK;
2989 }
2990
2991 /**
2992 * @brief Master sends target device address for read request.
2993 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2994 * the configuration information for I2C module
2995 * @param DevAddress: Target device address
2996 * @retval HAL status
2997 */
2998 static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout)
2999 {
3000 /* Enable Acknowledge */
3001 hi2c->Instance->CR1 |= I2C_CR1_ACK;
3002
3003 /* Generate Start */
3004 hi2c->Instance->CR1 |= I2C_CR1_START;
3005
3006 /* Wait until SB flag is set */
3007 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3008 {
3009 return HAL_TIMEOUT;
3010 }
3011
3012 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
3013 {
3014 /* Send slave address */
3015 hi2c->Instance->DR = __HAL_I2C_7BIT_ADD_READ(DevAddress);
3016 }
3017 else
3018 {
3019 /* Send header of slave address */
3020 hi2c->Instance->DR = __HAL_I2C_10BIT_HEADER_WRITE(DevAddress);
3021
3022 /* Wait until ADD10 flag is set */
3023 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout) != HAL_OK)
3024 {
3025 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3026 {
3027 return HAL_ERROR;
3028 }
3029 else
3030 {
3031 return HAL_TIMEOUT;
3032 }
3033 }
3034
3035 /* Send slave address */
3036 hi2c->Instance->DR = __HAL_I2C_10BIT_ADDRESS(DevAddress);
3037
3038 /* Wait until ADDR flag is set */
3039 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3040 {
3041 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3042 {
3043 return HAL_ERROR;
3044 }
3045 else
3046 {
3047 return HAL_TIMEOUT;
3048 }
3049 }
3050
3051 /* Clear ADDR flag */
3052 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
3053
3054 /* Generate Restart */
3055 hi2c->Instance->CR1 |= I2C_CR1_START;
3056
3057 /* Wait until SB flag is set */
3058 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3059 {
3060 return HAL_TIMEOUT;
3061 }
3062
3063 /* Send header of slave address */
3064 hi2c->Instance->DR = __HAL_I2C_10BIT_HEADER_READ(DevAddress);
3065 }
3066
3067 /* Wait until ADDR flag is set */
3068 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3069 {
3070 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3071 {
3072 return HAL_ERROR;
3073 }
3074 else
3075 {
3076 return HAL_TIMEOUT;
3077 }
3078 }
3079
3080 return HAL_OK;
3081 }
3082
3083 /**
3084 * @brief Master sends target device address followed by internal memory address for write request.
3085 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
3086 * the configuration information for I2C module
3087 * @param DevAddress: Target device address
3088 * @param MemAddress: Internal memory address
3089 * @param MemAddSize: Size of internal memory address
3090 * @retval HAL status
3091 */
3092 static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
3093 {
3094 /* Generate Start */
3095 hi2c->Instance->CR1 |= I2C_CR1_START;
3096
3097 /* Wait until SB flag is set */
3098 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3099 {
3100 return HAL_TIMEOUT;
3101 }
3102
3103 /* Send slave address */
3104 hi2c->Instance->DR = __HAL_I2C_7BIT_ADD_WRITE(DevAddress);
3105
3106 /* Wait until ADDR flag is set */
3107 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3108 {
3109 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3110 {
3111 return HAL_ERROR;
3112 }
3113 else
3114 {
3115 return HAL_TIMEOUT;
3116 }
3117 }
3118
3119 /* Clear ADDR flag */
3120 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
3121
3122 /* Wait until TXE flag is set */
3123 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3124 {
3125 return HAL_TIMEOUT;
3126 }
3127
3128 /* If Memory address size is 8Bit */
3129 if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
3130 {
3131 /* Send Memory Address */
3132 hi2c->Instance->DR = __HAL_I2C_MEM_ADD_LSB(MemAddress);
3133 }
3134 /* If Memory address size is 16Bit */
3135 else
3136 {
3137 /* Send MSB of Memory Address */
3138 hi2c->Instance->DR = __HAL_I2C_MEM_ADD_MSB(MemAddress);
3139
3140 /* Wait until TXE flag is set */
3141 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3142 {
3143 return HAL_TIMEOUT;
3144 }
3145
3146 /* Send LSB of Memory Address */
3147 hi2c->Instance->DR = __HAL_I2C_MEM_ADD_LSB(MemAddress);
3148 }
3149
3150 return HAL_OK;
3151 }
3152
3153 /**
3154 * @brief Master sends target device address followed by internal memory address for read request.
3155 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
3156 * the configuration information for I2C module
3157 * @param DevAddress: Target device address
3158 * @param MemAddress: Internal memory address
3159 * @param MemAddSize: Size of internal memory address
3160 * @retval HAL status
3161 */
3162 static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
3163 {
3164 /* Enable Acknowledge */
3165 hi2c->Instance->CR1 |= I2C_CR1_ACK;
3166
3167 /* Generate Start */
3168 hi2c->Instance->CR1 |= I2C_CR1_START;
3169
3170 /* Wait until SB flag is set */
3171 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3172 {
3173 return HAL_TIMEOUT;
3174 }
3175
3176 /* Send slave address */
3177 hi2c->Instance->DR = __HAL_I2C_7BIT_ADD_WRITE(DevAddress);
3178
3179 /* Wait until ADDR flag is set */
3180 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3181 {
3182 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3183 {
3184 return HAL_ERROR;
3185 }
3186 else
3187 {
3188 return HAL_TIMEOUT;
3189 }
3190 }
3191
3192 /* Clear ADDR flag */
3193 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
3194
3195 /* Wait until TXE flag is set */
3196 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3197 {
3198 return HAL_TIMEOUT;
3199 }
3200
3201 /* If Memory address size is 8Bit */
3202 if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
3203 {
3204 /* Send Memory Address */
3205 hi2c->Instance->DR = __HAL_I2C_MEM_ADD_LSB(MemAddress);
3206 }
3207 /* If Memory address size is 16Bit */
3208 else
3209 {
3210 /* Send MSB of Memory Address */
3211 hi2c->Instance->DR = __HAL_I2C_MEM_ADD_MSB(MemAddress);
3212
3213 /* Wait until TXE flag is set */
3214 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3215 {
3216 return HAL_TIMEOUT;
3217 }
3218
3219 /* Send LSB of Memory Address */
3220 hi2c->Instance->DR = __HAL_I2C_MEM_ADD_LSB(MemAddress);
3221 }
3222
3223 /* Wait until TXE flag is set */
3224 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3225 {
3226 return HAL_TIMEOUT;
3227 }
3228
3229 /* Generate Restart */
3230 hi2c->Instance->CR1 |= I2C_CR1_START;
3231
3232 /* Wait until SB flag is set */
3233 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3234 {
3235 return HAL_TIMEOUT;
3236 }
3237
3238 /* Send slave address */
3239 hi2c->Instance->DR = __HAL_I2C_7BIT_ADD_READ(DevAddress);
3240
3241 /* Wait until ADDR flag is set */
3242 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3243 {
3244 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3245 {
3246 return HAL_ERROR;
3247 }
3248 else
3249 {
3250 return HAL_TIMEOUT;
3251 }
3252 }
3253
3254 return HAL_OK;
3255 }
3256
3257 /**
3258 * @brief DMA I2C master transmit process complete callback.
3259 * @param hdma: DMA handle
3260 * @retval None
3261 */
3262 static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma)
3263 {
3264 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3265
3266 /* Wait until BTF flag is reset */
3267 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
3268 {
3269 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3270 }
3271
3272 /* Generate Stop */
3273 hi2c->Instance->CR1 |= I2C_CR1_STOP;
3274
3275 /* Disable DMA Request */
3276 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
3277
3278 hi2c->XferCount = 0;
3279
3280 /* Wait until BUSY flag is reset */
3281 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3282 {
3283 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3284 }
3285
3286 hi2c->State = HAL_I2C_STATE_READY;
3287
3288 /* Check if Errors has been detected during transfer */
3289 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3290 {
3291 HAL_I2C_ErrorCallback(hi2c);
3292 }
3293 else
3294 {
3295 HAL_I2C_MasterTxCpltCallback(hi2c);
3296 }
3297 }
3298
3299 /**
3300 * @brief DMA I2C slave transmit process complete callback.
3301 * @param hdma: DMA handle
3302 * @retval None
3303 */
3304 static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma)
3305 {
3306 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3307
3308 /* Wait until AF flag is reset */
3309 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
3310 {
3311 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3312 }
3313
3314 /* Clear AF flag */
3315 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
3316
3317 /* Disable Address Acknowledge */
3318 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
3319
3320 /* Disable DMA Request */
3321 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
3322
3323 hi2c->XferCount = 0;
3324
3325 /* Wait until BUSY flag is reset */
3326 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3327 {
3328 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3329 }
3330
3331 hi2c->State = HAL_I2C_STATE_READY;
3332
3333 /* Check if Errors has been detected during transfer */
3334 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3335 {
3336 HAL_I2C_ErrorCallback(hi2c);
3337 }
3338 else
3339 {
3340 HAL_I2C_SlaveTxCpltCallback(hi2c);
3341 }
3342 }
3343
3344 /**
3345 * @brief DMA I2C master receive process complete callback
3346 * @param hdma: DMA handle
3347 * @retval None
3348 */
3349 static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma)
3350 {
3351 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3352
3353 /* Generate Stop */
3354 hi2c->Instance->CR1 |= I2C_CR1_STOP;
3355
3356 /* Disable Last DMA */
3357 hi2c->Instance->CR2 &= ~I2C_CR2_LAST;
3358
3359 /* Disable Acknowledge */
3360 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
3361
3362 /* Disable DMA Request */
3363 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
3364
3365 hi2c->XferCount = 0;
3366
3367 /* Wait until BUSY flag is reset */
3368 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3369 {
3370 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3371 }
3372
3373 hi2c->State = HAL_I2C_STATE_READY;
3374
3375 /* Check if Errors has been detected during transfer */
3376 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3377 {
3378 HAL_I2C_ErrorCallback(hi2c);
3379 }
3380 else
3381 {
3382 HAL_I2C_MasterRxCpltCallback(hi2c);
3383 }
3384 }
3385
3386 /**
3387 * @brief DMA I2C slave receive process complete callback.
3388 * @param hdma: DMA handle
3389 * @retval None
3390 */
3391 static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma)
3392 {
3393 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3394
3395 /* Wait until STOPF flag is reset */
3396 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
3397 {
3398 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3399 }
3400
3401 /* Clear STOPF flag */
3402 __HAL_I2C_CLEAR_STOPFLAG(hi2c);
3403
3404 /* Disable Address Acknowledge */
3405 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
3406
3407 /* Disable DMA Request */
3408 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
3409
3410 hi2c->XferCount = 0;
3411
3412 /* Wait until BUSY flag is reset */
3413 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3414 {
3415 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3416 }
3417
3418 hi2c->State = HAL_I2C_STATE_READY;
3419
3420 /* Check if Errors has been detected during transfer */
3421 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3422 {
3423 HAL_I2C_ErrorCallback(hi2c);
3424 }
3425 else
3426 {
3427 HAL_I2C_SlaveRxCpltCallback(hi2c);
3428 }
3429 }
3430
3431 /**
3432 * @brief DMA I2C Memory Write process complete callback
3433 * @param hdma: DMA handle
3434 * @retval None
3435 */
3436 static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma)
3437 {
3438 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3439
3440 /* Wait until BTF flag is reset */
3441 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
3442 {
3443 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3444 }
3445
3446 /* Generate Stop */
3447 hi2c->Instance->CR1 |= I2C_CR1_STOP;
3448
3449 /* Disable DMA Request */
3450 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
3451
3452 hi2c->XferCount = 0;
3453
3454 /* Wait until BUSY flag is reset */
3455 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3456 {
3457 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3458 }
3459
3460 hi2c->State = HAL_I2C_STATE_READY;
3461
3462 /* Check if Errors has been detected during transfer */
3463 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3464 {
3465 HAL_I2C_ErrorCallback(hi2c);
3466 }
3467 else
3468 {
3469 HAL_I2C_MemTxCpltCallback(hi2c);
3470 }
3471 }
3472
3473 /**
3474 * @brief DMA I2C Memory Read process complete callback
3475 * @param hdma: DMA handle
3476 * @retval None
3477 */
3478 static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma)
3479 {
3480 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3481
3482 /* Generate Stop */
3483 hi2c->Instance->CR1 |= I2C_CR1_STOP;
3484
3485 /* Disable Last DMA */
3486 hi2c->Instance->CR2 &= ~I2C_CR2_LAST;
3487
3488 /* Disable Acknowledge */
3489 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
3490
3491 /* Disable DMA Request */
3492 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
3493
3494 hi2c->XferCount = 0;
3495
3496 /* Wait until BUSY flag is reset */
3497 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3498 {
3499 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3500 }
3501
3502 hi2c->State = HAL_I2C_STATE_READY;
3503
3504 /* Check if Errors has been detected during transfer */
3505 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3506 {
3507 HAL_I2C_ErrorCallback(hi2c);
3508 }
3509 else
3510 {
3511 HAL_I2C_MemRxCpltCallback(hi2c);
3512 }
3513 }
3514
3515 /**
3516 * @brief DMA I2C communication error callback.
3517 * @param hdma: DMA handle
3518 * @retval None
3519 */
3520 static void I2C_DMAError(DMA_HandleTypeDef *hdma)
3521 {
3522 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3523
3524 /* Disable Acknowledge */
3525 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
3526
3527 hi2c->XferCount = 0;
3528
3529 hi2c->State = HAL_I2C_STATE_READY;
3530
3531 hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
3532
3533 HAL_I2C_ErrorCallback(hi2c);
3534 }
3535
3536 /**
3537 * @brief This function handles I2C Communication Timeout.
3538 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
3539 * the configuration information for I2C module
3540 * @param Flag: specifies the I2C flag to check.
3541 * @param Status: The new Flag status (SET or RESET).
3542 * @param Timeout: Timeout duration
3543 * @retval HAL status
3544 */
3545 static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
3546 {
3547 uint32_t tickstart = 0;
3548
3549 /* Get tick */
3550 tickstart = HAL_GetTick();
3551
3552 /* Wait until flag is set */
3553 if(Status == RESET)
3554 {
3555 while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
3556 {
3557 /* Check for the Timeout */
3558 if(Timeout != HAL_MAX_DELAY)
3559 {
3560 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
3561 {
3562 hi2c->State= HAL_I2C_STATE_READY;
3563
3564 /* Process Unlocked */
3565 __HAL_UNLOCK(hi2c);
3566
3567 return HAL_TIMEOUT;
3568 }
3569 }
3570 }
3571 }
3572 else
3573 {
3574 while(__HAL_I2C_GET_FLAG(hi2c, Flag) != RESET)
3575 {
3576 /* Check for the Timeout */
3577 if(Timeout != HAL_MAX_DELAY)
3578 {
3579 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
3580 {
3581 hi2c->State= HAL_I2C_STATE_READY;
3582
3583 /* Process Unlocked */
3584 __HAL_UNLOCK(hi2c);
3585
3586 return HAL_TIMEOUT;
3587 }
3588 }
3589 }
3590 }
3591 return HAL_OK;
3592 }
3593
3594 /**
3595 * @brief This function handles I2C Communication Timeout for Master addressing phase.
3596 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
3597 * the configuration information for I2C module
3598 * @param Flag: specifies the I2C flag to check.
3599 * @param Timeout: Timeout duration
3600 * @retval HAL status
3601 */
3602 static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout)
3603 {
3604 uint32_t tickstart = 0;
3605
3606 /* Get tick */
3607 tickstart = HAL_GetTick();
3608
3609 while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
3610 {
3611 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
3612 {
3613 /* Generate Stop */
3614 hi2c->Instance->CR1 |= I2C_CR1_STOP;
3615
3616 /* Clear AF Flag */
3617 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
3618
3619 hi2c->ErrorCode = HAL_I2C_ERROR_AF;
3620 hi2c->State= HAL_I2C_STATE_READY;
3621
3622 /* Process Unlocked */
3623 __HAL_UNLOCK(hi2c);
3624
3625 return HAL_ERROR;
3626 }
3627
3628 /* Check for the Timeout */
3629 if(Timeout != HAL_MAX_DELAY)
3630 {
3631 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
3632 {
3633 hi2c->State= HAL_I2C_STATE_READY;
3634
3635 /* Process Unlocked */
3636 __HAL_UNLOCK(hi2c);
3637
3638 return HAL_TIMEOUT;
3639 }
3640 }
3641 }
3642 return HAL_OK;
3643 }
3644
3645 /**
3646 * @}
3647 */
3648
3649 #endif /* HAL_I2C_MODULE_ENABLED */
3650
3651 /**
3652 * @}
3653 */
3654
3655 /**
3656 * @}
3657 */
3658
3659 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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