tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_nor.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f4xx_hal_nor.h
   4   * @author  MCD Application Team
   5   * @version V1.1.0
   6   * @date    19-June-2014
   7   * @brief   Header file of NOR HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32F4xx_HAL_NOR_H
  40 #define __STM32F4xx_HAL_NOR_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 /* Includes ------------------------------------------------------------------*/
  47 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
  48   #include "stm32f4xx_ll_fsmc.h"
  49 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
  50
  51 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
  52   #include "stm32f4xx_ll_fmc.h"
  53 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
  54
  55 /** @addtogroup STM32F4xx_HAL_Driver
  56   * @{
  57   */
  58
  59 /** @addtogroup NOR
  60   * @{
  61   */
  62
  63 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
  64
  65 /* Exported typedef ----------------------------------------------------------*/
  66 /**
  67   * @brief  HAL SRAM State structures definition
  68   */
  69 typedef enum
  70 {
  71   HAL_NOR_STATE_RESET             = 0x00,  /*!< NOR not yet initialized or disabled  */
  72   HAL_NOR_STATE_READY             = 0x01,  /*!< NOR initialized and ready for use    */
  73   HAL_NOR_STATE_BUSY              = 0x02,  /*!< NOR internal processing is ongoing   */
  74   HAL_NOR_STATE_ERROR             = 0x03,  /*!< NOR error state                      */
  75   HAL_NOR_STATE_PROTECTED         = 0x04   /*!< NOR NORSRAM device write protected   */
  76 }HAL_NOR_StateTypeDef;
  77
  78 /**
  79   * @brief  FMC NOR Status typedef
  80   */
  81 typedef enum
  82 {
  83   NOR_SUCCESS = 0,
  84   NOR_ONGOING,
  85   NOR_ERROR,
  86   NOR_TIMEOUT
  87 }NOR_StatusTypedef;
  88
  89 /**
  90   * @brief  FMC NOR ID typedef
  91   */
  92 typedef struct
  93 {
  94   uint16_t Manufacturer_Code;  /*!< Defines the device's manufacturer code used to identify the memory       */
  95
  96   uint16_t Device_Code1;
  97
  98   uint16_t Device_Code2;
  99
 100   uint16_t Device_Code3;       /*!< Defines the devices' codes used to identify the memory.
 101                                     These codes can be accessed by performing read operations with specific
 102                                     control signals and addresses set.They can also be accessed by issuing
 103                                     an Auto Select command                                                   */
 104 }NOR_IDTypeDef;
 105
 106 /**
 107   * @brief  FMC NOR CFI typedef
 108   */
 109 typedef struct
 110 {
 111   /*!< Defines the information stored in the memory's Common flash interface
 112        which contains a description of various electrical and timing parameters,
 113        density information and functions supported by the memory                   */
 114
 115   uint16_t CFI_1;
 116
 117   uint16_t CFI_2;
 118
 119   uint16_t CFI_3;
 120
 121   uint16_t CFI_4;
 122 }NOR_CFITypeDef;
 123
 124 /**
 125   * @brief  NOR handle Structure definition
 126   */
 127 typedef struct
 128 {
 129   FMC_NORSRAM_TypeDef           *Instance;    /*!< Register base address                        */
 130
 131   FMC_NORSRAM_EXTENDED_TypeDef  *Extended;    /*!< Extended mode register base address          */
 132
 133   FMC_NORSRAM_InitTypeDef       Init;         /*!< NOR device control configuration parameters  */
 134
 135   HAL_LockTypeDef               Lock;         /*!< NOR locking object                           */
 136
 137   __IO HAL_NOR_StateTypeDef     State;        /*!< NOR device access state                      */
 138
 139 }NOR_HandleTypeDef;
 140
 141 /* Exported constants --------------------------------------------------------*/
 142 /** @defgroup NOR_Exported_Constants
 143   * @{
 144   */
 145 /* NOR device IDs addresses */
 146 #define MC_ADDRESS               ((uint16_t)0x0000)
 147 #define DEVICE_CODE1_ADDR        ((uint16_t)0x0001)
 148 #define DEVICE_CODE2_ADDR        ((uint16_t)0x000E)
 149 #define DEVICE_CODE3_ADDR        ((uint16_t)0x000F)
 150
 151 /* NOR CFI IDs addresses */
 152 #define CFI1_ADDRESS             ((uint16_t)0x61)
 153 #define CFI2_ADDRESS             ((uint16_t)0x62)
 154 #define CFI3_ADDRESS             ((uint16_t)0x63)
 155 #define CFI4_ADDRESS             ((uint16_t)0x64)
 156
 157 /* NOR operation wait timeout */
 158 #define NOR_TMEOUT               ((uint16_t)0xFFFF)
 159
 160 /* NOR memory data width */
 161 #define NOR_MEMORY_8B            ((uint8_t)0x0)
 162 #define NOR_MEMORY_16B           ((uint8_t)0x1)
 163
 164 /* NOR memory device read/write start address */
 165 #define NOR_MEMORY_ADRESS1       ((uint32_t)0x60000000)
 166 #define NOR_MEMORY_ADRESS2       ((uint32_t)0x64000000)
 167 #define NOR_MEMORY_ADRESS3       ((uint32_t)0x68000000)
 168 #define NOR_MEMORY_ADRESS4       ((uint32_t)0x6C000000)
 169
 170 /**
 171   * @}
 172   */
 173
 174 /* Exported macro ------------------------------------------------------------*/
 175
 176 /** @brief Reset NOR handle state
 177   * @param  __HANDLE__: specifies the NOR handle.
 178   * @retval None
 179   */
 180 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
 181
 182 /**
 183   * @brief  NOR memory address shifting.
 184   * @param  __ADDRESS__: NOR memory address
 185   * @retval NOR shifted address value
 186   */
 187 #define __NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) (((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_8B)? ((uint32_t)((__NOR_ADDRESS) + (2 * (__ADDRESS__)))):\
 188                          ((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__))))
 189
 190 /**
 191   * @brief  NOR memory write data to specified address.
 192   * @param  __ADDRESS__: NOR memory address
 193   * @param  __DATA__: Data to write
 194   * @retval None
 195   */
 196 #define __NOR_WRITE(__ADDRESS__, __DATA__)  (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__))
 197
 198 /* Exported functions --------------------------------------------------------*/
 199
 200 /* Initialization/de-initialization functions  ********************************/
 201 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
 202 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
 203 void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
 204 void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
 205 void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
 206
 207 /* I/O operation functions  ***************************************************/
 208 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID);
 209 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor);
 210 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
 211 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
 212
 213 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
 214 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
 215
 216 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address);
 217 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address);
 218 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI);
 219
 220 /* NOR Control functions  *****************************************************/
 221 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor);
 222 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor);
 223
 224 /* NOR State functions ********************************************************/
 225 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor);
 226 NOR_StatusTypedef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
 227
 228 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
 229 /**
 230   * @}
 231   */
 232
 233 /**
 234   * @}
 235   */
 236
 237 #ifdef __cplusplus
 238 }
 239 #endif
 240
 241 #endif /* __STM32F4xx_HAL_NOR_H */
 242
 243 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/