tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f4xx_hal_pwr.c
   4   * @author  MCD Application Team
   5   * @version V1.1.0
   6   * @date    19-June-2014
   7   * @brief   PWR HAL module driver.
   8   *          This file provides firmware functions to manage the following
   9   *          functionalities of the Power Controller (PWR) peripheral:
  10   *           + Initialization and de-initialization functions
  11   *           + Peripheral Control functions
  12   *
  13   ******************************************************************************
  14   * @attention
  15   *
  16   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  17   *
  18   * Redistribution and use in source and binary forms, with or without modification,
  19   * are permitted provided that the following conditions are met:
  20   *   1. Redistributions of source code must retain the above copyright notice,
  21   *      this list of conditions and the following disclaimer.
  22   *   2. Redistributions in binary form must reproduce the above copyright notice,
  23   *      this list of conditions and the following disclaimer in the documentation
  24   *      and/or other materials provided with the distribution.
  25   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  26   *      may be used to endorse or promote products derived from this software
  27   *      without specific prior written permission.
  28   *
  29   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  30   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  31   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  32   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  33   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  34   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  35   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  36   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  37   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  38   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39   *
  40   ******************************************************************************
  41   */
  42
  43 /* Includes ------------------------------------------------------------------*/
  44 #include "stm32f4xx_hal.h"
  45
  46 /** @addtogroup STM32F4xx_HAL_Driver
  47   * @{
  48   */
  49
  50 /** @defgroup PWR
  51   * @brief PWR HAL module driver
  52   * @{
  53   */
  54
  55 #ifdef HAL_PWR_MODULE_ENABLED
  56
  57 /* Private typedef -----------------------------------------------------------*/
  58 /* Private define ------------------------------------------------------------*/
  59 /* Private macro -------------------------------------------------------------*/
  60 /* Private variables ---------------------------------------------------------*/
  61 /* Private function prototypes -----------------------------------------------*/
  62 /* Private functions ---------------------------------------------------------*/
  63
  64 /** @defgroup PWR_Private_Functions
  65   * @{
  66   */
  67
  68 /** @defgroup PWR_Group1 Initialization and de-initialization functions
  69   *  @brief    Initialization and de-initialization functions
  70   *
  71 @verbatim
  72  ===============================================================================
  73               ##### Initialization and de-initialization functions #####
  74  ===============================================================================
  75     [..]
  76       After reset, the backup domain (RTC registers, RTC backup data
  77       registers and backup SRAM) is protected against possible unwanted
  78       write accesses.
  79       To enable access to the RTC Domain and RTC registers, proceed as follows:
  80         (+) Enable the Power Controller (PWR) APB1 interface clock using the
  81             __PWR_CLK_ENABLE() macro.
  82         (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
  83
  84 @endverbatim
  85   * @{
  86   */
  87
  88 /**
  89   * @brief Deinitializes the HAL PWR peripheral registers to their default reset values.
  90   * @param None
  91   * @retval None
  92   */
  93 void HAL_PWR_DeInit(void)
  94 {
  95   __PWR_FORCE_RESET();
  96   __PWR_RELEASE_RESET();
  97 }
  98
  99 /**
 100   * @brief Enables access to the backup domain (RTC registers, RTC
 101   *         backup data registers and backup SRAM).
 102   * @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the
 103   *         Backup Domain Access should be kept enabled.
 104   * @param None
 105   * @retval None
 106   */
 107 void HAL_PWR_EnableBkUpAccess(void)
 108 {
 109   *(__IO uint32_t *) CR_DBP_BB = (uint32_t)ENABLE;
 110 }
 111
 112 /**
 113   * @brief Disables access to the backup domain (RTC registers, RTC
 114   *         backup data registers and backup SRAM).
 115   * @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the
 116   *         Backup Domain Access should be kept enabled.
 117   * @param None
 118   * @retval None
 119   */
 120 void HAL_PWR_DisableBkUpAccess(void)
 121 {
 122   *(__IO uint32_t *) CR_DBP_BB = (uint32_t)DISABLE;
 123 }
 124
 125 /**
 126   * @}
 127   */
 128
 129 /** @defgroup PWR_Group2 Peripheral Control functions
 130   *  @brief Low Power modes configuration functions
 131   *
 132 @verbatim
 133
 134  ===============================================================================
 135                  ##### Peripheral Control functions #####
 136  ===============================================================================
 137
 138     *** PVD configuration ***
 139     =========================
 140     [..]
 141       (+) The PVD is used to monitor the VDD power supply by comparing it to a
 142           threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
 143       (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
 144           than the PVD threshold. This event is internally connected to the EXTI
 145           line16 and can generate an interrupt if enabled. This is done through
 146           __HAL_PVD_EXTI_ENABLE_IT() macro.
 147       (+) The PVD is stopped in Standby mode.
 148
 149     *** WakeUp pin configuration ***
 150     ================================
 151     [..]
 152       (+) WakeUp pin is used to wake up the system from Standby mode. This pin is
 153           forced in input pull-down configuration and is active on rising edges.
 154       (+) There is only one WakeUp pin: WakeUp Pin 1 on PA.00.
 155
 156     *** Low Power modes configuration ***
 157     =====================================
 158     [..]
 159       The devices feature 3 low-power modes:
 160       (+) Sleep mode: Cortex-M4 core stopped, peripherals kept running.
 161       (+) Stop mode: all clocks are stopped, regulator running, regulator
 162           in low power mode
 163       (+) Standby mode: 1.2V domain powered off.
 164
 165    *** Sleep mode ***
 166    ==================
 167     [..]
 168       (+) Entry:
 169         The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI)
 170               functions with
 171           (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
 172           (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
 173
 174       -@@- The Regulator parameter is not used for the STM32F4 family
 175               and is kept as parameter just to maintain compatibility with the
 176               lower power families (STM32L).
 177       (+) Exit:
 178         Any peripheral interrupt acknowledged by the nested vectored interrupt
 179               controller (NVIC) can wake up the device from Sleep mode.
 180
 181    *** Stop mode ***
 182    =================
 183     [..]
 184       In Stop mode, all clocks in the 1.2V domain are stopped, the PLL, the HSI,
 185       and the HSE RC oscillators are disabled. Internal SRAM and register contents
 186       are preserved.
 187       The voltage regulator can be configured either in normal or low-power mode.
 188       To minimize the consumption In Stop mode, FLASH can be powered off before
 189       entering the Stop mode using the HAL_PWR_EnableFlashPowerDown() function.
 190       It can be switched on again by software after exiting the Stop mode using
 191       the HAL_PWR_DisableFlashPowerDown() function.
 192
 193       (+) Entry:
 194          The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON)
 195              function with:
 196           (++) Main regulator ON.
 197           (++) Low Power regulator ON.
 198       (+) Exit:
 199         Any EXTI Line (Internal or External) configured in Interrupt/Event mode.
 200
 201    *** Standby mode ***
 202    ====================
 203     [..]
 204     (+)
 205       The Standby mode allows to achieve the lowest power consumption. It is based
 206       on the Cortex-M4 deep sleep mode, with the voltage regulator disabled.
 207       The 1.2V domain is consequently powered off. The PLL, the HSI oscillator and
 208       the HSE oscillator are also switched off. SRAM and register contents are lost
 209       except for the RTC registers, RTC backup registers, backup SRAM and Standby
 210       circuitry.
 211
 212       The voltage regulator is OFF.
 213
 214       (++) Entry:
 215         (+++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function.
 216       (++) Exit:
 217         (+++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup,
 218              tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
 219
 220    *** Auto-wakeup (AWU) from low-power mode ***
 221    =============================================
 222     [..]
 223
 224      (+) The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
 225       Wakeup event, a tamper event or a time-stamp event, without depending on
 226       an external interrupt (Auto-wakeup mode).
 227
 228       (+) RTC auto-wakeup (AWU) from the Stop and Standby modes
 229
 230         (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to
 231               configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function.
 232
 233         (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
 234              is necessary to configure the RTC to detect the tamper or time stamp event using the
 235                 HAL_RTCEx_SetTimeStamp_IT() or HAL_RTCEx_SetTamper_IT() functions.
 236
 237         (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to
 238               configure the RTC to generate the RTC WakeUp event using the HAL_RTCEx_SetWakeUpTimer_IT() function.
 239
 240 @endverbatim
 241   * @{
 242   */
 243
 244 /**
 245   * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
 246   * @param sConfigPVD: pointer to an PWR_PVDTypeDef structure that contains the configuration
 247   *        information for the PVD.
 248   * @note Refer to the electrical characteristics of your device datasheet for
 249   *         more details about the voltage threshold corresponding to each
 250   *         detection level.
 251   * @retval None
 252   */
 253 void HAL_PWR_PVDConfig(PWR_PVDTypeDef *sConfigPVD)
 254 {
 255   uint32_t tmpreg = 0;
 256
 257   /* Check the parameters */
 258   assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
 259   assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
 260
 261   tmpreg = PWR->CR;
 262
 263   /* Clear PLS[7:5] bits */
 264   tmpreg &= ~ (uint32_t)PWR_CR_PLS;
 265
 266   /* Set PLS[7:5] bits according to PVDLevel value */
 267   tmpreg |= sConfigPVD->PVDLevel;
 268
 269   /* Store the new value */
 270   PWR->CR = tmpreg;
 271
 272   /* Configure the EXTI 16 interrupt */
 273   if((sConfigPVD->Mode == PWR_MODE_IT_RISING_FALLING) ||\
 274      (sConfigPVD->Mode == PWR_MODE_IT_FALLING) ||\
 275      (sConfigPVD->Mode == PWR_MODE_IT_RISING))
 276   {
 277     __HAL_PVD_EXTI_ENABLE_IT(PWR_EXTI_LINE_PVD);
 278   }
 279   /* Clear the edge trigger  for the EXTI Line 16 (PVD) */
 280   EXTI->RTSR &= ~EXTI_RTSR_TR16;
 281   EXTI->FTSR &= ~EXTI_FTSR_TR16;
 282   /* Configure the rising edge */
 283   if((sConfigPVD->Mode == PWR_MODE_IT_RISING_FALLING) ||\
 284      (sConfigPVD->Mode == PWR_MODE_IT_RISING))
 285   {
 286     EXTI->RTSR |= PWR_EXTI_LINE_PVD;
 287   }
 288   /* Configure the falling edge */
 289   if((sConfigPVD->Mode == PWR_MODE_IT_RISING_FALLING) ||\
 290      (sConfigPVD->Mode == PWR_MODE_IT_FALLING))
 291   {
 292     EXTI->FTSR |= PWR_EXTI_LINE_PVD;
 293   }
 294 }
 295
 296 /**
 297   * @brief Enables the Power Voltage Detector(PVD).
 298   * @param None
 299   * @retval None
 300   */
 301 void HAL_PWR_EnablePVD(void)
 302 {
 303   *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)ENABLE;
 304 }
 305
 306 /**
 307   * @brief Disables the Power Voltage Detector(PVD).
 308   * @param None
 309   * @retval None
 310   */
 311 void HAL_PWR_DisablePVD(void)
 312 {
 313   *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)DISABLE;
 314 }
 315
 316 /**
 317   * @brief Enables the WakeUp PINx functionality.
 318   * @param WakeUpPinx: Specifies the Power Wake-Up pin to enable.
 319   *         This parameter can be one of the following values:
 320   *           @arg PWR_WAKEUP_PIN1
 321   * @retval None
 322   */
 323 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)
 324 {
 325   /* Check the parameter */
 326   assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
 327   *(__IO uint32_t *) CSR_EWUP_BB = (uint32_t)ENABLE;
 328 }
 329
 330 /**
 331   * @brief Disables the WakeUp PINx functionality.
 332   * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable.
 333   *         This parameter can be one of the following values:
 334   *           @arg PWR_WAKEUP_PIN1
 335   * @retval None
 336   */
 337 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
 338 {
 339   /* Check the parameter */
 340   assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
 341   *(__IO uint32_t *) CSR_EWUP_BB = (uint32_t)DISABLE;
 342 }
 343
 344 /**
 345   * @brief Enters Sleep mode.
 346   *
 347   * @note In Sleep mode, all I/O pins keep the same state as in Run mode.
 348   *
 349   * @note In Sleep mode, the systick is stopped to avoid exit from this mode with
 350   *       systick interrupt when used as time base for Timeout
 351   *
 352   * @param Regulator: Specifies the regulator state in SLEEP mode.
 353   *            This parameter can be one of the following values:
 354   *            @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON
 355   *            @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON
 356   * @note This parameter is not used for the STM32F4 family and is kept as parameter
 357   *       just to maintain compatibility with the lower power families.
 358   * @param SLEEPEntry: Specifies if SLEEP mode in entered with WFI or WFE instruction.
 359   *          This parameter can be one of the following values:
 360   *            @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
 361   *            @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
 362   * @retval None
 363   */
 364 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
 365 {
 366   /* Check the parameters */
 367   assert_param(IS_PWR_REGULATOR(Regulator));
 368   assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
 369
 370   /* Select SLEEP mode entry -------------------------------------------------*/
 371   if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
 372   {
 373     /* Request Wait For Interrupt */
 374     __WFI();
 375   }
 376   else
 377   {
 378     /* Request Wait For Event */
 379     __SEV();
 380     __WFE();
 381     __WFE();
 382   }
 383 }
 384
 385 /**
 386   * @brief Enters Stop mode.
 387   * @note In Stop mode, all I/O pins keep the same state as in Run mode.
 388   * @note When exiting Stop mode by issuing an interrupt or a wakeup event,
 389   *         the HSI RC oscillator is selected as system clock.
 390   * @note When the voltage regulator operates in low power mode, an additional
 391   *         startup delay is incurred when waking up from Stop mode.
 392   *         By keeping the internal regulator ON during Stop mode, the consumption
 393   *         is higher although the startup time is reduced.
 394   * @param Regulator: Specifies the regulator state in Stop mode.
 395   *          This parameter can be one of the following values:
 396   *            @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON
 397   *            @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON
 398   * @param STOPEntry: Specifies if Stop mode in entered with WFI or WFE instruction.
 399   *          This parameter can be one of the following values:
 400   *            @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction
 401   *            @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction
 402   * @retval None
 403   */
 404 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
 405 {
 406   uint32_t tmpreg = 0;
 407
 408   /* Check the parameters */
 409   assert_param(IS_PWR_REGULATOR(Regulator));
 410   assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
 411
 412   /* Select the regulator state in Stop mode ---------------------------------*/
 413   tmpreg = PWR->CR;
 414   /* Clear PDDS and LPDS bits */
 415   tmpreg &= (uint32_t)~(PWR_CR_PDDS | PWR_CR_LPDS);
 416
 417   /* Set LPDS, MRLVDS and LPLVDS bits according to Regulator value */
 418   tmpreg |= Regulator;
 419
 420   /* Store the new value */
 421   PWR->CR = tmpreg;
 422
 423   /* Set SLEEPDEEP bit of Cortex System Control Register */
 424   SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
 425
 426   /* Select Stop mode entry --------------------------------------------------*/
 427   if(STOPEntry == PWR_STOPENTRY_WFI)
 428   {
 429     /* Request Wait For Interrupt */
 430     __WFI();
 431   }
 432   else
 433   {
 434     /* Request Wait For Event */
 435     __WFE();
 436   }
 437   /* Reset SLEEPDEEP bit of Cortex System Control Register */
 438   SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
 439 }
 440
 441 /**
 442   * @brief Enters Standby mode.
 443   * @note In Standby mode, all I/O pins are high impedance except for:
 444   *          - Reset pad (still available)
 445   *          - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC
 446   *            Alarm out, or RTC clock calibration out.
 447   *          - RTC_AF2 pin (PI8) if configured for tamper or time-stamp.
 448   *          - WKUP pin 1 (PA0) if enabled.
 449   * @param None
 450   * @retval None
 451   */
 452 void HAL_PWR_EnterSTANDBYMode(void)
 453 {
 454   /* Select Standby mode */
 455   PWR->CR |= PWR_CR_PDDS;
 456
 457   /* Set SLEEPDEEP bit of Cortex System Control Register */
 458   SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
 459
 460   /* This option is used to ensure that store operations are completed */
 461 #if defined ( __CC_ARM)
 462   __force_stores();
 463 #endif
 464   /* Request Wait For Interrupt */
 465   __WFI();
 466 }
 467
 468 /**
 469   * @brief This function handles the PWR PVD interrupt request.
 470   * @note This API should be called under the PVD_IRQHandler().
 471   * @param None
 472   * @retval None
 473   */
 474 void HAL_PWR_PVD_IRQHandler(void)
 475 {
 476   /* Check PWR exti flag */
 477   if(__HAL_PVD_EXTI_GET_FLAG(PWR_EXTI_LINE_PVD) != RESET)
 478   {
 479     /* PWR PVD interrupt user callback */
 480     HAL_PWR_PVDCallback();
 481
 482     /* Clear PWR Exti pending bit */
 483     __HAL_PVD_EXTI_CLEAR_FLAG(PWR_EXTI_LINE_PVD);
 484   }
 485 }
 486
 487 /**
 488   * @brief  PWR PVD interrupt callback
 489   * @param  None
 490   * @retval None
 491   */
 492 __weak void HAL_PWR_PVDCallback(void)
 493 {
 494   /* NOTE : This function Should not be modified, when the callback is needed,
 495             the HAL_PWR_PVDCallback could be implemented in the user file
 496    */
 497 }
 498
 499 /**
 500   * @}
 501   */
 502
 503 /**
 504   * @}
 505   */
 506
 507 #endif /* HAL_PWR_MODULE_ENABLED */
 508 /**
 509   * @}
 510   */
 511
 512 /**
 513   * @}
 514   */
 515
 516 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/