tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f4xx_hal_pwr.h
   4   * @author  MCD Application Team
   5   * @version V1.1.0
   6   * @date    19-June-2014
   7   * @brief   Header file of PWR HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32F4xx_HAL_PWR_H
  40 #define __STM32F4xx_HAL_PWR_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 /* Includes ------------------------------------------------------------------*/
  47 #include "stm32f4xx_hal_def.h"
  48
  49 /** @addtogroup STM32F4xx_HAL_Driver
  50   * @{
  51   */
  52
  53 /** @addtogroup PWR
  54   * @{
  55   */
  56
  57 /* Exported types ------------------------------------------------------------*/
  58 /**
  59   * @brief  PWR PVD configuration structure definition
  60   */
  61 typedef struct
  62 {
  63   uint32_t PVDLevel;   /*!< PVDLevel: Specifies the PVD detection level.
  64                             This parameter can be a value of @ref PWR_PVD_detection_level */
  65
  66   uint32_t Mode;      /*!< Mode: Specifies the operating mode for the selected pins.
  67                            This parameter can be a value of @ref PWR_PVD_Mode */
  68 }PWR_PVDTypeDef;
  69
  70 /* Exported constants --------------------------------------------------------*/
  71 /* ------------- PWR registers bit address in the alias region ---------------*/
  72 #define PWR_OFFSET      (PWR_BASE - PERIPH_BASE)
  73
  74 /* --- CR Register ---*/
  75 /* Alias word address of DBP bit */
  76 #define CR_OFFSET       (PWR_OFFSET + 0x00)
  77 #define DBP_BitNumber   0x08
  78 #define CR_DBP_BB       (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4))
  79
  80 /* Alias word address of PVDE bit */
  81 #define PVDE_BitNumber  0x04
  82 #define CR_PVDE_BB      (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4))
  83
  84 /* Alias word address of PMODE bit */
  85 #define PMODE_BitNumber 0x0E
  86 #define CR_PMODE_BB     (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PMODE_BitNumber * 4))
  87
  88 /* --- CSR Register ---*/
  89 /* Alias word address of EWUP bit */
  90 #define CSR_OFFSET      (PWR_OFFSET + 0x04)
  91 #define EWUP_BitNumber  0x08
  92 #define CSR_EWUP_BB     (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP_BitNumber * 4))
  93
  94 /** @defgroup PWR_Exported_Constants
  95   * @{
  96   */
  97
  98 /** @defgroup PWR_WakeUp_Pins
  99   * @{
 100   */
 101
 102 #define PWR_WAKEUP_PIN1                 PWR_CSR_EWUP
 103 #define IS_PWR_WAKEUP_PIN(PIN) ((PIN) == PWR_WAKEUP_PIN1)
 104 /**
 105   * @}
 106   */
 107
 108 /** @defgroup PWR_PVD_detection_level
 109   * @{
 110   */
 111 #define PWR_PVDLEVEL_0                  PWR_CR_PLS_LEV0
 112 #define PWR_PVDLEVEL_1                  PWR_CR_PLS_LEV1
 113 #define PWR_PVDLEVEL_2                  PWR_CR_PLS_LEV2
 114 #define PWR_PVDLEVEL_3                  PWR_CR_PLS_LEV3
 115 #define PWR_PVDLEVEL_4                  PWR_CR_PLS_LEV4
 116 #define PWR_PVDLEVEL_5                  PWR_CR_PLS_LEV5
 117 #define PWR_PVDLEVEL_6                  PWR_CR_PLS_LEV6
 118 #define PWR_PVDLEVEL_7                  PWR_CR_PLS_LEV7
 119 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
 120                                  ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
 121                                  ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
 122                                  ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
 123 /**
 124   * @}
 125   */
 126
 127 /** @defgroup PWR_PVD_Mode
 128   * @{
 129   */
 130 #define  PWR_MODE_EVT                  ((uint32_t)0x00000000)   /*!< No Interrupt */
 131 #define  PWR_MODE_IT_RISING            ((uint32_t)0x00000001)   /*!< External Interrupt Mode with Rising edge trigger detection */
 132 #define  PWR_MODE_IT_FALLING           ((uint32_t)0x00000002)   /*!< External Interrupt Mode with Falling edge trigger detection */
 133 #define  PWR_MODE_IT_RISING_FALLING    ((uint32_t)0x00000003)   /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
 134 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_MODE_EVT) || ((MODE) == PWR_MODE_IT_RISING)|| \
 135                                ((MODE) == PWR_MODE_IT_FALLING) || ((MODE) == PWR_MODE_IT_RISING_FALLING))
 136 /**
 137   * @}
 138   */
 139
 140 /** @defgroup PWR_Regulator_state_in_STOP_mode
 141   * @{
 142   */
 143 #define PWR_MAINREGULATOR_ON                        ((uint32_t)0x00000000)
 144 #define PWR_LOWPOWERREGULATOR_ON                    PWR_CR_LPDS
 145
 146 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
 147                                      ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
 148 /**
 149   * @}
 150   */
 151
 152 /** @defgroup PWR_SLEEP_mode_entry
 153   * @{
 154   */
 155 #define PWR_SLEEPENTRY_WFI              ((uint8_t)0x01)
 156 #define PWR_SLEEPENTRY_WFE              ((uint8_t)0x02)
 157 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
 158 /**
 159   * @}
 160   */
 161
 162 /** @defgroup PWR_STOP_mode_entry
 163   * @{
 164   */
 165 #define PWR_STOPENTRY_WFI               ((uint8_t)0x01)
 166 #define PWR_STOPENTRY_WFE               ((uint8_t)0x02)
 167 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
 168 /**
 169   * @}
 170   */
 171
 172 /** @defgroup PWR_Regulator_Voltage_Scale
 173   * @{
 174   */
 175 #define PWR_REGULATOR_VOLTAGE_SCALE1    ((uint32_t)0x0000C000)
 176 #define PWR_REGULATOR_VOLTAGE_SCALE2    ((uint32_t)0x00008000)
 177 #define PWR_REGULATOR_VOLTAGE_SCALE3    ((uint32_t)0x00004000)
 178 #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
 179                                            ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
 180                                            ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
 181 /**
 182   * @}
 183   */
 184
 185 /** @defgroup PWR_Flag
 186   * @{
 187   */
 188 #define PWR_FLAG_WU                     PWR_CSR_WUF
 189 #define PWR_FLAG_SB                     PWR_CSR_SBF
 190 #define PWR_FLAG_PVDO                   PWR_CSR_PVDO
 191 #define PWR_FLAG_BRR                    PWR_CSR_BRR
 192 #define PWR_FLAG_VOSRDY                 PWR_CSR_VOSRDY
 193
 194 /**
 195   * @}
 196   */
 197
 198 /**
 199   * @}
 200   */
 201
 202 /* Exported macro ------------------------------------------------------------*/
 203
 204 /** @brief  macros configure the main internal regulator output voltage.
 205   * @param  __REGULATOR__: specifies the regulator output voltage to achieve
 206   *         a tradeoff between performance and power consumption when the device does
 207   *         not operate at the maximum frequency (refer to the datasheets for more details).
 208   *          This parameter can be one of the following values:
 209   *            @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
 210   *            @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
 211   *            @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
 212   * @retval None
 213   */
 214 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)))
 215
 216 /** @brief  Check PWR flag is set or not.
 217   * @param  __FLAG__: specifies the flag to check.
 218   *           This parameter can be one of the following values:
 219   *            @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
 220   *                  was received from the WKUP pin or from the RTC alarm (Alarm A
 221   *                  or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
 222   *                  An additional wakeup event is detected if the WKUP pin is enabled
 223   *                  (by setting the EWUP bit) when the WKUP pin level is already high.
 224   *            @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
 225   *                  resumed from StandBy mode.
 226   *            @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
 227   *                  by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
 228   *                  For this reason, this bit is equal to 0 after Standby or reset
 229   *                  until the PVDE bit is set.
 230   *            @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset
 231   *                  when the device wakes up from Standby mode or by a system reset
 232   *                  or power reset.
 233   *            @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage
 234   *                 scaling output selection is ready.
 235   * @retval The new state of __FLAG__ (TRUE or FALSE).
 236   */
 237 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
 238
 239 /** @brief  Clear the PWR's pending flags.
 240   * @param  __FLAG__: specifies the flag to clear.
 241   *          This parameter can be one of the following values:
 242   *            @arg PWR_FLAG_WU: Wake Up flag
 243   *            @arg PWR_FLAG_SB: StandBy flag
 244   */
 245 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |=  (__FLAG__) << 2)
 246
 247 #define PWR_EXTI_LINE_PVD  ((uint32_t)0x00010000)  /*!< External interrupt line 16 Connected to the PVD EXTI Line */
 248 /**
 249   * @brief Enable the PVD Exti Line.
 250   * @param  __EXTILINE__: specifies the PVD Exti sources to be enabled.
 251   * This parameter can be:
 252   *   @arg PWR_EXTI_LINE_PVD
 253   * @retval None.
 254   */
 255 #define __HAL_PVD_EXTI_ENABLE_IT(__EXTILINE__)   (EXTI->IMR |= (__EXTILINE__))
 256
 257 /**
 258   * @brief Disable the PVD EXTI Line.
 259   * @param  __EXTILINE__: specifies the PVD EXTI sources to be disabled.
 260   * This parameter can be:
 261   *  @arg PWR_EXTI_LINE_PVD
 262   * @retval None.
 263   */
 264 #define __HAL_PVD_EXTI_DISABLE_IT(__EXTILINE__)  (EXTI->IMR &= ~(__EXTILINE__))
 265
 266 /**
 267   * @brief checks whether the specified PVD Exti interrupt flag is set or not.
 268   * @param  __EXTILINE__: specifies the PVD Exti sources to be cleared.
 269   * This parameter can be:
 270   *   @arg PWR_EXTI_LINE_PVD
 271   * @retval EXTI PVD Line Status.
 272   */
 273 #define __HAL_PVD_EXTI_GET_FLAG(__EXTILINE__)  (EXTI->PR & (__EXTILINE__))
 274
 275 /**
 276   * @brief Clear the PVD Exti flag.
 277   * @param  __EXTILINE__: specifies the PVD Exti sources to be cleared.
 278   * This parameter can be:
 279   *   @arg PWR_EXTI_LINE_PVD
 280   * @retval None.
 281   */
 282 #define __HAL_PVD_EXTI_CLEAR_FLAG(__EXTILINE__)  (EXTI->PR = (__EXTILINE__))
 283
 284 /**
 285   * @brief  Generates a Software interrupt on selected EXTI line.
 286   * @param  __EXTILINE__: specifies the PVD EXTI sources to be disabled.
 287   * This parameter can be:
 288   *  @arg PWR_EXTI_LINE_PVD
 289   * @retval None
 290   */
 291 #define __HAL_PVD_EXTI_GENERATE_SWIT(__EXTI_LINE__) (EXTI->SWIER |= (__EXTI_LINE__))
 292
 293 /* Include PWR HAL Extension module */
 294 #include "stm32f4xx_hal_pwr_ex.h"
 295
 296 /* Exported functions --------------------------------------------------------*/
 297
 298 /* Initialization and de-initialization functions *****************************/
 299 void HAL_PWR_DeInit(void);
 300 void HAL_PWR_EnableBkUpAccess(void);
 301 void HAL_PWR_DisableBkUpAccess(void);
 302
 303 /* Peripheral Control functions  **********************************************/
 304 /* PVD configuration */
 305 void HAL_PWR_PVDConfig(PWR_PVDTypeDef *sConfigPVD);
 306 void HAL_PWR_EnablePVD(void);
 307 void HAL_PWR_DisablePVD(void);
 308
 309 /* WakeUp pins configuration */
 310 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
 311 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
 312
 313 /* Low Power modes entry */
 314 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
 315 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
 316 void HAL_PWR_EnterSTANDBYMode(void);
 317
 318 void HAL_PWR_PVD_IRQHandler(void);
 319 void HAL_PWR_PVDCallback(void);
 320
 321
 322 /**
 323   * @}
 324   */
 325
 326 /**
 327   * @}
 328   */
 329
 330 #ifdef __cplusplus
 331 }
 332 #endif
 333
 334
 335 #endif /* __STM32F4xx_HAL_PWR_H */
 336
 337 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/