tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sdram.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f4xx_hal_sdram.h
   4   * @author  MCD Application Team
   5   * @version V1.1.0
   6   * @date    19-June-2014
   7   * @brief   Header file of SDRAM HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32F4xx_HAL_SDRAM_H
  40 #define __STM32F4xx_HAL_SDRAM_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
  47
  48 /* Includes ------------------------------------------------------------------*/
  49 #include "stm32f4xx_ll_fmc.h"
  50
  51 /** @addtogroup STM32F4xx_HAL_Driver
  52   * @{
  53   */
  54
  55 /** @addtogroup SDRAM
  56   * @{
  57   */
  58
  59 /* Exported typedef ----------------------------------------------------------*/
  60
  61 /**
  62   * @brief  HAL SDRAM State structure definition
  63   */
  64 typedef enum
  65 {
  66   HAL_SDRAM_STATE_RESET             = 0x00,  /*!< SDRAM not yet initialized or disabled */
  67   HAL_SDRAM_STATE_READY             = 0x01,  /*!< SDRAM initialized and ready for use   */
  68   HAL_SDRAM_STATE_BUSY              = 0x02,  /*!< SDRAM internal process is ongoing     */
  69   HAL_SDRAM_STATE_ERROR             = 0x03,  /*!< SDRAM error state                     */
  70   HAL_SDRAM_STATE_WRITE_PROTECTED   = 0x04,  /*!< SDRAM device write protected          */
  71   HAL_SDRAM_STATE_PRECHARGED        = 0x05   /*!< SDRAM device precharged               */
  72
  73 }HAL_SDRAM_StateTypeDef;
  74
  75 /**
  76   * @brief  SDRAM handle Structure definition
  77   */
  78 typedef struct
  79 {
  80   FMC_SDRAM_TypeDef             *Instance;  /*!< Register base address                 */
  81
  82   FMC_SDRAM_InitTypeDef         Init;       /*!< SDRAM device configuration parameters */
  83
  84   __IO HAL_SDRAM_StateTypeDef   State;      /*!< SDRAM access state                    */
  85
  86   HAL_LockTypeDef               Lock;       /*!< SDRAM locking object                  */
  87
  88   DMA_HandleTypeDef             *hdma;      /*!< Pointer DMA handler                   */
  89
  90 }SDRAM_HandleTypeDef;
  91
  92 /* Exported types ------------------------------------------------------------*/
  93 /* Exported macro ------------------------------------------------------------*/
  94
  95 /** @brief Reset SDRAM handle state
  96   * @param  __HANDLE__: specifies the SDRAM handle.
  97   * @retval None
  98   */
  99 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDRAM_STATE_RESET)
 100
 101 /* Exported functions --------------------------------------------------------*/
 102
 103 /* Initialization/de-initialization functions  **********************************/
 104 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing);
 105 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram);
 106 void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram);
 107 void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram);
 108
 109 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram);
 110 void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram);
 111 void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
 112 void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
 113
 114 /* I/O operation functions  *****************************************************/
 115 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
 116 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
 117 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
 118 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
 119 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
 120 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
 121
 122 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t * pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
 123 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
 124
 125 /* SDRAM Control functions  *****************************************************/
 126 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram);
 127 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram);
 128 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout);
 129 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate);
 130 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber);
 131 uint32_t          HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram);
 132
 133 /* SDRAM State functions ********************************************************/
 134 HAL_SDRAM_StateTypeDef  HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram);
 135
 136 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
 137 /**
 138   * @}
 139   */
 140
 141 /**
 142   * @}
 143   */
 144
 145 #ifdef __cplusplus
 146 }
 147 #endif
 148
 149 #endif /* __STM32F4xx_HAL_SDRAM_H */
 150
 151 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/