tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sram.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f4xx_hal_sram.h
   4   * @author  MCD Application Team
   5   * @version V1.1.0
   6   * @date    19-June-2014
   7   * @brief   Header file of SRAM HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32F4xx_HAL_SRAM_H
  40 #define __STM32F4xx_HAL_SRAM_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 /* Includes ------------------------------------------------------------------*/
  47 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
  48   #include "stm32f4xx_ll_fsmc.h"
  49 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
  50
  51 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
  52   #include "stm32f4xx_ll_fmc.h"
  53 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
  54
  55
  56 /** @addtogroup STM32F4xx_HAL_Driver
  57   * @{
  58   */
  59
  60 /** @addtogroup SRAM
  61   * @{
  62   */
  63
  64 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
  65
  66 /* Exported typedef ----------------------------------------------------------*/
  67
  68 /**
  69   * @brief  HAL SRAM State structures definition
  70   */
  71 typedef enum
  72 {
  73   HAL_SRAM_STATE_RESET     = 0x00,  /*!< SRAM not yet initialized or disabled           */
  74   HAL_SRAM_STATE_READY     = 0x01,  /*!< SRAM initialized and ready for use             */
  75   HAL_SRAM_STATE_BUSY      = 0x02,  /*!< SRAM internal process is ongoing               */
  76   HAL_SRAM_STATE_ERROR     = 0x03,  /*!< SRAM error state                               */
  77   HAL_SRAM_STATE_PROTECTED = 0x04   /*!< SRAM peripheral NORSRAM device write protected */
  78
  79 }HAL_SRAM_StateTypeDef;
  80
  81 /**
  82   * @brief  SRAM handle Structure definition
  83   */
  84 typedef struct
  85 {
  86   FMC_NORSRAM_TypeDef           *Instance;  /*!< Register base address                        */
  87
  88   FMC_NORSRAM_EXTENDED_TypeDef  *Extended;  /*!< Extended mode register base address          */
  89
  90   FMC_NORSRAM_InitTypeDef       Init;       /*!< SRAM device control configuration parameters */
  91
  92   HAL_LockTypeDef               Lock;       /*!< SRAM locking object                          */
  93
  94   __IO HAL_SRAM_StateTypeDef    State;      /*!< SRAM device access state                     */
  95
  96   DMA_HandleTypeDef             *hdma;      /*!< Pointer DMA handler                          */
  97
  98 }SRAM_HandleTypeDef;
  99
 100 /* Exported constants --------------------------------------------------------*/
 101 /* Exported macro ------------------------------------------------------------*/
 102
 103 /** @brief Reset SRAM handle state
 104   * @param  __HANDLE__: SRAM handle
 105   * @retval None
 106   */
 107 #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
 108
 109 /* Exported functions --------------------------------------------------------*/
 110
 111 /* Initialization/de-initialization functions  **********************************/
 112 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
 113 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
 114 void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
 115 void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
 116
 117 /* I/O operation functions  *****************************************************/
 118 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
 119 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
 120 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
 121 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
 122 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
 123 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
 124 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
 125 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
 126
 127 void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
 128 void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
 129
 130 /* SRAM Control functions  ******************************************************/
 131 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
 132 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
 133
 134 /* SRAM State functions *********************************************************/
 135 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
 136
 137 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
 138 /**
 139   * @}
 140   */
 141
 142 /**
 143   * @}
 144   */
 145
 146 #ifdef __cplusplus
 147 }
 148 #endif
 149
 150 #endif /* __STM32F4xx_HAL_SRAM_H */
 151
 152 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/