1 ;******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
2 ;* File Name : startup_stm32l053xx.s
3 ;* Author : MCD Application Team
5 ;* Date : 06-February-2015
6 ;* Description : STM32l053xx Devices vector table for MDK-ARM toolchain.
7 ;* This module performs:
8 ;* - Set the initial SP
9 ;* - Set the initial PC == Reset_Handler
10 ;* - Set the vector table entries with the exceptions ISR address
11 ;* - Branches to __main in the C library (which eventually
13 ;* After Reset the Cortex-M0+ processor is in Thread mode,
14 ;* priority is Privileged, and the Stack is set to Main.
15 ;* <<< Use Configuration Wizard in Context Menu >>>
16 ;*******************************************************************************
18 ;* Redistribution and use in source and binary forms, with or without modification,
19 ;* are permitted provided that the following conditions are met:
20 ;* 1. Redistributions of source code must retain the above copyright notice,
21 ;* this list of conditions and the following disclaimer.
22 ;* 2. Redistributions in binary form must reproduce the above copyright notice,
23 ;* this list of conditions and the following disclaimer in the documentation
24 ;* and/or other materials provided with the distribution.
25 ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
26 ;* may be used to endorse or promote products derived from this software
27 ;* without specific prior written permission.
29 ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
30 ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31 ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
32 ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
33 ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
35 ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36 ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
37 ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 ;*******************************************************************************
42 __initial_sp EQU 0x20002000 ; Top of RAM
48 ; Vector Table Mapped to Address 0 at Reset
49 AREA RESET, DATA, READONLY
54 __Vectors DCD __initial_sp ; Top of Stack
55 DCD Reset_Handler ; Reset Handler
56 DCD NMI_Handler ; NMI Handler
57 DCD HardFault_Handler ; Hard Fault Handler
65 DCD SVC_Handler ; SVCall Handler
66 DCD DebugMon_Handler ; Debug Monitor Handler
68 DCD PendSV_Handler ; PendSV Handler
69 DCD SysTick_Handler ; SysTick Handler
72 DCD WWDG_IRQHandler ; Window Watchdog
73 DCD PVD_IRQHandler ; PVD through EXTI Line detect
74 DCD RTC_IRQHandler ; RTC through EXTI Line
75 DCD FLASH_IRQHandler ; FLASH
76 DCD RCC_CRS_IRQHandler ; RCC and CRS
77 DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
78 DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
79 DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
80 DCD TSC_IRQHandler ; TSC
81 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
82 DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
83 DCD DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
84 DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2
85 DCD LPTIM1_IRQHandler ; LPTIM1
87 DCD TIM2_IRQHandler ; TIM2
89 DCD TIM6_DAC_IRQHandler ; TIM6 and DAC
92 DCD TIM21_IRQHandler ; TIM21
94 DCD TIM22_IRQHandler ; TIM22
95 DCD I2C1_IRQHandler ; I2C1
96 DCD I2C2_IRQHandler ; I2C2
97 DCD SPI1_IRQHandler ; SPI1
98 DCD SPI2_IRQHandler ; SPI2
99 DCD USART1_IRQHandler ; USART1
100 DCD USART2_IRQHandler ; USART2
101 DCD RNG_LPUART1_IRQHandler ; RNG and LPUART1
102 DCD LCD_IRQHandler ; LCD
103 DCD USB_IRQHandler ; USB
107 __Vectors_Size EQU __Vectors_End - __Vectors
109 AREA |.text|, CODE, READONLY
111 ; Reset handler routine
113 EXPORT Reset_Handler [WEAK]
122 ; Dummy Exception Handlers (infinite loops which can be modified)
125 EXPORT NMI_Handler [WEAK]
130 EXPORT HardFault_Handler [WEAK]
134 EXPORT SVC_Handler [WEAK]
139 EXPORT DebugMon_Handler [WEAK]
143 EXPORT PendSV_Handler [WEAK]
147 EXPORT SysTick_Handler [WEAK]
153 EXPORT WWDG_IRQHandler [WEAK]
154 EXPORT PVD_IRQHandler [WEAK]
155 EXPORT RTC_IRQHandler [WEAK]
156 EXPORT FLASH_IRQHandler [WEAK]
157 EXPORT RCC_CRS_IRQHandler [WEAK]
158 EXPORT EXTI0_1_IRQHandler [WEAK]
159 EXPORT EXTI2_3_IRQHandler [WEAK]
160 EXPORT EXTI4_15_IRQHandler [WEAK]
161 EXPORT TSC_IRQHandler [WEAK]
162 EXPORT DMA1_Channel1_IRQHandler [WEAK]
163 EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
164 EXPORT DMA1_Channel4_5_6_7_IRQHandler [WEAK]
165 EXPORT ADC1_COMP_IRQHandler [WEAK]
166 EXPORT LPTIM1_IRQHandler [WEAK]
167 EXPORT TIM2_IRQHandler [WEAK]
168 EXPORT TIM6_DAC_IRQHandler [WEAK]
169 EXPORT TIM21_IRQHandler [WEAK]
170 EXPORT TIM22_IRQHandler [WEAK]
171 EXPORT I2C1_IRQHandler [WEAK]
172 EXPORT I2C2_IRQHandler [WEAK]
173 EXPORT SPI1_IRQHandler [WEAK]
174 EXPORT SPI2_IRQHandler [WEAK]
175 EXPORT USART1_IRQHandler [WEAK]
176 EXPORT USART2_IRQHandler [WEAK]
177 EXPORT RNG_LPUART1_IRQHandler [WEAK]
178 EXPORT LCD_IRQHandler [WEAK]
179 EXPORT USB_IRQHandler [WEAK]
191 DMA1_Channel1_IRQHandler
192 DMA1_Channel2_3_IRQHandler
193 DMA1_Channel4_5_6_7_IRQHandler
206 RNG_LPUART1_IRQHandler