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1 /**
2 ******************************************************************************
3 * @file stm32l0xx_hal_cortex.c
4 * @author MCD Application Team
5 * @version V1.2.0
6 * @date 06-February-2015
7 * @brief CORTEX HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the CORTEX:
10 * + Initialization and de-initialization functions
11 * + Peripheral Control functions
12 *
13 @verbatim
14 ==============================================================================
15 ##### How to use this driver #####
16 ==============================================================================
17
18 [..]
19 *** How to configure Interrupts using CORTEX HAL driver ***
20 ===========================================================
21 [..]
22 This section provide functions allowing to configure the NVIC interrupts (IRQ).
23 The Cortex-M0+ exceptions are managed by CMSIS functions.
24 (#) Enable and Configure the priority of the selected IRQ Channels.
25 The priority can be 0..3.
26
27 -@- Lower priority values gives higher priority.
28 -@- Priority Order:
29 (#@) Lowest priority.
30 (#@) Lowest hardware priority (IRQn position).
31
32 (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority()
33
34 (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ()
35
36 [..]
37 *** How to configure Systick using CORTEX HAL driver ***
38 ========================================================
39 [..]
40 Setup SysTick Timer for time base
41
42 (+) The HAL_SYSTICK_Config()function calls the SysTick_Config() function which
43 is a CMSIS function that:
44 (++) Configures the SysTick Reload register with value passed as function parameter.
45 (++) Configures the SysTick IRQ priority to the lowest value (0x03).
46 (++) Resets the SysTick Counter register.
47 (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK).
48 (++) Enables the SysTick Interrupt.
49 (++) Starts the SysTick Counter.
50
51 (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro
52 __HAL_CORTEX_SYSTICKCLK_CONFIG(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the
53 HAL_SYSTICK_Config() function call. The __HAL_CORTEX_SYSTICKCLK_CONFIG() macro is defined
54 inside the stm32l0xx_hal_cortex.h file.
55
56 (+) You can change the SysTick IRQ priority by calling the
57 HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function
58 call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function.
59
60 (+) To adjust the SysTick time base, use the following formula:
61
62 Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s)
63 (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function
64 (++) Reload Value should not exceed 0xFFFFFF
65
66 @endverbatim
67 ******************************************************************************
68 * @attention
69 *
70 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
71 *
72 * Redistribution and use in source and binary forms, with or without modification,
73 * are permitted provided that the following conditions are met:
74 * 1. Redistributions of source code must retain the above copyright notice,
75 * this list of conditions and the following disclaimer.
76 * 2. Redistributions in binary form must reproduce the above copyright notice,
77 * this list of conditions and the following disclaimer in the documentation
78 * and/or other materials provided with the distribution.
79 * 3. Neither the name of STMicroelectronics nor the names of its contributors
80 * may be used to endorse or promote products derived from this software
81 * without specific prior written permission.
82 *
83 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
84 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
85 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
86 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
87 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
88 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
89 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
90 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
91 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
92 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
93 *
94 ******************************************************************************
95 */
96
97 /* Includes ------------------------------------------------------------------*/
98 #include "stm32l0xx_hal.h"
99
100 /** @addtogroup STM32L0xx_HAL_Driver
101 * @{
102 */
103
104 /** @addtogroup CORTEX
105 * @brief CORTEX HAL module driver
106 * @{
107 */
108
109 #ifdef HAL_CORTEX_MODULE_ENABLED
110
111 /* Private types -------------------------------------------------------------*/
112 /* Private variables ---------------------------------------------------------*/
113 /* Private constants ---------------------------------------------------------*/
114 /* Private macros ------------------------------------------------------------*/
115 /* Private functions ---------------------------------------------------------*/
116 /* Exported functions --------------------------------------------------------*/
117
118 /** @addtogroup CORTEX_Exported_Functions
119 * @{
120 */
121
122
123 /** @addtogroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions
124 * @brief Initialization and Configuration functions
125 *
126 @verbatim
127 ==============================================================================
128 ##### Initialization and de-initialization functions #####
129 ==============================================================================
130 [..]
131 This section provides the CORTEX HAL driver functions allowing to configure Interrupts
132 Systick functionalities
133
134 @endverbatim
135 * @{
136 */
137
138 /**
139 * @brief Sets the priority of an interrupt.
140 * @param IRQn: External interrupt number .
141 * This parameter can be an enumerator of IRQn_Type enumeration
142 * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file)
143 * @param PreemptPriority: The pre-emption priority for the IRQn channel.
144 * This parameter can be a value between 0 and 3.
145 * A lower priority value indicates a higher priority
146 * @param SubPriority: The subpriority level for the IRQ channel.
147 * with stm32l0xx devices, this parameter is a dummy value and it is ignored, because
148 * no subpriority supported in Cortex M0+ based products.
149 * @retval None
150 */
151 void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
152 {
153 /* Check the parameters */
154 assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
155 NVIC_SetPriority(IRQn,PreemptPriority);
156 }
157
158 /**
159 * @brief Enables a device specific interrupt in the NVIC interrupt controller.
160 * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
161 * function should be called before.
162 * @param IRQn External interrupt number .
163 * This parameter can be an enumerator of IRQn_Type enumeration
164 * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file)
165 * @retval None
166 */
167 void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
168 {
169 /* Check the parameters */
170 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
171
172 /* Enable interrupt */
173 NVIC_EnableIRQ(IRQn);
174 }
175
176 /**
177 * @brief Disables a device specific interrupt in the NVIC interrupt controller.
178 * @param IRQn External interrupt number .
179 * This parameter can be an enumerator of IRQn_Type enumeration
180 * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file)
181 * @retval None
182 */
183 void HAL_NVIC_DisableIRQ(IRQn_Type IRQn)
184 {
185 /* Check the parameters */
186 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
187
188 /* Disable interrupt */
189 NVIC_DisableIRQ(IRQn);
190 }
191
192 /**
193 * @brief Initiates a system reset request to reset the MCU.
194 * @param None
195 * @retval None
196 */
197 void HAL_NVIC_SystemReset(void)
198 {
199 /* System Reset */
200 NVIC_SystemReset();
201 }
202
203 /**
204 * @brief Initializes the System Timer and its interrupt, and starts the System Tick Timer.
205 * Counter is in free running mode to generate periodic interrupts.
206 * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
207 * @retval status: - 0 Function succeeded.
208 * - 1 Function failed.
209 */
210 uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
211 {
212 return SysTick_Config(TicksNumb);
213 }
214 /**
215 * @}
216 */
217
218 /** @addtogroup CORTEX_Exported_Functions_Group2 Peripheral Control functions
219 * @brief Cortex control functions
220 *
221 @verbatim
222 ==============================================================================
223 ##### Peripheral Control functions #####
224 ==============================================================================
225 [..]
226 This subsection provides a set of functions allowing to control the CORTEX
227 (NVIC, SYSTICK) functionalities.
228
229
230 @endverbatim
231 * @{
232 */
233
234
235
236 /**
237 * @brief Sets Pending bit of an external interrupt.
238 * @param IRQn External interrupt number
239 * This parameter can be an enumerator of @ref IRQn_Type enumeration
240 * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file)
241 * @retval None
242 */
243 void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn)
244 {
245 /* Set interrupt pending */
246 NVIC_SetPendingIRQ(IRQn);
247 }
248
249 /**
250 * @brief Gets Pending Interrupt (reads the pending register in the NVIC
251 * and returns the pending bit for the specified interrupt).
252 * @param IRQn External interrupt number .
253 * This parameter can be an enumerator of IRQn_Type enumeration
254 * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file)
255 * @retval status: - 0 Interrupt status is not pending.
256 * - 1 Interrupt status is pending.
257 */
258 uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn)
259 {
260 /* Return 1 if pending else 0 */
261 return NVIC_GetPendingIRQ(IRQn);
262 }
263
264 /**
265 * @brief Clears the pending bit of an external interrupt.
266 * @param IRQn External interrupt number .
267 * This parameter can be an enumerator of IRQn_Type enumeration
268 * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file)
269 * @retval None
270 */
271 void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn)
272 {
273 /* Clear pending interrupt */
274 NVIC_ClearPendingIRQ(IRQn);
275 }
276
277
278 /**
279 * @brief Configures the SysTick clock source.
280 * @param CLKSource: specifies the SysTick clock source.
281 * This parameter can be one of the following values:
282 * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source.
283 * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.
284 * @retval None
285 */
286 void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource)
287 {
288 /* Check the parameters */
289 assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource));
290 if (CLKSource == SYSTICK_CLKSOURCE_HCLK)
291 {
292 SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
293 }
294 else
295 {
296 SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK;
297 }
298 }
299
300 /**
301 * @brief This function handles SYSTICK interrupt request.
302 * @param None
303 * @retval None
304 */
305 void HAL_SYSTICK_IRQHandler(void)
306 {
307 HAL_SYSTICK_Callback();
308 }
309
310 /**
311 * @brief SYSTICK callback.
312 * @param None
313 * @retval None
314 */
315 __weak void HAL_SYSTICK_Callback(void)
316 {
317 /* NOTE : This function Should not be modified, when the callback is needed,
318 the HAL_SYSTICK_Callback could be implemented in the user file
319 */
320 }
321
322 /**
323 * @}
324 */
325
326 /**
327 * @}
328 */
329
330 #endif /* HAL_CORTEX_MODULE_ENABLED */
331 /**
332 * @}
333 */
334
335 /**
336 * @}
337 */
338
339 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
340
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