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1 /**
2 ******************************************************************************
3 * @file stm32l0xx_hal_i2c.h
4 * @author MCD Application Team
5 * @version V1.2.0
6 * @date 06-February-2015
7 * @brief Header file of I2C HAL module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32L0xx_HAL_I2C_H
40 #define __STM32L0xx_HAL_I2C_H
41
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32l0xx_hal_def.h"
48
49 /** @addtogroup STM32L0xx_HAL_Driver
50 * @{
51 */
52
53 /** @addtogroup I2C
54 * @{
55 */
56
57 /* Exported types ------------------------------------------------------------*/
58 /** @defgroup I2C_Exported_Types I2C Exported Types
59 * @{
60 */
61
62 /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
63 * @brief I2C Configuration Structure definition
64 * @{
65 */
66 typedef struct
67 {
68 uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value.
69 This parameter calculated by referring to I2C initialization
70 section in Reference manual */
71
72 uint32_t OwnAddress1; /*!< Specifies the first device own address.
73 This parameter can be a 7-bit or 10-bit address. */
74
75 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
76 This parameter can be a value of @ref I2C_addressing_mode */
77
78 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
79 This parameter can be a value of @ref I2C_dual_addressing_mode */
80
81 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
82 This parameter can be a 7-bit address. */
83
84 uint32_t OwnAddress2Masks; /*!< Specifies the acknoledge mask address second device own address if dual addressing mode is selected
85 This parameter can be a value of @ref I2C_own_address2_masks */
86
87 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
88 This parameter can be a value of @ref I2C_general_call_addressing_mode */
89
90 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
91 This parameter can be a value of @ref I2C_nostretch_mode */
92
93 }I2C_InitTypeDef;
94
95 /**
96 * @}
97 */
98
99 /** @defgroup HAL_state_structure_definition HAL state structure definition
100 * @brief HAL State structure definition
101 * @{
102 */
103
104 typedef enum
105 {
106 HAL_I2C_STATE_RESET = 0x00, /*!< I2C not yet initialized or disabled */
107 HAL_I2C_STATE_READY = 0x01, /*!< I2C initialized and ready for use */
108 HAL_I2C_STATE_BUSY = 0x02, /*!< I2C internal process is ongoing */
109 HAL_I2C_STATE_MASTER_BUSY_TX = 0x12, /*!< Master Data Transmission process is ongoing */
110 HAL_I2C_STATE_MASTER_BUSY_RX = 0x22, /*!< Master Data Reception process is ongoing */
111 HAL_I2C_STATE_SLAVE_BUSY_TX = 0x32, /*!< Slave Data Transmission process is ongoing */
112 HAL_I2C_STATE_SLAVE_BUSY_RX = 0x42, /*!< Slave Data Reception process is ongoing */
113 HAL_I2C_STATE_MEM_BUSY_TX = 0x52, /*!< Memory Data Transmission process is ongoing */
114 HAL_I2C_STATE_MEM_BUSY_RX = 0x62, /*!< Memory Data Reception process is ongoing */
115 HAL_I2C_STATE_TIMEOUT = 0x03, /*!< Timeout state */
116 HAL_I2C_STATE_ERROR = 0x04 /*!< Reception process is ongoing */
117 }HAL_I2C_StateTypeDef;
118
119 /**
120 * @}
121 */
122
123 /** @defgroup I2C_Error_Code I2C Error Code
124 * @brief I2C Error Code
125 * @{
126 */
127 #define HAL_I2C_ERROR_NONE 0x00 /*!< No error */
128 #define HAL_I2C_ERROR_BERR 0x01 /*!< BERR error */
129 #define HAL_I2C_ERROR_ARLO 0x02 /*!< ARLO error */
130 #define HAL_I2C_ERROR_AF 0x04 /*!< ACKF error */
131 #define HAL_I2C_ERROR_OVR 0x08 /*!< OVR error */
132 #define HAL_I2C_ERROR_DMA 0x10 /*!< DMA transfer error */
133 #define HAL_I2C_ERROR_TIMEOUT 0x20 /*!< Timeout error */
134 #define HAL_I2C_ERROR_SIZE 0x40 /*!< Size Management error */
135 /**
136 * @}
137 */
138
139 /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
140 * @brief I2C handle Structure definition
141 * @{
142 */
143 typedef struct
144 {
145 I2C_TypeDef *Instance; /*!< I2C registers base address */
146
147 I2C_InitTypeDef Init; /*!< I2C communication parameters */
148
149 uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */
150
151 uint16_t XferSize; /*!< I2C transfer size */
152
153 __IO uint16_t XferCount; /*!< I2C transfer counter */
154
155 DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */
156
157 DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */
158
159 HAL_LockTypeDef Lock; /*!< I2C locking object */
160
161 __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */
162
163 __IO uint32_t ErrorCode; /*!< I2C Error code, see I2C_Error_Code */
164
165 }I2C_HandleTypeDef;
166 /**
167 * @}
168 */
169
170 /**
171 * @}
172 */
173 /* Exported constants --------------------------------------------------------*/
174
175 /** @defgroup I2C_Exported_Constants I2C Exported Constants
176 * @{
177 */
178
179 /** @defgroup I2C_addressing_mode I2C addressing mode
180 * @{
181 */
182 #define I2C_ADDRESSINGMODE_7BIT ((uint32_t)0x00000001)
183 #define I2C_ADDRESSINGMODE_10BIT ((uint32_t)0x00000002)
184 /**
185 * @}
186 */
187
188 /** @defgroup I2C_dual_addressing_mode I2C dual addressing mode
189 * @{
190 */
191 #define I2C_DUALADDRESS_DISABLE ((uint32_t)0x00000000)
192 #define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN
193 /**
194 * @}
195 */
196
197 /** @defgroup I2C_own_address2_masks I2C own address2 masks
198 * @{
199 */
200 #define I2C_OA2_NOMASK ((uint8_t)0x00)
201 #define I2C_OA2_MASK01 ((uint8_t)0x01)
202 #define I2C_OA2_MASK02 ((uint8_t)0x02)
203 #define I2C_OA2_MASK03 ((uint8_t)0x03)
204 #define I2C_OA2_MASK04 ((uint8_t)0x04)
205 #define I2C_OA2_MASK05 ((uint8_t)0x05)
206 #define I2C_OA2_MASK06 ((uint8_t)0x06)
207 #define I2C_OA2_MASK07 ((uint8_t)0x07)
208 /**
209 * @}
210 */
211
212 /** @defgroup I2C_general_call_addressing_mode I2C general call addressing mode
213 * @{
214 */
215 #define I2C_GENERALCALL_DISABLE ((uint32_t)0x00000000)
216 #define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN
217 /**
218 * @}
219 */
220
221 /** @defgroup I2C_nostretch_mode I2C nostretch mode
222 * @{
223 */
224 #define I2C_NOSTRETCH_DISABLE ((uint32_t)0x00000000)
225 #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
226 /**
227 * @}
228 */
229
230 /** @defgroup I2C_Memory_Address_Size I2C Memory Address Size
231 * @{
232 */
233 #define I2C_MEMADD_SIZE_8BIT ((uint32_t)0x00000001)
234 #define I2C_MEMADD_SIZE_16BIT ((uint32_t)0x00000002)
235 /**
236 * @}
237 */
238
239 /** @defgroup I2C_ReloadEndMode_definition I2C ReloadEndMode definition
240 * @{
241 */
242 #define I2C_RELOAD_MODE I2C_CR2_RELOAD
243 #define I2C_AUTOEND_MODE I2C_CR2_AUTOEND
244 #define I2C_SOFTEND_MODE ((uint32_t)0x00000000)
245 /**
246 * @}
247 */
248
249 /** @defgroup I2C_StartStopMode_definition I2C StartStopMode definition
250 * @{
251 */
252 #define I2C_NO_STARTSTOP ((uint32_t)0x00000000)
253 #define I2C_GENERATE_STOP I2C_CR2_STOP
254 #define I2C_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN)
255 #define I2C_GENERATE_START_WRITE I2C_CR2_START
256 /**
257 * @}
258 */
259
260 /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
261 * @brief I2C Interrupt definition
262 * Elements values convention: 0xXXXXXXXX
263 * - XXXXXXXX : Interrupt control mask
264 * @{
265 */
266 #define I2C_IT_ERRI I2C_CR1_ERRIE
267 #define I2C_IT_TCI I2C_CR1_TCIE
268 #define I2C_IT_STOPI I2C_CR1_STOPIE
269 #define I2C_IT_NACKI I2C_CR1_NACKIE
270 #define I2C_IT_ADDRI I2C_CR1_ADDRIE
271 #define I2C_IT_RXI I2C_CR1_RXIE
272 #define I2C_IT_TXI I2C_CR1_TXIE
273
274 /**
275 * @}
276 */
277
278
279 /** @defgroup I2C_Flag_definition I2C Flag definition
280 * @{
281 */
282 #define I2C_FLAG_TXE I2C_ISR_TXE
283 #define I2C_FLAG_TXIS I2C_ISR_TXIS
284 #define I2C_FLAG_RXNE I2C_ISR_RXNE
285 #define I2C_FLAG_ADDR I2C_ISR_ADDR
286 #define I2C_FLAG_AF I2C_ISR_NACKF
287 #define I2C_FLAG_STOPF I2C_ISR_STOPF
288 #define I2C_FLAG_TC I2C_ISR_TC
289 #define I2C_FLAG_TCR I2C_ISR_TCR
290 #define I2C_FLAG_BERR I2C_ISR_BERR
291 #define I2C_FLAG_ARLO I2C_ISR_ARLO
292 #define I2C_FLAG_OVR I2C_ISR_OVR
293 #define I2C_FLAG_PECERR I2C_ISR_PECERR
294 #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT
295 #define I2C_FLAG_ALERT I2C_ISR_ALERT
296 #define I2C_FLAG_BUSY I2C_ISR_BUSY
297 #define I2C_FLAG_DIR I2C_ISR_DIR
298 /**
299 * @}
300 */
301
302 /* Exported macros -----------------------------------------------------------*/
303
304 /** @defgroup I2C_Exported_Macros I2C Exported Macros
305 * @{
306 */
307
308 /** @brief Reset I2C handle state
309 * @param __HANDLE__: specifies the I2C Handle.
310 * @retval None
311 */
312 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
313
314 /** @brief Enable the specified I2C interrupts.
315 * @param __HANDLE__: specifies the I2C Handle.
316 * @param __INTERRUPT__: specifies the interrupt source to enable.
317 * This parameter can be one of the following values:
318 * @arg I2C_IT_ERRI: Errors interrupt enable
319 * @arg I2C_IT_TCI: Transfer complete interrupt enable
320 * @arg I2C_IT_STOPI: STOP detection interrupt enable
321 * @arg I2C_IT_NACKI: NACK received interrupt enable
322 * @arg I2C_IT_ADDRI: Address match interrupt enable
323 * @arg I2C_IT_RXI: RX interrupt enable
324 * @arg I2C_IT_TXI: TX interrupt enable
325 *
326 * @retval None
327 */
328
329 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
330
331 /** @brief Disable the specified I2C interrupts.
332 * @param __HANDLE__: specifies the I2C Handle.
333 * @param __INTERRUPT__: specifies the interrupt source to disable.
334 * This parameter can be one of the following values:
335 * @arg I2C_IT_ERRI: Errors interrupt enable
336 * @arg I2C_IT_TCI: Transfer complete interrupt enable
337 * @arg I2C_IT_STOPI: STOP detection interrupt enable
338 * @arg I2C_IT_NACKI: NACK received interrupt enable
339 * @arg I2C_IT_ADDRI: Address match interrupt enable
340 * @arg I2C_IT_RXI: RX interrupt enable
341 * @arg I2C_IT_TXI: TX interrupt enable
342 *
343 * @retval None
344 */
345 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
346
347 /** @brief Checks if the specified I2C interrupt source is enabled or disabled.
348 * @param __HANDLE__: specifies the I2C Handle.
349 * @param __INTERRUPT__: specifies the I2C interrupt source to check.
350 * This parameter can be one of the following values:
351 * @arg I2C_IT_ERRI: Errors interrupt enable
352 * @arg I2C_IT_TCI: Transfer complete interrupt enable
353 * @arg I2C_IT_STOPI: STOP detection interrupt enable
354 * @arg I2C_IT_NACKI: NACK received interrupt enable
355 * @arg I2C_IT_ADDRI: Address match interrupt enable
356 * @arg I2C_IT_RXI: RX interrupt enable
357 * @arg I2C_IT_TXI: TX interrupt enable
358 *
359 * @retval The new state of __INTERRUPT__ (TRUE or FALSE).
360 */
361 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
362
363 /** @brief Checks whether the specified I2C flag is set or not.
364 * @param __HANDLE__: specifies the I2C Handle.
365 * @param __FLAG__: specifies the flag to check.
366 * This parameter can be one of the following values:
367 * @arg I2C_FLAG_TXE: Transmit data register empty
368 * @arg I2C_FLAG_TXIS: Transmit interrupt status
369 * @arg I2C_FLAG_RXNE: Receive data register not empty
370 * @arg I2C_FLAG_ADDR: Address matched (slave mode)
371 * @arg I2C_FLAG_AF: Acknowledge failure received flag
372 * @arg I2C_FLAG_STOPF: STOP detection flag
373 * @arg I2C_FLAG_TC: Transfer complete (master mode)
374 * @arg I2C_FLAG_TCR: Transfer complete reload
375 * @arg I2C_FLAG_BERR: Bus error
376 * @arg I2C_FLAG_ARLO: Arbitration lost
377 * @arg I2C_FLAG_OVR: Overrun/Underrun
378 * @arg I2C_FLAG_PECERR: PEC error in reception
379 * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag
380 * @arg I2C_FLAG_ALERT: SMBus alert
381 * @arg I2C_FLAG_BUSY: Bus busy
382 * @arg I2C_FLAG_DIR: Transfer direction (slave mode)
383 *
384 * @retval The new state of __FLAG__ (TRUE or FALSE).
385 */
386 #define I2C_FLAG_MASK ((uint32_t)0x0001FFFF)
387 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)))
388
389 /** @brief Clears the I2C pending flags which are cleared by writing 1 in a specific bit.
390 * @param __HANDLE__: specifies the I2C Handle.
391 * @param __FLAG__: specifies the flag to clear.
392 * This parameter can be any combination of the following values:
393 * @arg I2C_FLAG_ADDR: Address matched (slave mode)
394 * @arg I2C_FLAG_AF: Acknowledge failure received flag
395 * @arg I2C_FLAG_STOPF: STOP detection flag
396 * @arg I2C_FLAG_BERR: Bus error
397 * @arg I2C_FLAG_ARLO: Arbitration lost
398 * @arg I2C_FLAG_OVR: Overrun/Underrun
399 * @arg I2C_FLAG_PECERR: PEC error in reception
400 * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag
401 * @arg I2C_FLAG_ALERT: SMBus alert
402 *
403 * @retval None
404 */
405 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = ((__FLAG__) & I2C_FLAG_MASK))
406
407 /** @brief Enable the specified I2C peripheral.
408 * @param __HANDLE__: specifies the I2C Handle.
409 * @retval None
410 */
411 #define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
412
413 /** @brief Disable the specified I2C peripheral.
414 * @param __HANDLE__: specifies the I2C Handle.
415 * @retval None
416 */
417 #define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
418
419 /**
420 * @}
421 */
422
423 /* Include I2C HAL Extension module */
424 #include "stm32l0xx_hal_i2c_ex.h"
425
426 /* Exported functions --------------------------------------------------------*/
427 /** @addtogroup I2C_Exported_Functions
428 * @{
429 */
430
431 /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
432 * @{
433 */
434 /* Initialization and de-initialization functions******************************/
435 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
436 HAL_StatusTypeDef HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c);
437 void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
438 void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
439 /**
440 * @}
441 */
442
443 /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
444 * @{
445 */
446 /* IO operation functions ****************************************************/
447 /******* Blocking mode: Polling */
448 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
449 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
450 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
451 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
452 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
453 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
454 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
455
456 /******* Non-Blocking mode: Interrupt */
457 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
458 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
459 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
460 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
461 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
462 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
463
464 /******* Non-Blocking mode: DMA */
465 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
466 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
467 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
468 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
469 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
470 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
471 /**
472 * @}
473 */
474
475 /** @addtogroup IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
476 * @{
477 */
478 /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
479 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
480 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
481 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
482 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
483 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
484 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
485 void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
486 void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
487 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
488 /**
489 * @}
490 */
491
492 /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions
493 * @{
494 */
495 /* Peripheral State and Errors functions *************************************/
496 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
497 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
498
499 /**
500 * @}
501 */
502
503 /**
504 * @}
505 */
506
507 /* Private constants ---------------------------------------------------------*/
508 /** @defgroup I2C_Private_Constants I2C Private Constants
509 * @{
510 */
511
512 /**
513 * @}
514 */
515
516 /* Private macros ------------------------------------------------------------*/
517 /** @defgroup I2C_Private_Macro I2C Private Macros
518 * @{
519 */
520
521 #define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \
522 ((MODE) == I2C_ADDRESSINGMODE_10BIT))
523
524 #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
525 ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
526
527 #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \
528 ((MASK) == I2C_OA2_MASK01) || \
529 ((MASK) == I2C_OA2_MASK02) || \
530 ((MASK) == I2C_OA2_MASK03) || \
531 ((MASK) == I2C_OA2_MASK04) || \
532 ((MASK) == I2C_OA2_MASK05) || \
533 ((MASK) == I2C_OA2_MASK06) || \
534 ((MASK) == I2C_OA2_MASK07))
535
536 #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
537 ((CALL) == I2C_GENERALCALL_ENABLE))
538
539 #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
540 ((STRETCH) == I2C_NOSTRETCH_ENABLE))
541
542 #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
543 ((SIZE) == I2C_MEMADD_SIZE_16BIT))
544
545
546 #define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \
547 ((MODE) == I2C_AUTOEND_MODE) || \
548 ((MODE) == I2C_SOFTEND_MODE))
549
550 #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \
551 ((REQUEST) == I2C_GENERATE_START_READ) || \
552 ((REQUEST) == I2C_GENERATE_START_WRITE) || \
553 ((REQUEST) == I2C_NO_STARTSTOP))
554
555
556 #define __I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))
557
558 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= (uint32_t)0x000003FF)
559 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FF)
560
561 #define __I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00))) >> 8)))
562 #define __I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FF))))
563
564 #define __I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
565 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
566 /**
567 * @}
568 */
569
570 /* Private Fonctions ---------------------------------------------------------*/
571 /** @defgroup I2C_Private_Functions I2C Private Functions
572 * @{
573 */
574 /* Private functions are defined in stm32l0xx_hal_i2c.c file */
575 /**
576 * @}
577 */
578
579 /**
580 * @}
581 */
582
583 /**
584 * @}
585 */
586
587 #ifdef __cplusplus
588 }
589 #endif
590
591
592 #endif /* __STM32L0xx_HAL_I2C_H */
593
594 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
595
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