tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_pcd.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32l0xx_hal_pcd.h
   4   * @author  MCD Application Team
   5   * @version V1.2.0
   6   * @date    06-February-2015
   7   * @brief   Header file of PCD HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38
  39
  40 /* Define to prevent recursive inclusion -------------------------------------*/
  41 #ifndef __STM32L0xx_HAL_PCD_H
  42 #define __STM32L0xx_HAL_PCD_H
  43
  44 #ifdef __cplusplus
  45  extern "C" {
  46 #endif
  47
  48 #if !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx)
  49
  50 /* Includes ------------------------------------------------------------------*/
  51 #include "stm32l0xx_hal_def.h"
  52 /** @addtogroup STM32L0xx_HAL_Driver
  53   * @{
  54   */
  55
  56 /** @addtogroup PCD
  57   * @{
  58   */
  59
  60 /* Exported types ------------------------------------------------------------*/
  61
  62    /**
  63   * @brief  PCD State structures definition
  64   */
  65 typedef enum
  66 {
  67   PCD_READY    = 0x00,
  68   PCD_ERROR    = 0x01,
  69   PCD_BUSY     = 0x02,
  70   PCD_TIMEOUT  = 0x03
  71 } PCD_StateTypeDef;
  72
  73 typedef enum
  74 {
  75   /* double buffered endpoint direction */
  76   PCD_EP_DBUF_OUT,
  77   PCD_EP_DBUF_IN,
  78   PCD_EP_DBUF_ERR,
  79 }PCD_EP_DBUF_DIR;
  80
  81 /* endpoint buffer number */
  82 typedef enum
  83 {
  84   PCD_EP_NOBUF,
  85   PCD_EP_BUF0,
  86   PCD_EP_BUF1
  87 }PCD_EP_BUF_NUM;
  88
  89 #define PCD_ENDP0                             ((uint8_t)0)
  90 #define PCD_ENDP1                             ((uint8_t)1)
  91 #define PCD_ENDP2                             ((uint8_t)2)
  92 #define PCD_ENDP3                             ((uint8_t)3)
  93 #define PCD_ENDP4                             ((uint8_t)4)
  94 #define PCD_ENDP5                             ((uint8_t)5)
  95 #define PCD_ENDP6                             ((uint8_t)6)
  96 #define PCD_ENDP7                             ((uint8_t)7)
  97
  98 /*  Endpoint Kind */
  99 #define PCD_SNG_BUF                                      0
 100 #define PCD_DBL_BUF                                      1
 101
 102 #define IS_PCD_ALL_INSTANCE            IS_USB_ALL_INSTANCE
 103 /**
 104   * @brief  PCD Initialization Structure definition
 105   */
 106 typedef struct
 107 {
 108   uint32_t dev_endpoints;        /*!< Device Endpoints number.
 109                                       This parameter depends on the used USB core.
 110                                       This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
 111
 112   uint32_t speed;                /*!< USB Core speed.
 113                                       This parameter can be any value of @ref PCD_Speed                */
 114
 115   uint32_t ep0_mps;              /*!< Set the Endpoint 0 Max Packet size.
 116                                       This parameter can be any value of @ref PCD_USB_EP0_MPS                   */
 117
 118   uint32_t phy_itface;           /*!< Select the used PHY interface.
 119                                       This parameter can be any value of @ref PCD_USB_Core_PHY                  */
 120
 121   uint32_t Sof_enable;           /*!< Enable or disable the output of the SOF signal.
 122                                       This parameter can be set to ENABLE or DISABLE                        */
 123
 124   uint32_t low_power_enable;       /*!< Enable or disable Low Power mode
 125                                         This parameter can be set to ENABLE or DISABLE                      */
 126
 127   uint32_t lpm_enable;             /*!< Enable or disable Link Power Management.
 128                                         This parameter can be set to ENABLE or DISABLE */
 129
 130   uint32_t battery_charging_enable; /*!< Enable or disable Battery charging.
 131                                          This parameter can be set to ENABLE or DISABLE */
 132
 133 }PCD_InitTypeDef;
 134
 135 typedef struct
 136 {
 137   uint8_t   num;            /*!< Endpoint number
 138                                 This parameter must be a number between Min_Data = 1 and Max_Data = 15    */
 139
 140   uint8_t   is_in;          /*!< Endpoint direction
 141                                 This parameter must be a number between Min_Data = 0 and Max_Data = 1     */
 142
 143   uint8_t   is_stall;       /*!< Endpoint stall condition
 144                                 This parameter must be a number between Min_Data = 0 and Max_Data = 1     */
 145
 146   uint8_t   type;           /*!< Endpoint type
 147                                  This parameter can be any value of @ref PCD_USB_EP_Type                     */
 148
 149   uint16_t  pmaadress;      /*!< PMA Address
 150                                  This parameter can be any value between Min_addr = 0 and Max_addr = 1K   */
 151
 152
 153   uint16_t  pmaaddr0;       /*!< PMA Address0
 154                                  This parameter can be any value between Min_addr = 0 and Max_addr = 1K   */
 155
 156
 157   uint16_t  pmaaddr1;        /*!< PMA Address1
 158                                  This parameter can be any value between Min_addr = 0 and Max_addr = 1K   */
 159
 160
 161   uint8_t   doublebuffer;    /*!< Double buffer enable
 162                                  This parameter can be 0 or 1                                             */
 163
 164   uint32_t  maxpacket;      /*!< Endpoint Max packet size
 165                                  This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
 166
 167   uint8_t   *xfer_buff;     /*!< Pointer to transfer buffer                                               */
 168
 169
 170   uint32_t  xfer_len;       /*!< Current transfer length                                                  */
 171
 172   uint32_t  xfer_count;     /*!< Partial transfer length in case of multi packet transfer                 */
 173
 174 }PCD_EPTypeDef;
 175
 176 typedef   USB_TypeDef PCD_TypeDef;
 177
 178 /**
 179   * @brief  PCD Handle Structure definition
 180   */
 181 typedef struct
 182 {
 183   PCD_TypeDef             *Instance;   /*!< Register base address              */
 184   PCD_InitTypeDef         Init;       /*!< PCD required parameters            */
 185   __IO uint8_t            USB_Address; /*!< USB Address            */
 186   PCD_EPTypeDef           IN_ep[8];  /*!< IN endpoint parameters             */
 187   PCD_EPTypeDef           OUT_ep[8]; /*!< OUT endpoint parameters            */
 188   HAL_LockTypeDef         Lock;       /*!< PCD peripheral status              */
 189   __IO PCD_StateTypeDef   State;      /*!< PCD communication state            */
 190   uint32_t                Setup[12];  /*!< Setup packet buffer                */
 191   void                    *pData;      /*!< Pointer to upper stack Handler     */
 192
 193 } PCD_HandleTypeDef;
 194
 195 #include "stm32l0xx_hal_pcd_ex.h"
 196 /* Exported constants --------------------------------------------------------*/
 197 /** @defgroup PCD_Exported_Constants
 198   * @{
 199   */
 200
 201 /** @defgroup PCD_Speed
 202   * @{
 203   */
 204 #define PCD_SPEED_HIGH               0 /* Not Supported */
 205 #define PCD_SPEED_FULL               2
 206 /**
 207   * @}
 208   */
 209
 210   /** @defgroup PCD_USB_Core_PHY
 211   * @{
 212   */
 213 #define PCD_PHY_EMBEDDED             2
 214 /**
 215   * @}
 216   */
 217
 218   /** @defgroup PCD_USB_EP0_MPS
 219   * @{
 220   */
 221 #define DEP0CTL_MPS_64                         0
 222 #define DEP0CTL_MPS_32                         1
 223 #define DEP0CTL_MPS_16                         2
 224 #define DEP0CTL_MPS_8                          3
 225
 226 #define PCD_EP0MPS_64                          DEP0CTL_MPS_64
 227 #define PCD_EP0MPS_32                          DEP0CTL_MPS_32
 228 #define PCD_EP0MPS_16                          DEP0CTL_MPS_16
 229 #define PCD_EP0MPS_08                          DEP0CTL_MPS_8
 230 /**
 231   * @}
 232   */
 233
 234 /** @defgroup PCD_USB_EP_Type
 235   * @{
 236   */
 237 #define PCD_EP_TYPE_CTRL                                 0
 238 #define PCD_EP_TYPE_ISOC                                 1
 239 #define PCD_EP_TYPE_BULK                                 2
 240 #define PCD_EP_TYPE_INTR                                 3
 241 /**
 242   * @}
 243   */
 244
 245 /**
 246   * @}
 247   */
 248
 249 /* Exported macros -----------------------------------------------------------*/
 250
 251 /** @defgroup PCD_Interrupt_Clock
 252  *  @brief macros to handle interrupts and specific clock configurations
 253  * @{
 254  */
 255 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__)      ((((__HANDLE__)->Instance->ISTR) & (__INTERRUPT__)) == (__INTERRUPT__))
 256 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)    (((__HANDLE__)->Instance->ISTR) = ~(__INTERRUPT__))
 257
 258 #define  USB_WAKEUP_EXTI_LINE              ((uint32_t)0x00040000)  /*!< External interrupt line 18 Connected to the USB FS EXTI Line */
 259
 260 #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT()    EXTI->IMR |= USB_WAKEUP_EXTI_LINE
 261 #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT()   EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
 262 #define __HAL_USB_EXTI_GENERATE_SWIT() (EXTI->SWIER |= USB_WAKEUP_EXTI_LINE)
 263
 264 /* Internal macros -----------------------------------------------------------*/
 265
 266 /* SetENDPOINT */
 267 #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue)  (*(&USBx->EP0R + bEpNum * 2)= (uint16_t)wRegValue)
 268
 269 /* GetENDPOINT */
 270 #define PCD_GET_ENDPOINT(USBx, bEpNum)        (*(&USBx->EP0R + bEpNum * 2))
 271
 272
 273
 274 /**
 275   * @brief  sets the type in the endpoint register(bits EP_TYPE[1:0])
 276   * @param  bEpNum: Endpoint Number.
 277   * @param  wType: Endpoint Type.
 278   * @retval None
 279   */
 280 #define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT(USBx, bEpNum,\
 281                                   ((PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EP_T_MASK) | wType )))
 282
 283 /**
 284   * @brief  gets the type in the endpoint register(bits EP_TYPE[1:0])
 285   * @param  bEpNum: Endpoint Number.
 286   * @retval Endpoint Type
 287   */
 288 #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EP_T_FIELD)
 289
 290
 291 /**
 292   * @brief free buffer used from the application realizing it to the line
 293           toggles bit SW_BUF in the double buffered endpoint register
 294   * @param   bEpNum, bDir
 295   * @retval None
 296   */
 297 #define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
 298 {\
 299   if (bDir == PCD_EP_DBUF_OUT)\
 300   { /* OUT double buffered endpoint */\
 301     PCD_TX_DTOG(USBx, bEpNum);\
 302   }\
 303   else if (bDir == PCD_EP_DBUF_IN)\
 304   { /* IN double buffered endpoint */\
 305     PCD_RX_DTOG(USBx, bEpNum);\
 306   }\
 307 }
 308
 309 /**
 310   * @brief gets direction of the double buffered endpoint
 311   * @param   bEpNum: Endpoint Number.
 312   * @retval EP_DBUF_OUT, EP_DBUF_IN,
 313   *         EP_DBUF_ERR if the endpoint counter not yet programmed.
 314   */
 315 #define PCD_GET_DB_DIR(USBx, bEpNum)\
 316 {\
 317   if ((uint16_t)(*PCD_EP_RX_CNT(USBx, bEpNum) & 0xFC00) != 0)\
 318     return(PCD_EP_DBUF_OUT);\
 319   else if (((uint16_t)(*PCD_EP_TX_CNT(USBx, bEpNum)) & 0x03FF) != 0)\
 320     return(PCD_EP_DBUF_IN);\
 321   else\
 322     return(PCD_EP_DBUF_ERR);\
 323 }
 324
 325 /**
 326   * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
 327   * @param  bEpNum: Endpoint Number.
 328   * @param  wState: new state
 329   * @retval None
 330   */
 331 #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) {\
 332    register uint16_t _wRegVal;       \
 333    \
 334     _wRegVal = PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPTX_DTOGMASK;\
 335    /* toggle first bit ? */     \
 336    if((USB_EPTX_DTOG1 & wState)!= 0)      \
 337      _wRegVal ^= USB_EPTX_DTOG1;        \
 338    /* toggle second bit ?  */         \
 339    if((USB_EPTX_DTOG2 & wState)!= 0)      \
 340      _wRegVal ^= USB_EPTX_DTOG2;        \
 341    PCD_SET_ENDPOINT(USBx, bEpNum, (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX));    \
 342   } /* PCD_SET_EP_TX_STATUS */
 343
 344 /**
 345   * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
 346   * @param  bEpNum: Endpoint Number.
 347   * @param  wState: new state
 348   * @retval None
 349   */
 350 #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
 351     register uint16_t _wRegVal;   \
 352     \
 353     _wRegVal = PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPRX_DTOGMASK;\
 354     /* toggle first bit ? */  \
 355     if((USB_EPRX_DTOG1 & wState)!= 0) \
 356       _wRegVal ^= USB_EPRX_DTOG1;  \
 357     /* toggle second bit ? */  \
 358     if((USB_EPRX_DTOG2 & wState)!= 0) \
 359       _wRegVal ^= USB_EPRX_DTOG2;  \
 360     PCD_SET_ENDPOINT(USBx, bEpNum, (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
 361   } /* PCD_SET_EP_RX_STATUS */
 362
 363 /**
 364   * @brief  sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
 365   * @param  bEpNum: Endpoint Number.
 366   * @param  wStaterx: new state.
 367   * @param  wStatetx: new state.
 368   * @retval None
 369   */
 370 #define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\
 371     register uint32_t _wRegVal;   \
 372     \
 373     _wRegVal = PCD_GET_ENDPOINT(USBx, bEpNum) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\
 374     /* toggle first bit ? */  \
 375     if((USB_EPRX_DTOG1 & wStaterx)!= 0) \
 376       _wRegVal ^= USB_EPRX_DTOG1;  \
 377     /* toggle second bit ? */  \
 378     if((USB_EPRX_DTOG2 & wStaterx)!= 0) \
 379       _wRegVal ^= USB_EPRX_DTOG2;  \
 380     /* toggle first bit ? */     \
 381     if((USB_EPTX_DTOG1 & wStatetx)!= 0)      \
 382       _wRegVal ^= USB_EPTX_DTOG1;        \
 383     /* toggle second bit ?  */         \
 384     if((USB_EPTX_DTOG2 & wStatetx)!= 0)      \
 385       _wRegVal ^= USB_EPTX_DTOG2;        \
 386     PCD_SET_ENDPOINT(USBx, bEpNum, _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX);    \
 387   } /* PCD_SET_EP_TXRX_STATUS */
 388
 389 /**
 390   * @brief  gets the status for tx/rx transfer (bits STAT_TX[1:0]
 391   *         /STAT_RX[1:0])
 392   * @param  bEpNum: Endpoint Number.
 393   * @retval status
 394   */
 395 #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPTX_STAT)
 396
 397 #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPRX_STAT)
 398
 399 /**
 400   * @brief  sets directly the VALID tx/rx-status into the endpoint register
 401   * @param  bEpNum: Endpoint Number.
 402   * @retval None
 403   */
 404 #define PCD_SET_EP_TX_VALID(USBx, bEpNum)     (PCD_SET_EP_TX_STATUS(USBx, bEpNum, USB_EP_TX_VALID))
 405
 406 #define PCD_SET_EP_RX_VALID(USBx, bEpNum)     (PCD_SET_EP_RX_STATUS(USBx, bEpNum, USB_EP_RX_VALID))
 407
 408 /**
 409   * @brief  checks stall condition in an endpoint.
 410   * @param  bEpNum: Endpoint Number.
 411   * @retval TRUE = endpoint in stall condition.
 412   */
 413 #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS(USBx, bEpNum) \
 414                                    == USB_EP_TX_STALL)
 415 #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS(USBx, bEpNum) \
 416                                    == USB_EP_RX_STALL)
 417
 418 /**
 419   * @brief  set & clear EP_KIND bit.
 420   * @param  bEpNum: Endpoint Number.
 421   * @retval None
 422   */
 423 #define PCD_SET_EP_KIND(USBx, bEpNum)    (PCD_SET_ENDPOINT(USBx, bEpNum, \
 424                                 (USB_EP_CTR_RX|USB_EP_CTR_TX|((PCD_GET_ENDPOINT(USBx, bEpNum) | USB_EP_KIND) & USB_EPREG_MASK))))
 425 #define PCD_CLEAR_EP_KIND(USBx, bEpNum)  (PCD_SET_ENDPOINT(USBx, bEpNum, \
 426                                 (USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPKIND_MASK))))
 427
 428 /**
 429   * @brief  Sets/clears directly STATUS_OUT bit in the endpoint register.
 430   * @param  bEpNum: Endpoint Number.
 431   * @retval None
 432   */
 433 #define PCD_SET_OUT_STATUS(USBx, bEpNum)    PCD_SET_EP_KIND(USBx, bEpNum)
 434 #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum)  PCD_CLEAR_EP_KIND(USBx, bEpNum)
 435
 436 /**
 437   * @brief  Sets/clears directly EP_KIND bit in the endpoint register.
 438   * @param  bEpNum: Endpoint Number.
 439   * @retval None
 440   */
 441 #define PCD_SET_EP_DBUF(USBx, bEpNum)   PCD_SET_EP_KIND(USBx, bEpNum)
 442 #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND(USBx, bEpNum)
 443
 444 /**
 445   * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
 446   * @param  bEpNum: Endpoint Number.
 447   * @retval None
 448   */
 449 #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum)   (PCD_SET_ENDPOINT(USBx, bEpNum,\
 450                                    PCD_GET_ENDPOINT(USBx, bEpNum) & 0x7FFF & USB_EPREG_MASK))
 451 #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum)   (PCD_SET_ENDPOINT(USBx, bEpNum,\
 452                                    PCD_GET_ENDPOINT(USBx, bEpNum) & 0xFF7F & USB_EPREG_MASK))
 453
 454 /**
 455   * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
 456   * @param  bEpNum: Endpoint Number.
 457   * @retval None
 458   */
 459 #define PCD_RX_DTOG(USBx, bEpNum)    (PCD_SET_ENDPOINT(USBx, bEpNum, \
 460                                    USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPREG_MASK)))
 461 #define PCD_TX_DTOG(USBx, bEpNum)    (PCD_SET_ENDPOINT(USBx, bEpNum, \
 462                                    USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPREG_MASK)))
 463
 464 /**
 465   * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.
 466   * @param  bEpNum: Endpoint Number.
 467   * @retval None
 468   */
 469 #define PCD_CLEAR_RX_DTOG(USBx, bEpNum)  if((PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EP_DTOG_RX) != 0)\
 470     PCD_RX_DTOG(USBx, bEpNum)
 471 #define PCD_CLEAR_TX_DTOG(USBx, bEpNum)  if((PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EP_DTOG_TX) != 0)\
 472     PCD_TX_DTOG(USBx, bEpNum)
 473
 474 /**
 475   * @brief  Sets address in an endpoint register.
 476   * @param  bEpNum: Endpoint Number.
 477   * @param  bAddr: Address.
 478   * @retval None
 479   */
 480 #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT(USBx, bEpNum,\
 481     USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPREG_MASK) | bAddr)
 482
 483 /**
 484   * @brief  Gets address in an endpoint register.
 485   * @param  bEpNum: Endpoint Number.
 486   * @retval None
 487   */
 488 #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPADDR_FIELD))
 489 #define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t *)((USBx->BTABLE+bEpNum*8)+     ((uint32_t)USBx + 0x400)))
 490 #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((USBx->BTABLE+bEpNum*8+2)+  ((uint32_t)USBx + 0x400)))
 491 #define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t *)((USBx->BTABLE+bEpNum*8+4)+  ((uint32_t)USBx + 0x400)))
 492 #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((USBx->BTABLE+bEpNum*8+6)+  ((uint32_t)USBx + 0x400)))
 493
 494 /**
 495   * @brief  sets address of the tx/rx buffer.
 496   * @param  bEpNum: Endpoint Number.
 497   * @param  wAddr: address to be set (must be word aligned).
 498   * @retval None
 499   */
 500 #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS(USBx, bEpNum) = ((wAddr >> 1) << 1))
 501 #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS(USBx, bEpNum) = ((wAddr >> 1) << 1))
 502
 503 /**
 504   * @brief  Gets address of the tx/rx buffer.
 505   * @param  bEpNum: Endpoint Number.
 506   * @retval address of the buffer.
 507   */
 508 #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS(USBx, bEpNum))
 509 #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS(USBx, bEpNum))
 510
 511 /**
 512   * @brief  Sets counter of rx buffer with no. of blocks.
 513   * @param  bEpNum: Endpoint Number.
 514   * @param  wCount: Counter.
 515   * @retval None
 516   */
 517 #define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
 518     wNBlocks = wCount >> 5;\
 519     if((wCount & 0x1f) == 0)\
 520       wNBlocks--;\
 521     *pdwReg = (uint16_t)((wNBlocks << 10) | 0x8000);\
 522   }/* PCD_CALC_BLK32 */
 523
 524 #define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
 525     wNBlocks = wCount >> 1;\
 526     if((wCount & 0x1) != 0)\
 527       wNBlocks++;\
 528     *pdwReg = (uint16_t)(wNBlocks << 10);\
 529   }/* PCD_CALC_BLK2 */
 530
 531 #define PCD_SET_EP_CNT_RX_REG(dwReg,wCount)  {\
 532     uint16_t wNBlocks;\
 533     if(wCount > 62){PCD_CALC_BLK32(dwReg,wCount,wNBlocks);}\
 534     else {PCD_CALC_BLK2(dwReg,wCount,wNBlocks);}\
 535   }/* PCD_SET_EP_CNT_RX_REG */
 536
 537 #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\
 538     uint16_t *pdwReg = PCD_EP_TX_CNT(USBx, bEpNum); \
 539     PCD_SET_EP_CNT_RX_REG(pdwReg, wCount);\
 540   }
 541 /**
 542   * @brief  sets counter for the tx/rx buffer.
 543   * @param  bEpNum: Endpoint Number.
 544   * @param  wCount: Counter value.
 545   * @retval None
 546   */
 547 #define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT(USBx, bEpNum) = wCount)
 548 #define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\
 549     uint16_t *pdwReg = PCD_EP_RX_CNT(USBx, bEpNum); \
 550     PCD_SET_EP_CNT_RX_REG(pdwReg, wCount);\
 551   }
 552
 553 /**
 554   * @brief  gets counter of the tx buffer.
 555   * @param  bEpNum: Endpoint Number.
 556   * @retval Counter value
 557   */
 558 #define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT(USBx, bEpNum)) & 0x3ff)
 559 #define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT(USBx, bEpNum)) & 0x3ff)
 560
 561 /**
 562   * @brief  Sets buffer 0/1 address in a double buffer endpoint.
 563   * @param  bEpNum: Endpoint Number.
 564   * @param  wBuf0Addr: buffer 0 address.
 565   * @retval Counter value
 566   */
 567 #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wBuf0Addr);}
 568 #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wBuf1Addr);}
 569
 570 /**
 571   * @brief  Sets addresses in a double buffer endpoint.
 572   * @param  bEpNum: Endpoint Number.
 573   * @param  wBuf0Addr: buffer 0 address.
 574   * @param  wBuf1Addr = buffer 1 address.
 575   * @retval None
 576   */
 577 #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
 578     PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr);\
 579     PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr);\
 580   } /* PCD_SET_EP_DBUF_ADDR */
 581
 582 /**
 583   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
 584   * @param  bEpNum: Endpoint Number.
 585   * @retval None
 586   */
 587 #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS(USBx, bEpNum))
 588 #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS(USBx, bEpNum))
 589
 590 /**
 591   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
 592   * @param  bEpNum: Endpoint Number.
 593   *        bDir: endpoint dir  EP_DBUF_OUT = OUT
 594   *         EP_DBUF_IN  = IN
 595   * @param  wCount: Counter value
 596   * @retval None
 597   */
 598 #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount)  { \
 599     if(bDir == PCD_EP_DBUF_OUT)\
 600       /* OUT endpoint */ \
 601     {PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount);} \
 602     else if(bDir == PCD_EP_DBUF_IN)\
 603       /* IN endpoint */ \
 604       *PCD_EP_TX_CNT(USBx, bEpNum) = (uint32_t)wCount;  \
 605   } /* SetEPDblBuf0Count*/
 606
 607 #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount)  { \
 608     if(bDir == PCD_EP_DBUF_OUT)\
 609       /* OUT endpoint */ \
 610     {PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount);}\
 611     else if(bDir == PCD_EP_DBUF_IN)\
 612       /* IN endpoint */\
 613       *PCD_EP_RX_CNT(USBx, bEpNum) = (uint32_t)wCount; \
 614   } /* SetEPDblBuf1Count */
 615
 616 #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\
 617     PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount); \
 618     PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount); \
 619   } /* PCD_SET_EP_DBUF_CNT  */
 620
 621 /**
 622   * @brief  Gets buffer 0/1 rx/tx counter for double buffering.
 623   * @param  bEpNum: Endpoint Number.
 624   * @retval None
 625   */
 626 #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT(USBx, bEpNum))
 627 #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT(USBx, bEpNum))
 628
 629
 630 /**
 631   * @}
 632   */
 633
 634 /* Exported functions --------------------------------------------------------*/
 635
 636 /* Initialization/de-initialization functions  **********************************/
 637 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
 638 HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
 639 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
 640 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
 641
 642 /* I/O operation functions  *****************************************************/
 643  /* Non-Blocking mode: Interrupt */
 644 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
 645 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
 646 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
 647
 648 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 649 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 650 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
 651 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
 652 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
 653 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
 654 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
 655 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 656 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 657 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
 658 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
 659
 660
 661
 662 /* Peripheral Control functions  ************************************************/
 663 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
 664 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
 665 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
 666 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
 667 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 668 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
 669 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
 670 uint16_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 671 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 672 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 673 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 674 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
 675 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
 676 /* Peripheral State functions  **************************************************/
 677 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
 678
 679 /**
 680   * @}
 681   */
 682
 683 /**
 684   * @}
 685   */
 686
 687 #endif /* #if !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx) */
 688
 689 #ifdef __cplusplus
 690 }
 691 #endif
 692
 693
 694 #endif /* __STM32L0xx_HAL_PCD_H */
 695
 696 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 697