tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_pwr.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32l0xx_hal_pwr.c
   4   * @author  MCD Application Team
   5   * @version V1.2.0
   6   * @date    06-February-2015
   7   * @brief   PWR HAL module driver.
   8   *
   9   *          This file provides firmware functions to manage the following
  10   *          functionalities of the Power Controller (PWR) peripheral:
  11   *           + Initialization/de-initialization functions
  12   *           + Peripheral Control functions
  13   *
  14   ******************************************************************************
  15   * @attention
  16   *
  17   * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
  18   *
  19   * Redistribution and use in source and binary forms, with or without modification,
  20   * are permitted provided that the following conditions are met:
  21   *   1. Redistributions of source code must retain the above copyright notice,
  22   *      this list of conditions and the following disclaimer.
  23   *   2. Redistributions in binary form must reproduce the above copyright notice,
  24   *      this list of conditions and the following disclaimer in the documentation
  25   *      and/or other materials provided with the distribution.
  26   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  27   *      may be used to endorse or promote products derived from this software
  28   *      without specific prior written permission.
  29   *
  30   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  31   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  32   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  33   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  34   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  35   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  36   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  37   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  38   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  39   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40   *
  41   ******************************************************************************
  42   */
  43
  44 /* Includes ------------------------------------------------------------------*/
  45 #include "stm32l0xx_hal.h"
  46
  47 #ifdef HAL_PWR_MODULE_ENABLED
  48 /** @addtogroup STM32L0xx_HAL_Driver
  49   * @{
  50   */
  51
  52 /** @addtogroup PWR
  53   * @{
  54   */
  55
  56 /** @addtogroup PWR_Private_Defines
  57   * @{
  58   */
  59
  60 /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask
  61   * @{
  62   */
  63 #define PVD_MODE_IT               ((uint32_t)0x00010000)
  64 #define PVD_MODE_EVT              ((uint32_t)0x00020000)
  65 #define PVD_RISING_EDGE           ((uint32_t)0x00000001)
  66 #define PVD_FALLING_EDGE          ((uint32_t)0x00000002)
  67 /**
  68   * @}
  69   */
  70
  71 /**
  72   * @}
  73   */
  74
  75
  76 /** @addtogroup PWR_Exported_Functions
  77   * @{
  78   */
  79
  80 /** @addtogroup PWR_Exported_Functions_Group1
  81   * @brief      Initialization and de-initialization functions
  82   *
  83 @verbatim
  84  ===============================================================================
  85               ##### Initialization and de-initialization functions #####
  86  ===============================================================================
  87
  88 @endverbatim
  89   * @{
  90   */
  91
  92 /**
  93   * @brief Deinitializes the HAL PWR peripheral registers to their default reset values.
  94   * @retval None
  95   */
  96 void HAL_PWR_DeInit(void)
  97 {
  98   __HAL_RCC_PWR_FORCE_RESET();
  99   __HAL_RCC_PWR_RELEASE_RESET();
 100 }
 101
 102 /**
 103   * @}
 104   */
 105
 106 /** @addtogroup PWR_Exported_Functions_Group2
 107   * @brief      Low Power modes configuration functions
 108   *
 109 @verbatim
 110
 111  ===============================================================================
 112                  ##### Peripheral Control functions #####
 113  ===============================================================================
 114
 115     *** Backup domain ***
 116     =========================
 117     [..]
 118       After reset, the backup domain (RTC registers, RTC backup data
 119       registers) is protected against possible unwanted
 120       write accesses.
 121       To enable access to the RTC Domain and RTC registers, proceed as follows:
 122         (+) Enable the Power Controller (PWR) APB1 interface clock using the
 123             __HAL_RCC_PWR_CLK_ENABLE() macro.
 124         (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
 125
 126     *** PVD configuration ***
 127     =========================
 128     [..]
 129       (+) The PVD is used to monitor the VDD power supply by comparing it to a
 130           threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
 131       (+) The PVD can use an external input analog voltage (PVD_IN) which is compared
 132       internally to VREFINT. The PVD_IN (PB7) has to be configured in Analog mode
 133       when PWR_PVDLevel_7 is selected (PLS[2:0] = 111).
 134
 135       (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
 136           than the PVD threshold. This event is internally connected to the EXTI
 137           line16 and can generate an interrupt if enabled. This is done through
 138           __HAL_PWR_PVD_EXTI_ENABLE_IT() macro.
 139       (+) The PVD is stopped in Standby mode.
 140
 141     *** WakeUp pin configuration ***
 142     ================================
 143     [..]
 144       (+) WakeUp pin is used to wake up the system from Standby mode. This pin is
 145           forced in input pull-down configuration and is active on rising edges.
 146       (+) There are two WakeUp pins:
 147           WakeUp Pin 1 on PA.00.
 148           WakeUp Pin 2 on PC.13.
 149           WakeUp Pin 3 on PE.06 .
 150
 151
 152     [..]
 153     *** Main and Backup Regulators configuration ***
 154     ================================================
 155
 156       (+) The main internal regulator can be configured to have a tradeoff between
 157           performance and power consumption when the device does not operate at
 158           the maximum frequency. This is done through __HAL_PWR_VOLTAGESCALING_CONFIG()
 159           macro which configures the two VOS bits in PWR_CR register:
 160         (++) PWR_REGULATOR_VOLTAGE_SCALE1 (VOS bits = 01), the regulator voltage output Scale 1 mode selected and
 161              the System frequency can go up to 32 MHz.
 162         (++) PWR_REGULATOR_VOLTAGE_SCALE2 (VOS bits = 10), the regulator voltage output Scale 2 mode selected and
 163              the System frequency can go up to 16 MHz.
 164         (++) PWR_REGULATOR_VOLTAGE_SCALE3 (VOS bits = 11), the regulator voltage output Scale 3 mode selected and
 165              the System frequency can go up to 4.2 MHz.
 166
 167         Refer to the datasheets for more details.
 168
 169     *** Low Power modes configuration ***
 170     =====================================
 171      [..]
 172       The device features 5 low-power modes:
 173       (+) Low power run mode: regulator in low power mode, limited clock frequency,
 174         limited number of peripherals running.
 175       (+) Sleep mode: Cortex-M0+ core stopped, peripherals kept running.
 176       (+) Low power sleep mode: Cortex-M0+ core stopped, limited clock frequency,
 177          limited number of peripherals running, regulator in low power mode.
 178       (+) Stop mode: All clocks are stopped, regulator running, regulator in low power mode.
 179       (+) Standby mode: VCORE domain powered off
 180
 181    *** Low power run mode ***
 182    =========================
 183     [..]
 184        To further reduce the consumption when the system is in Run mode, the regulator can be
 185         configured in low power mode. In this mode, the system frequency should not exceed
 186         MSI frequency range1.
 187         In Low power run mode, all I/O pins keep the same state as in Run mode.
 188
 189       (+) Entry:
 190         (++) VCORE in range2
 191         (++) Decrease the system frequency not to exceed the frequency of MSI frequency range1.
 192         (++) The regulator is forced in low power mode using the HAL_PWREx_EnableLowPowerRunMode()
 193              function.
 194       (+) Exit:
 195         (++) The regulator is forced in Main regulator mode using the HAL_PWREx_DisableLowPowerRunMode()
 196               function.
 197         (++) Increase the system frequency if needed.
 198
 199    *** Sleep mode ***
 200    ==================
 201     [..]
 202       (+) Entry:
 203           The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFx)
 204               functions with
 205           (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
 206           (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
 207
 208       (+) Exit:
 209         (++) Any peripheral interrupt acknowledged by the nested vectored interrupt
 210               controller (NVIC) can wake up the device from Sleep mode. If the WFE instruction was used to enter sleep mode,
 211               the MCU exits Sleep mode as soon as an event occurs.
 212
 213    *** Low power sleep mode ***
 214    ============================
 215     [..]
 216       (+) Entry:
 217           The Low power sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_LOWPOWERREGULATOR_ON, PWR_SLEEPENTRY_WFx)
 218               functions with
 219           (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
 220           (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
 221        (+) The Flash memory can be switched off by using the control bits (SLEEP_PD in the FLASH_ACR register.
 222              This reduces power consumption but increases the wake-up time.
 223
 224       (+) Exit:
 225         (++) If the WFI instruction was used to enter Low power sleep mode, any peripheral interrupt
 226               acknowledged by the nested vectored interrupt controller (NVIC) can wake up the device
 227               from Low power sleep mode. If the WFE instruction was used to enter Low power sleep mode,
 228               the MCU exits Sleep mode as soon as an event occurs.
 229
 230    *** Stop mode ***
 231    =================
 232     [..]
 233       The Stop mode is based on the Cortex-M0+ deepsleep mode combined with peripheral
 234       clock gating. The voltage regulator can be configured either in normal or low-power mode.
 235       In Stop mode, all clocks in the VCORE domain are stopped, the PLL, the MSI, the HSI and
 236       the HSE RC oscillators are disabled. Internal SRAM and register contents are preserved.
 237       To get the lowest consumption in Stop mode, the internal Flash memory also enters low
 238       power mode. When the Flash memory is in power-down mode, an additional startup delay is
 239       incurred when waking up from Stop mode.
 240       To minimize the consumption In Stop mode, VREFINT, the BOR, PVD, and temperature
 241       sensor can be switched off before entering Stop mode. They can be switched on again by
 242       software after exiting Stop mode using the ULP bit in the PWR_CR register.
 243       In Stop mode, all I/O pins keep the same state as in Run mode.
 244
 245       (+) Entry:
 246            The Stop mode is entered using the HAL_PWR_EnterSTOPMode
 247              function with:
 248           (++) Main regulator ON.
 249           (++) Low Power regulator ON.
 250           (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
 251           (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
 252       (+) Exit:
 253         (++) By issuing an interrupt or a wakeup event, the MSI or HSI16 RC
 254              oscillator is selected as system clock depending the bit STOPWUCK in the RCC_CFGR
 255              register
 256
 257    *** Standby mode ***
 258    ====================
 259      [..]
 260       The Standby mode allows to achieve the lowest power consumption. It is based on the
 261       Cortex-M0+ deepsleep mode, with the voltage regulator disabled. The VCORE domain is
 262       consequently powered off. The PLL, the MSI, the HSI oscillator and the HSE oscillator are
 263       also switched off. SRAM and register contents are lost except for the RTC registers, RTC
 264       backup registers and Standby circuitry.
 265
 266       To minimize the consumption In Standby mode, VREFINT, the BOR, PVD, and temperature
 267        sensor can be switched off before entering the Standby mode. They can be switched
 268        on again by software after exiting the Standby mode.
 269        function.
 270
 271       (+) Entry:
 272         (++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function.
 273       (+) Exit:
 274         (++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup,
 275              tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
 276
 277    *** Auto-wakeup (AWU) from low-power mode ***
 278    =============================================
 279     [..]
 280       The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
 281       Wakeup event, a tamper event, a time-stamp event, or a comparator event,
 282       without depending on an external interrupt (Auto-wakeup mode).
 283
 284     (+) RTC auto-wakeup (AWU) from the Stop mode
 285         (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to:
 286              (+++) Configure the EXTI Line 17 to be sensitive to rising edges (Interrupt
 287                    or Event modes) using the EXTI_Init() function.
 288              (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function
 289              (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm()
 290                    and RTC_AlarmCmd() functions.
 291         (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
 292              is necessary to:
 293              (+++) Configure the EXTI Line 19 to be sensitive to rising edges (Interrupt
 294                    or Event modes) using the EXTI_Init() function.
 295              (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig()
 296                    function.
 297              (+++) Configure the RTC to detect the tamper or time stamp event using the
 298                    RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
 299                    functions.
 300         (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to:
 301              (+++) Configure the EXTI Line 20 to be sensitive to rising edges (Interrupt
 302                    or Event modes) using the EXTI_Init() function.
 303              (+++) Enable the RTC WakeUp Interrupt using the RTC_ITConfig() function.
 304              (+++) Configure the RTC to generate the RTC WakeUp event using the RTC_WakeUpClockConfig(),
 305                    RTC_SetWakeUpCounter() and RTC_WakeUpCmd() functions.
 306
 307     (+) RTC auto-wakeup (AWU) from the Standby mode
 308         (++) To wake up from the Standby mode with an RTC alarm event, it is necessary to:
 309              (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function.
 310              (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm()
 311                    and RTC_AlarmCmd() functions.
 312         (++) To wake up from the Standby mode with an RTC Tamper or time stamp event, it
 313              is necessary to:
 314              (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig()
 315                    function.
 316              (+++) Configure the RTC to detect the tamper or time stamp event using the
 317                    RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
 318                    functions.
 319         (++) To wake up from the Standby mode with an RTC WakeUp event, it is necessary to:
 320              (+++) Enable the RTC WakeUp Interrupt using the RTC_ITConfig() function
 321              (+++) Configure the RTC to generate the RTC WakeUp event using the RTC_WakeUpClockConfig(),
 322                    RTC_SetWakeUpCounter() and RTC_WakeUpCmd() functions.
 323
 324     (+) Comparator auto-wakeup (AWU) from the Stop mode
 325         (++) To wake up from the Stop mode with an comparator 1 or comparator 2 wakeup
 326              event, it is necessary to:
 327              (+++) Configure the EXTI Line 21 for comparator 1 or EXTI Line 22 for comparator 2
 328                    to be sensitive to to the selected edges (falling, rising or falling
 329                    and rising) (Interrupt or Event modes) using the EXTI_Init() function.
 330              (+++) Configure the comparator to generate the event.
 331 @endverbatim
 332   * @{
 333   */
 334
 335 /**
 336   * @brief Enables access to the backup domain (RTC registers, RTC
 337   *         backup data registers ).
 338   * @note   If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the
 339   *         Backup Domain Access should be kept enabled.
 340   * @retval None
 341   */
 342 void HAL_PWR_EnableBkUpAccess(void)
 343 {
 344   /* Enable access to RTC and backup registers */
 345   SET_BIT(PWR->CR, PWR_CR_DBP);
 346 }
 347
 348 /**
 349   * @brief  Disables access to the backup domain
 350   * @note   Applies to RTC registers, RTC backup data registers.
 351   * @note   If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the
 352   *         Backup Domain Access should be kept enabled.
 353   * @retval None
 354   */
 355 void HAL_PWR_DisableBkUpAccess(void)
 356 {
 357   /* Disable access to RTC and backup registers */
 358   CLEAR_BIT(PWR->CR, PWR_CR_DBP);
 359 }
 360
 361 /**
 362   * @brief  Configures the voltage threshold detected by the Power Voltage Detector(PVD).
 363   * @param  sConfigPVD: pointer to an PWR_PVDTypeDef structure that contains the configuration
 364   *         information for the PVD.
 365   * @note   Refer to the electrical characteristics of your device datasheet for
 366   *         more details about the voltage threshold corresponding to each
 367   *         detection level.
 368   * @retval None
 369   */
 370 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
 371 {
 372   /* Check the parameters */
 373   assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
 374   assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
 375
 376   /* Set PLS[7:5] bits according to PVDLevel value */
 377   MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel);
 378
 379   /* Clear any previous config. Keep it clear if no event or IT mode is selected */
 380   __HAL_PWR_PVD_EXTI_DISABLE_EVENT();
 381   __HAL_PWR_PVD_EXTI_DISABLE_IT();
 382   __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
 383   __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();
 384
 385   /* Configure interrupt mode */
 386   if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
 387   {
 388     __HAL_PWR_PVD_EXTI_ENABLE_IT();
 389   }
 390
 391   /* Configure event mode */
 392   if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
 393   {
 394     __HAL_PWR_PVD_EXTI_ENABLE_EVENT();
 395   }
 396
 397   /* Configure the edge */
 398   if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
 399   {
 400     __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
 401   }
 402
 403   if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
 404   {
 405     __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
 406   }
 407 }
 408
 409 /**
 410   * @brief Enables the Power Voltage Detector(PVD).
 411   * @retval None
 412   */
 413 void HAL_PWR_EnablePVD(void)
 414 {
 415   /* Enable the power voltage detector */
 416   SET_BIT(PWR->CR, PWR_CR_PVDE);
 417 }
 418
 419 /**
 420   * @brief Disables the Power Voltage Detector(PVD).
 421   * @retval None
 422   */
 423 void HAL_PWR_DisablePVD(void)
 424 {
 425   /* Disable the power voltage detector */
 426   CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
 427 }
 428
 429 /**
 430   * @brief Enables the WakeUp PINx functionality.
 431   * @param WakeUpPinx: Specifies the Power Wake-Up pin to enable.
 432   *         This parameter can be one of the following values:
 433   *           @arg PWR_WAKEUP_PIN1
 434   *           @arg PWR_WAKEUP_PIN2
 435   *           @arg PWR_WAKEUP_PIN3 for stm32l07xxx and stm32l08xxx devices only.
 436   * @retval None
 437   */
 438 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)
 439 {
 440   /* Check the parameter */
 441   assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
 442   /* Enable the EWUPx pin */
 443   SET_BIT(PWR->CSR, WakeUpPinx);
 444 }
 445
 446 /**
 447   * @brief Disables the WakeUp PINx functionality.
 448   * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable.
 449   *         This parameter can be one of the following values:
 450   *           @arg PWR_WAKEUP_PIN1
 451   *           @arg PWR_WAKEUP_PIN2
 452   *           @arg PWR_WAKEUP_PIN3  for stm32l07xxx and stm32l08xxx devices only.
 453   * @retval None
 454   */
 455 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
 456 {
 457   /* Check the parameter */
 458   assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
 459   /* Disable the EWUPx pin */
 460   CLEAR_BIT(PWR->CSR, WakeUpPinx);
 461 }
 462
 463 /**
 464   * @brief Enters Sleep mode.
 465   * @note In Sleep mode, all I/O pins keep the same state as in Run mode.
 466   * @param Regulator: Specifies the regulator state in SLEEP mode.
 467   *          This parameter can be one of the following values:
 468   *            @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON
 469   *            @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON
 470   * @param SLEEPEntry: Specifies if SLEEP mode is entered with WFI or WFE instruction.
 471   *           When WFI entry is used, tick interrupt have to be disabled if not desired as
 472   *           the interrupt wake up source.
 473   *           This parameter can be one of the following values:
 474   *            @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
 475   *            @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
 476   * @retval None
 477   */
 478 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
 479 {
 480    uint32_t tmpreg = 0;
 481   /* Check the parameters */
 482   assert_param(IS_PWR_REGULATOR(Regulator));
 483   assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
 484
 485   /* Select the regulator state in Sleep mode ---------------------------------*/
 486   tmpreg = PWR->CR;
 487
 488   /* Clear PDDS and LPDS bits */
 489   CLEAR_BIT(tmpreg, (PWR_CR_PDDS | PWR_CR_LPSDSR));
 490
 491  /* Set LPSDSR bit according to PWR_Regulator value */
 492   SET_BIT(tmpreg, Regulator);
 493
 494   /* Store the new value */
 495   PWR->CR = tmpreg;
 496
 497   /* Clear SLEEPDEEP bit of Cortex System Control Register */
 498   CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
 499
 500   /* Select SLEEP mode entry -------------------------------------------------*/
 501   if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
 502   {
 503     /* Request Wait For Interrupt */
 504     __WFI();
 505   }
 506   else
 507   {
 508     /* Request Wait For Event */
 509     __SEV();
 510     __WFE();
 511     __WFE();
 512   }
 513 }
 514
 515 /**
 516   * @brief Enters Stop mode.
 517   * @note In Stop mode, all I/O pins keep the same state as in Run mode.
 518   * @note When exiting Stop mode by issuing an interrupt or a wakeup event,
 519   *        MSI or HSI16 RCoscillator is selected as system clock depending
 520   *        the bit STOPWUCK in the RCC_CFGR register.
 521   * @note When the voltage regulator operates in low power mode, an additional
 522   *         startup delay is incurred when waking up from Stop mode.
 523   *         By keeping the internal regulator ON during Stop mode, the consumption
 524   *         is higher although the startup time is reduced.
 525   * @param Regulator: Specifies the regulator state in Stop mode.
 526   *          This parameter can be one of the following values:
 527   *            @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON
 528   *            @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON
 529   * @param STOPEntry: Specifies if Stop mode in entered with WFI or WFE instruction.
 530   *          This parameter can be one of the following values:
 531   *            @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction
 532   *            @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction
 533   * @retval None
 534   */
 535 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
 536 {
 537   uint32_t tmpreg = 0;
 538
 539   /* Check the parameters */
 540   assert_param(IS_PWR_REGULATOR(Regulator));
 541   assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
 542
 543   /* Select the regulator state in Stop mode ---------------------------------*/
 544   tmpreg = PWR->CR;
 545
 546   /* Clear PDDS and LPDS bits */
 547   CLEAR_BIT(tmpreg, (PWR_CR_PDDS | PWR_CR_LPSDSR));
 548
 549  /* Set LPSDSR bit according to PWR_Regulator value */
 550   SET_BIT(tmpreg, Regulator);
 551
 552   /* Store the new value */
 553   PWR->CR = tmpreg;
 554
 555   /* Set SLEEPDEEP bit of Cortex System Control Register */
 556   SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
 557
 558   /* Select Stop mode entry --------------------------------------------------*/
 559   if(STOPEntry == PWR_STOPENTRY_WFI)
 560   {
 561     /* Request Wait For Interrupt */
 562     __WFI();
 563   }
 564   else
 565   {
 566     /* Request Wait For Event */
 567     __SEV();
 568     __WFE();
 569     __WFE();
 570   }
 571
 572   /* Reset SLEEPDEEP bit of Cortex System Control Register */
 573   CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
 574
 575 }
 576
 577 /**
 578   * @brief Enters Standby mode.
 579   * @note In Standby mode, all I/O pins are high impedance except for:
 580   *          - Reset pad (still available)
 581   *          - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC
 582   *            Alarm out, or RTC clock calibration out.
 583   *          - RTC_AF2 pin (PC13) if configured for tamper.
 584   *          - WKUP pin 1 (PA00) if enabled.
 585   *          - WKUP pin 2 (PC13) if enabled.
 586   *          - WKUP pin 3 (PE06) if enabled, for stm32l07xxx and stm32l08xxx devices only.
 587   *          - WKUP pin 3 (PA02) if enabled, for stm32l031xx devices only.
 588   * @retval None
 589   */
 590 void HAL_PWR_EnterSTANDBYMode(void)
 591 {
 592   /* Select Standby mode */
 593   SET_BIT(PWR->CR, PWR_CR_PDDS);
 594
 595   /* Set SLEEPDEEP bit of Cortex System Control Register */
 596   SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
 597
 598   /* This option is used to ensure that store operations are completed */
 599 #if defined ( __CC_ARM)
 600   __force_stores();
 601 #endif
 602   /* Request Wait For Interrupt */
 603   __WFI();
 604 }
 605
 606 /**
 607   * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode.
 608   * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor
 609   *       re-enters SLEEP mode when an interruption handling is over.
 610   *       Setting this bit is useful when the processor is expected to run only on
 611   *       interruptions handling.
 612   * @retval None
 613   */
 614 void HAL_PWR_EnableSleepOnExit(void)
 615 {
 616   /* Set SLEEPONEXIT bit of Cortex System Control Register */
 617   SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
 618 }
 619
 620
 621 /**
 622   * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode.
 623   * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor
 624   *       re-enters SLEEP mode when an interruption handling is over.
 625   * @retval None
 626   */
 627 void HAL_PWR_DisableSleepOnExit(void)
 628 {
 629   /* Clear SLEEPONEXIT bit of Cortex System Control Register */
 630   CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
 631 }
 632
 633
 634 /**
 635   * @brief Enables CORTEX M0+ SEVONPEND bit.
 636   * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes
 637   *       WFE to wake up when an interrupt moves from inactive to pended.
 638   * @retval None
 639   */
 640 void HAL_PWR_EnableSEVOnPend(void)
 641 {
 642   /* Set SEVONPEND bit of Cortex System Control Register */
 643   SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
 644 }
 645
 646
 647 /**
 648   * @brief Disables CORTEX M0+ SEVONPEND bit.
 649   * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes
 650   *       WFE to wake up when an interrupt moves from inactive to pended.
 651   * @retval None
 652   */
 653 void HAL_PWR_DisableSEVOnPend(void)
 654 {
 655   /* Clear SEVONPEND bit of Cortex System Control Register */
 656   CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
 657 }
 658
 659 /**
 660   * @brief This function handles the PWR PVD interrupt request.
 661   * @note This API should be called under the PVD_IRQHandler().
 662   * @retval None
 663   */
 664 void HAL_PWR_PVD_IRQHandler(void)
 665 {
 666   /* Check PWR exti flag */
 667   if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET)
 668   {
 669     /* PWR PVD interrupt user callback */
 670     HAL_PWR_PVDCallback();
 671
 672     /* Clear PWR Exti pending bit */
 673     __HAL_PWR_PVD_EXTI_CLEAR_FLAG();
 674   }
 675 }
 676
 677 /**
 678   * @brief  PWR PVD interrupt callback
 679   * @retval None
 680   */
 681 __weak void HAL_PWR_PVDCallback(void)
 682 {
 683   /* NOTE : This function Should not be modified, when the callback is needed,
 684             the HAL_PWR_PVDCallback could be implemented in the user file
 685    */
 686 }
 687
 688 /**
 689   * @}
 690   */
 691
 692 /**
 693   * @}
 694   */
 695
 696 #endif /* HAL_PWR_MODULE_ENABLED */
 697 /**
 698   * @}
 699   */
 700
 701 /**
 702   * @}
 703   */
 704
 705 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 706