tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_pwr.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32l0xx_hal_pwr.h
   4   * @author  MCD Application Team
   5   * @version V1.2.0
   6   * @date    06-February-2015
   7   * @brief   Header file of PWR HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32L0xx_HAL_PWR_H
  40 #define __STM32L0xx_HAL_PWR_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 /* Includes ------------------------------------------------------------------*/
  47 #include "stm32l0xx_hal_def.h"
  48
  49 /** @addtogroup STM32L0xx_HAL_Driver
  50   * @{
  51   */
  52
  53 /** @defgroup PWR
  54   * @{
  55   */
  56
  57 /** @defgroup PWR_Exported_Types PWR Exported Types
  58   * @{
  59   */
  60
  61 /**
  62   * @brief  PWR PVD configuration structure definition
  63   */
  64 typedef struct
  65 {
  66   uint32_t PVDLevel;   /*!< PVDLevel: Specifies the PVD detection level.
  67                             This parameter can be a value of @ref PWR_PVD_detection_level */
  68
  69   uint32_t Mode;       /*!< Mode: Specifies the operating mode for the selected pins.
  70                             This parameter can be a value of @ref PWR_PVD_Mode */
  71 }PWR_PVDTypeDef;
  72
  73 /**
  74   * @}
  75   */
  76
  77 /** @defgroup PWR_Private_Defines PWR Private Defines
  78   * @{
  79   */
  80
  81 #define PWR_EXTI_LINE_PVD      EXTI_FTSR_TR16  /*!< External interrupt line 16 Connected to the PVD EXTI Line */
  82
  83 /**
  84   * @}
  85   */
  86
  87 /** @defgroup PWR_Exported_Constants PWR Exported Constants
  88   * @{
  89   */
  90
  91 /** @defgroup PWR_register_alias_address PWR Register alias address
  92   * @{
  93   */
  94 #define PWR_WAKEUP_PIN1                PWR_CSR_EWUP1
  95 #define PWR_WAKEUP_PIN2                PWR_CSR_EWUP2
  96 #if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
  97 #define PWR_WAKEUP_PIN3                PWR_CSR_EWUP3
  98 #endif
  99 /**
 100   * @}
 101   */
 102
 103 /** @defgroup PWR_PVD_detection_level PVD detection level
 104   * @{
 105   */
 106 #define PWR_PVDLEVEL_0                 PWR_CR_PLS_LEV0
 107 #define PWR_PVDLEVEL_1                 PWR_CR_PLS_LEV1
 108 #define PWR_PVDLEVEL_2                 PWR_CR_PLS_LEV2
 109 #define PWR_PVDLEVEL_3                 PWR_CR_PLS_LEV3
 110 #define PWR_PVDLEVEL_4                 PWR_CR_PLS_LEV4
 111 #define PWR_PVDLEVEL_5                 PWR_CR_PLS_LEV5
 112 #define PWR_PVDLEVEL_6                 PWR_CR_PLS_LEV6
 113 #define PWR_PVDLEVEL_7                 PWR_CR_PLS_LEV7  /* External input analog voltage
 114                                                            (Compare internally to VREFINT) */
 115 /**
 116   * @}
 117   */
 118
 119 /** @defgroup PWR_PVD_Mode PWR PVD Mode
 120   * @{
 121   */
 122 #define PWR_PVD_MODE_NORMAL                 ((uint32_t)0x00000000)   /*!< basic mode is used */
 123 #define PWR_PVD_MODE_IT_RISING              ((uint32_t)0x00010001)   /*!< External Interrupt Mode with Rising edge trigger detection */
 124 #define PWR_PVD_MODE_IT_FALLING             ((uint32_t)0x00010002)   /*!< External Interrupt Mode with Falling edge trigger detection */
 125 #define PWR_PVD_MODE_IT_RISING_FALLING      ((uint32_t)0x00010003)   /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
 126 #define PWR_PVD_MODE_EVENT_RISING           ((uint32_t)0x00020001)   /*!< Event Mode with Rising edge trigger detection */
 127 #define PWR_PVD_MODE_EVENT_FALLING          ((uint32_t)0x00020002)   /*!< Event Mode with Falling edge trigger detection */
 128 #define PWR_PVD_MODE_EVENT_RISING_FALLING   ((uint32_t)0x00020003)   /*!< Event Mode with Rising/Falling edge trigger detection */
 129
 130 /**
 131   * @}
 132   */
 133
 134 /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR Regulator state in SLEEP/STOP mode
 135   * @{
 136   */
 137 #define PWR_MAINREGULATOR_ON           ((uint32_t)0x00000000)
 138 #define PWR_LOWPOWERREGULATOR_ON       PWR_CR_LPSDSR
 139
 140 /**
 141   * @}
 142   */
 143
 144 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
 145   * @{
 146   */
 147 #define PWR_SLEEPENTRY_WFI             ((uint8_t)0x01)
 148 #define PWR_SLEEPENTRY_WFE             ((uint8_t)0x02)
 149 /**
 150   * @}
 151   */
 152
 153 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
 154   * @{
 155   */
 156 #define PWR_STOPENTRY_WFI              ((uint8_t)0x01)
 157 #define PWR_STOPENTRY_WFE              ((uint8_t)0x02)
 158 /**
 159   * @}
 160   */
 161
 162 /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale
 163   * @{
 164   */
 165
 166 #define PWR_REGULATOR_VOLTAGE_SCALE1   PWR_CR_VOS_0
 167 #define PWR_REGULATOR_VOLTAGE_SCALE2   PWR_CR_VOS_1
 168 #define PWR_REGULATOR_VOLTAGE_SCALE3   PWR_CR_VOS
 169
 170 #define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
 171                                              ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
 172                                              ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
 173 /**
 174   * @}
 175   */
 176
 177 /** @defgroup PWR_Flag PWR Flag
 178   * @{
 179   */
 180 #define PWR_FLAG_WU                    PWR_CSR_WUF
 181 #define PWR_FLAG_SB                    PWR_CSR_SBF
 182 #define PWR_FLAG_PVDO                  PWR_CSR_PVDO
 183 #define PWR_FLAG_VREFINTRDY            PWR_CSR_VREFINTRDYF
 184 #define PWR_FLAG_VOS                   PWR_CSR_VOSF
 185 #define PWR_FLAG_REGLP                 PWR_CSR_REGLPF
 186
 187 #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
 188                                ((FLAG) == PWR_FLAG_PVDO) || ((FLAG) == PWR_FLAG_VREFINTRDY) || \
 189                                ((FLAG) == PWR_FLAG_VOS) || ((FLAG) == PWR_FLAG_REGLP))
 190 /**
 191   * @}
 192   */
 193
 194 /**
 195   * @}
 196   */
 197
 198 /** @defgroup PWR_Exported_Macro PWR Exported Macro
 199   * @{
 200   */
 201 /** @brief  macros configure the main internal regulator output voltage.
 202   * @param  __REGULATOR__: specifies the regulator output voltage to achieve
 203   *         a tradeoff between performance and power consumption when the device does
 204   *         not operate at the maximum frequency (refer to the datasheets for more details).
 205   *          This parameter can be one of the following values:
 206   *            @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode,
 207   *                                                System frequency up to 32 MHz.
 208   *            @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode,
 209   *                                                System frequency up to 16 MHz.
 210   *            @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode,
 211   *                                                System frequency up to 4.2 MHz
 212   * @retval None
 213   */
 214 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)))
 215
 216 /** @brief  Check PWR flag is set or not.
 217   * @param  __FLAG__: specifies the flag to check.
 218   *           This parameter can be one of the following values:
 219   *            @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
 220   *                  was received from the WKUP pin or from the RTC alarm (Alarm B),
 221   *                  RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
 222   *                  An additional wakeup event is detected if the WKUP pin is enabled
 223   *                  (by setting the EWUP bit) when the WKUP pin level is already high.
 224   *            @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
 225   *                  resumed from StandBy mode.
 226   *            @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
 227   *                  by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode.
 228   *                  For this reason, this bit is equal to 0 after Standby or reset
 229   *                  until the PVDE bit is set.
 230   *            @arg PWR_FLAG_VREFINTRDY: Internal voltage reference (VREFINT) ready flag.
 231   *                 This bit indicates the state of the internal voltage reference, VREFINT.
 232   *            @arg PWR_FLAG_VOS: Voltage Scaling select flag. A delay is required for
 233   *                 the internal regulator to be ready after the voltage range is changed.
 234   *                 The VOSF bit indicates that the regulator has reached the voltage level
 235   *                 defined with bits VOS of PWR_CR register.
 236   *            @arg PWR_FLAG_REGLP: Regulator LP flag. When the MCU exits from Low power run
 237   *                 mode, this bit stays at 1 until the regulator is ready in main mode.
 238   *                 A polling on this bit is recommended to wait for the regulator main mode.
 239   *                 This bit is reset by hardware when the regulator is ready.
 240   * @retval The new state of __FLAG__ (TRUE or FALSE).
 241   */
 242 #define __HAL_PWR_GET_FLAG(__FLAG__)                  ((PWR->CSR & (__FLAG__)) == (__FLAG__))
 243
 244 /** @brief  Clear the PWR's pending flags.
 245   * @param  __FLAG__: specifies the flag to clear.
 246   *          This parameter can be one of the following values:
 247   *            @arg PWR_FLAG_WU: Wake Up flag
 248   *            @arg PWR_FLAG_SB: StandBy flag
 249   */
 250 #define __HAL_PWR_CLEAR_FLAG(__FLAG__)                SET_BIT(PWR->CR, (__FLAG__) << 2)
 251
 252 /**
 253   * @brief Enable interrupt on PVD Exti Line 16.
 254   * @retval None.
 255   */
 256 #define __HAL_PWR_PVD_EXTI_ENABLE_IT()      SET_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
 257
 258 /**
 259   * @brief Disable interrupt on PVD Exti Line 16.
 260   * @retval None.
 261   */
 262 #define __HAL_PWR_PVD_EXTI_DISABLE_IT()     CLEAR_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
 263
 264 /**
 265   * @brief Enable event on PVD Exti Line 16.
 266   * @retval None.
 267   */
 268 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT()   SET_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
 269
 270 /**
 271   * @brief Disable event on PVD Exti Line 16.
 272   * @retval None.
 273   */
 274 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT()  CLEAR_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
 275
 276
 277 /**
 278   * @brief  PVD EXTI line configuration: set falling edge trigger.
 279   * @retval None.
 280   */
 281 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE()  SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
 282
 283
 284 /**
 285   * @brief Disable the PVD Extended Interrupt Falling Trigger.
 286   * @retval None.
 287   */
 288 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE()  CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
 289
 290
 291 /**
 292   * @brief  PVD EXTI line configuration: set rising edge trigger.
 293   * @retval None.
 294   */
 295 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE()   SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
 296
 297 /**
 298   * @brief Disable the PVD Extended Interrupt Rising Trigger.
 299   * This parameter can be:
 300   * @retval None.
 301   */
 302 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE()  CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
 303
 304 /**
 305   * @brief  PVD EXTI line configuration: set rising & falling edge trigger.
 306   * @retval None.
 307   */
 308 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE()   __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
 309
 310 /**
 311   * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
 312   * This parameter can be:
 313   * @retval None.
 314   */
 315 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE()  __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE()();
 316
 317
 318
 319 /**
 320   * @brief Check whether the specified PVD EXTI interrupt flag is set or not.
 321   * @retval EXTI PVD Line Status.
 322   */
 323 #define __HAL_PWR_PVD_EXTI_GET_FLAG()       (EXTI->PR & (PWR_EXTI_LINE_PVD))
 324
 325 /**
 326   * @brief Clear the PVD EXTI flag.
 327   * @retval None.
 328   */
 329 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG()     (EXTI->PR = (PWR_EXTI_LINE_PVD))
 330
 331 /**
 332   * @brief Generate a Software interrupt on selected EXTI line.
 333   * @retval None.
 334   */
 335 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT()  SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD)
 336 /**
 337   * @}
 338   */
 339
 340 /**
 341   * @brief Generate a Software interrupt on selected EXTI line.
 342   * @retval None.
 343   */
 344 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT()            SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD)
 345
 346 /**
 347   * @}
 348   */
 349
 350 /** @defgroup PWR_Private_Macros PWR Private Macros
 351   * @{
 352   */
 353 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
 354                                  ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
 355                                  ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
 356                                  ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
 357
 358 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
 359                               ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
 360                               ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
 361                               ((MODE) == PWR_PVD_MODE_NORMAL))
 362
 363 #if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
 364 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
 365                                 ((PIN) == PWR_WAKEUP_PIN2) || \
 366                                 ((PIN) == PWR_WAKEUP_PIN3))
 367 #else
 368 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
 369                                 ((PIN) == PWR_WAKEUP_PIN2))
 370 #endif
 371
 372 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
 373                                      ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
 374 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
 375
 376 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
 377
 378 /**
 379   * @}
 380   */
 381
 382 /* Include PWR HAL Extension module */
 383 #include "stm32l0xx_hal_pwr_ex.h"
 384
 385 /** @defgroup PWR_Exported_Functions PWR Exported Functions
 386   * @{
 387   */
 388
 389 /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
 390   * @{
 391   */
 392 void HAL_PWR_DeInit(void);
 393 void HAL_PWR_EnableBkUpAccess(void);
 394 void HAL_PWR_DisableBkUpAccess(void);
 395 /**
 396   * @}
 397   */
 398
 399 /** @defgroup PWR_Exported_Functions_Group2 Low Power modes configuration functions
 400   * @{
 401   */
 402
 403 /* PVD control functions  ************************************************/
 404 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
 405 void HAL_PWR_EnablePVD(void);
 406 void HAL_PWR_DisablePVD(void);
 407 void HAL_PWR_PVD_IRQHandler(void);
 408 void HAL_PWR_PVDCallback(void);
 409
 410 /* WakeUp pins configuration functions ****************************************/
 411 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
 412 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
 413
 414 /* Low Power modes configuration functions ************************************/
 415 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
 416 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
 417 void HAL_PWR_EnterSTANDBYMode(void);
 418
 419 void HAL_PWR_EnableSleepOnExit(void);
 420 void HAL_PWR_DisableSleepOnExit(void);
 421 void HAL_PWR_EnableSEVOnPend(void);
 422 void HAL_PWR_DisableSEVOnPend(void);
 423
 424 /**
 425   * @}
 426   */
 427
 428 /**
 429   * @}
 430   */
 431
 432 /**
 433   * @}
 434   */
 435
 436 /**
 437   * @}
 438   */
 439
 440 #ifdef __cplusplus
 441 }
 442 #endif
 443
 444
 445 #endif /* __STM32L0xx_HAL_PWR_H */
 446
 447 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 448