tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_pwr_ex.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32l0xx_hal_pwr_ex.c
   4   * @author  MCD Application Team
   5   * @version V1.2.0
   6   * @date    06-February-2015
   7   * @brief   Extended PWR HAL module driver.
   8   *          This file provides firmware functions to manage the following
   9   *          functionalities of the Power Controller (PWR) peripheral:
  10   *           + Extended Initialization and de-initialization functions
  11   *           + Extended Peripheral Control functions
  12   *
  13   ******************************************************************************
  14   * @attention
  15   *
  16   * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
  17   *
  18   * Redistribution and use in source and binary forms, with or without modification,
  19   * are permitted provided that the following conditions are met:
  20   *   1. Redistributions of source code must retain the above copyright notice,
  21   *      this list of conditions and the following disclaimer.
  22   *   2. Redistributions in binary form must reproduce the above copyright notice,
  23   *      this list of conditions and the following disclaimer in the documentation
  24   *      and/or other materials provided with the distribution.
  25   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  26   *      may be used to endorse or promote products derived from this software
  27   *      without specific prior written permission.
  28   *
  29   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  30   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  31   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  32   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  33   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  34   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  35   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  36   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  37   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  38   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39   *
  40   ******************************************************************************
  41   */
  42
  43 /* Includes ------------------------------------------------------------------*/
  44 #include "stm32l0xx_hal.h"
  45
  46 #ifdef HAL_PWR_MODULE_ENABLED
  47 /** @addtogroup STM32L0xx_HAL_Driver
  48   * @{
  49   */
  50
  51 /** @addtogroup PWREx
  52   * @{
  53   */
  54
  55 /** @defgroup PWR_Extended_TimeOut_Value PWR Extended Flag Setting Time Out Value
  56   * @{
  57   */
  58 #define PWR_FLAG_SETTING_DELAY_US   50
  59 /**
  60   * @}
  61   */
  62
  63
  64 /** @addtogroup PWREx_Exported_Functions
  65   * @brief      Low Power modes configuration functions
  66   *
  67 @verbatim
  68
  69  ===============================================================================
  70                  ##### Peripheral extended features functions #####
  71  ===============================================================================
  72 @endverbatim
  73   * @{
  74   */
  75
  76 /**
  77   * @brief  Enables the Fast WakeUp from Ultra Low Power mode.
  78   * @note This bit works in conjunction with ULP bit.
  79   *        Means, when ULP = 1 and FWU = 1 :VREFINT startup time is ignored when
  80   *        exiting from low power mode.
  81   * @retval None
  82   */
  83 void HAL_PWREx_EnableFastWakeUp(void)
  84 {
  85   /* Enable the fast wake up */
  86   SET_BIT(PWR->CR, PWR_CR_FWU);
  87 }
  88
  89 /**
  90   * @brief  Disables the Fast WakeUp from Ultra Low Power mode.
  91   * @retval None
  92   */
  93 void HAL_PWREx_DisableFastWakeUp(void)
  94 {
  95   /* Disable the fast wake up */
  96   CLEAR_BIT(PWR->CR, PWR_CR_FWU);
  97 }
  98
  99 /**
 100   * @brief  Enables the Ultra Low Power mode
 101   * @retval None
 102   */
 103 void HAL_PWREx_EnableUltraLowPower(void)
 104 {
 105   /* Enable the Ultra Low Power mode */
 106   SET_BIT(PWR->CR, PWR_CR_ULP);
 107 }
 108
 109 /**
 110   * @brief  Disables the Ultra Low Power mode
 111   * @retval None
 112   */
 113 void HAL_PWREx_DisableUltraLowPower(void)
 114 {
 115   /* Disable the Ultra Low Power mode */
 116   CLEAR_BIT(PWR->CR, PWR_CR_ULP);
 117 }
 118
 119 /**
 120   * @brief  Enable the Low Power Run mode.
 121   * @note   Low power run mode can only be entered when VCORE is in range 2.
 122   *         In addition, the dynamic voltage scaling must not be used when Low
 123   *         power run mode is selected. Only Stop and Sleep modes with regulator
 124   *         configured in Low power mode is allowed when Low power run mode is
 125   *         selected.
 126   * @note   The frequency of the system clock must be decreased to not exceed the
 127   *         frequency of RCC_MSIRANGE_1.
 128   * @note   In Low power run mode, all I/O pins keep the same state as in Run mode.
 129   * @retval None
 130   */
 131 void HAL_PWREx_EnableLowPowerRunMode(void)
 132 {
 133   /* Enters the Low Power Run mode */
 134   SET_BIT(PWR->CR, PWR_CR_LPSDSR);
 135   SET_BIT(PWR->CR, PWR_CR_LPRUN);
 136 }
 137
 138 /**
 139   * @brief  Disable the Low Power Run mode.
 140   * @note  Before HAL_PWREx_DisableLowPowerRunMode() completion, the function checks that
 141   *        REGLPF has been properly reset (otherwise, HAL_PWREx_DisableLowPowerRunMode
 142   *        returns HAL_TIMEOUT status). The system clock frequency can then be
 143   *        increased above 2 MHz.
 144   * @retval HAL_StatusTypeDef
 145   */
 146 HAL_StatusTypeDef HAL_PWREx_DisableLowPowerRunMode(void)
 147 {
 148   uint32_t wait_loop_index = 0;
 149
 150   /* Exit the Low Power Run mode */
 151   CLEAR_BIT(PWR->CR, PWR_CR_LPRUN);
 152   CLEAR_BIT(PWR->CR, PWR_CR_LPSDSR);
 153
 154   /* Wait until REGLPF is reset */
 155   wait_loop_index = (PWR_FLAG_SETTING_DELAY_US * (SystemCoreClock / 1000000));
 156
 157   while ((wait_loop_index != 0) && (HAL_IS_BIT_SET(PWR->CSR, PWR_CSR_REGLPF)))
 158   {
 159     wait_loop_index--;
 160   }
 161
 162   if (HAL_IS_BIT_SET(PWR->CSR, PWR_CSR_REGLPF))
 163   {
 164     return HAL_TIMEOUT;
 165   }
 166
 167   return HAL_OK;
 168 }
 169
 170 /**
 171   * @}
 172   */
 173
 174 /**
 175   * @}
 176   */
 177
 178 /**
 179   * @}
 180   */
 181 #endif /* HAL_PWR_MODULE_ENABLED */
 182
 183 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 184