2 ******************************************************************************
3 * @file startup_stm32l152xe.s
4 * @author MCD Application Team
6 * @date 5-September-2014
7 * @brief STM32L152XE Devices vector table for
9 * This module performs:
10 * - Set the initial SP
11 * - Set the initial PC == Reset_Handler,
12 * - Set the vector table entries with the exceptions ISR address
13 * - Configure the clock system
14 * - Branches to main in the C library (which eventually
16 * After Reset the Cortex-M3 processor is in Thread mode,
17 * priority is Privileged, and the Stack is set to Main.
18 ******************************************************************************
20 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
22 * Redistribution and use in source and binary forms, with or without modification,
23 * are permitted provided that the following conditions are met:
24 * 1. Redistributions of source code must retain the above copyright notice,
25 * this list of conditions and the following disclaimer.
26 * 2. Redistributions in binary form must reproduce the above copyright notice,
27 * this list of conditions and the following disclaimer in the documentation
28 * and/or other materials provided with the distribution.
29 * 3. Neither the name of STMicroelectronics nor the names of its contributors
30 * may be used to endorse or promote products derived from this software
31 * without specific prior written permission.
33 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
34 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
35 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
36 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
37 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
38 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
39 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
40 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
41 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
42 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
44 ******************************************************************************
53 .global Default_Handler
55 /* start address for the initialization values of the .data section.
56 defined in linker script */
58 /* start address for the .data section. defined in linker script */
60 /* end address for the .data section. defined in linker script */
62 /* start address for the .bss section. defined in linker script */
64 /* end address for the .bss section. defined in linker script */
67 .equ BootRAM, 0xF108F85F
69 * @brief This is the code that gets called when the processor first
70 * starts execution following a reset event. Only the absolutely
71 * necessary set is performed, after which the application
72 * supplied main() routine is called.
77 .section .text.Reset_Handler
79 .type Reset_Handler, %function
82 /* Copy the data segment initializers from flash to SRAM */
100 /* Zero fill the bss segment. */
110 /* Call the clock system intitialization function.*/
112 /* Call static constructors */
114 /* Call the application's entry point.*/
117 .size Reset_Handler, .-Reset_Handler
120 * @brief This is the code that gets called when the processor receives an
121 * unexpected interrupt. This simply enters an infinite loop, preserving
122 * the system state for examination by a debugger.
127 .section .text.Default_Handler,"ax",%progbits
131 .size Default_Handler, .-Default_Handler
132 /******************************************************************************
134 * The minimal vector table for a Cortex M3. Note that the proper constructs
135 * must be placed on this to ensure that it ends up at physical address
138 ******************************************************************************/
139 .section .isr_vector,"a",%progbits
140 .type g_pfnVectors, %object
141 .size g_pfnVectors, .-g_pfnVectors
148 .word HardFault_Handler
149 .word MemManage_Handler
150 .word BusFault_Handler
151 .word UsageFault_Handler
157 .word DebugMon_Handler
160 .word SysTick_Handler
161 .word WWDG_IRQHandler
163 .word TAMPER_STAMP_IRQHandler
164 .word RTC_WKUP_IRQHandler
165 .word FLASH_IRQHandler
167 .word EXTI0_IRQHandler
168 .word EXTI1_IRQHandler
169 .word EXTI2_IRQHandler
170 .word EXTI3_IRQHandler
171 .word EXTI4_IRQHandler
172 .word DMA1_Channel1_IRQHandler
173 .word DMA1_Channel2_IRQHandler
174 .word DMA1_Channel3_IRQHandler
175 .word DMA1_Channel4_IRQHandler
176 .word DMA1_Channel5_IRQHandler
177 .word DMA1_Channel6_IRQHandler
178 .word DMA1_Channel7_IRQHandler
179 .word ADC1_IRQHandler
180 .word USB_HP_IRQHandler
181 .word USB_LP_IRQHandler
183 .word COMP_IRQHandler
184 .word EXTI9_5_IRQHandler
186 .word TIM9_IRQHandler
187 .word TIM10_IRQHandler
188 .word TIM11_IRQHandler
189 .word TIM2_IRQHandler
190 .word TIM3_IRQHandler
191 .word TIM4_IRQHandler
192 .word I2C1_EV_IRQHandler
193 .word I2C1_ER_IRQHandler
194 .word I2C2_EV_IRQHandler
195 .word I2C2_ER_IRQHandler
196 .word SPI1_IRQHandler
197 .word SPI2_IRQHandler
198 .word USART1_IRQHandler
199 .word USART2_IRQHandler
200 .word USART3_IRQHandler
201 .word EXTI15_10_IRQHandler
202 .word RTC_Alarm_IRQHandler
203 .word USB_FS_WKUP_IRQHandler
204 .word TIM6_IRQHandler
205 .word TIM7_IRQHandler
207 .word TIM5_IRQHandler
208 .word SPI3_IRQHandler
209 .word UART4_IRQHandler
210 .word UART5_IRQHandler
211 .word DMA2_Channel1_IRQHandler
212 .word DMA2_Channel2_IRQHandler
213 .word DMA2_Channel3_IRQHandler
214 .word DMA2_Channel4_IRQHandler
215 .word DMA2_Channel5_IRQHandler
217 .word COMP_ACQ_IRQHandler
223 .word BootRAM /* @0x108. This is for boot in RAM mode for
224 STM32L152XE devices. */
226 /*******************************************************************************
228 * Provide weak aliases for each Exception handler to the Default_Handler.
229 * As they are weak aliases, any function with the same name will override
232 *******************************************************************************/
235 .thumb_set NMI_Handler,Default_Handler
237 .weak HardFault_Handler
238 .thumb_set HardFault_Handler,Default_Handler
240 .weak MemManage_Handler
241 .thumb_set MemManage_Handler,Default_Handler
243 .weak BusFault_Handler
244 .thumb_set BusFault_Handler,Default_Handler
246 .weak UsageFault_Handler
247 .thumb_set UsageFault_Handler,Default_Handler
250 .thumb_set SVC_Handler,Default_Handler
252 .weak DebugMon_Handler
253 .thumb_set DebugMon_Handler,Default_Handler
256 .thumb_set PendSV_Handler,Default_Handler
258 .weak SysTick_Handler
259 .thumb_set SysTick_Handler,Default_Handler
261 .weak WWDG_IRQHandler
262 .thumb_set WWDG_IRQHandler,Default_Handler
265 .thumb_set PVD_IRQHandler,Default_Handler
267 .weak TAMPER_STAMP_IRQHandler
268 .thumb_set TAMPER_STAMP_IRQHandler,Default_Handler
270 .weak RTC_WKUP_IRQHandler
271 .thumb_set RTC_WKUP_IRQHandler,Default_Handler
273 .weak FLASH_IRQHandler
274 .thumb_set FLASH_IRQHandler,Default_Handler
277 .thumb_set RCC_IRQHandler,Default_Handler
279 .weak EXTI0_IRQHandler
280 .thumb_set EXTI0_IRQHandler,Default_Handler
282 .weak EXTI1_IRQHandler
283 .thumb_set EXTI1_IRQHandler,Default_Handler
285 .weak EXTI2_IRQHandler
286 .thumb_set EXTI2_IRQHandler,Default_Handler
288 .weak EXTI3_IRQHandler
289 .thumb_set EXTI3_IRQHandler,Default_Handler
291 .weak EXTI4_IRQHandler
292 .thumb_set EXTI4_IRQHandler,Default_Handler
294 .weak DMA1_Channel1_IRQHandler
295 .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
297 .weak DMA1_Channel2_IRQHandler
298 .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
300 .weak DMA1_Channel3_IRQHandler
301 .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
303 .weak DMA1_Channel4_IRQHandler
304 .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
306 .weak DMA1_Channel5_IRQHandler
307 .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
309 .weak DMA1_Channel6_IRQHandler
310 .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
312 .weak DMA1_Channel7_IRQHandler
313 .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
315 .weak ADC1_IRQHandler
316 .thumb_set ADC1_IRQHandler,Default_Handler
318 .weak USB_HP_IRQHandler
319 .thumb_set USB_HP_IRQHandler,Default_Handler
321 .weak USB_LP_IRQHandler
322 .thumb_set USB_LP_IRQHandler,Default_Handler
325 .thumb_set DAC_IRQHandler,Default_Handler
327 .weak COMP_IRQHandler
328 .thumb_set COMP_IRQHandler,Default_Handler
330 .weak EXTI9_5_IRQHandler
331 .thumb_set EXTI9_5_IRQHandler,Default_Handler
334 .thumb_set LCD_IRQHandler,Default_Handler
336 .weak TIM9_IRQHandler
337 .thumb_set TIM9_IRQHandler,Default_Handler
339 .weak TIM10_IRQHandler
340 .thumb_set TIM10_IRQHandler,Default_Handler
342 .weak TIM11_IRQHandler
343 .thumb_set TIM11_IRQHandler,Default_Handler
345 .weak TIM2_IRQHandler
346 .thumb_set TIM2_IRQHandler,Default_Handler
348 .weak TIM3_IRQHandler
349 .thumb_set TIM3_IRQHandler,Default_Handler
351 .weak TIM4_IRQHandler
352 .thumb_set TIM4_IRQHandler,Default_Handler
354 .weak I2C1_EV_IRQHandler
355 .thumb_set I2C1_EV_IRQHandler,Default_Handler
357 .weak I2C1_ER_IRQHandler
358 .thumb_set I2C1_ER_IRQHandler,Default_Handler
360 .weak I2C2_EV_IRQHandler
361 .thumb_set I2C2_EV_IRQHandler,Default_Handler
363 .weak I2C2_ER_IRQHandler
364 .thumb_set I2C2_ER_IRQHandler,Default_Handler
366 .weak SPI1_IRQHandler
367 .thumb_set SPI1_IRQHandler,Default_Handler
369 .weak SPI2_IRQHandler
370 .thumb_set SPI2_IRQHandler,Default_Handler
372 .weak USART1_IRQHandler
373 .thumb_set USART1_IRQHandler,Default_Handler
375 .weak USART2_IRQHandler
376 .thumb_set USART2_IRQHandler,Default_Handler
378 .weak USART3_IRQHandler
379 .thumb_set USART3_IRQHandler,Default_Handler
381 .weak EXTI15_10_IRQHandler
382 .thumb_set EXTI15_10_IRQHandler,Default_Handler
384 .weak RTC_Alarm_IRQHandler
385 .thumb_set RTC_Alarm_IRQHandler,Default_Handler
387 .weak USB_FS_WKUP_IRQHandler
388 .thumb_set USB_FS_WKUP_IRQHandler,Default_Handler
390 .weak TIM6_IRQHandler
391 .thumb_set TIM6_IRQHandler,Default_Handler
393 .weak TIM7_IRQHandler
394 .thumb_set TIM7_IRQHandler,Default_Handler
396 .weak TIM5_IRQHandler
397 .thumb_set TIM5_IRQHandler,Default_Handler
399 .weak SPI3_IRQHandler
400 .thumb_set SPI3_IRQHandler,Default_Handler
402 .weak UART4_IRQHandler
403 .thumb_set UART4_IRQHandler,Default_Handler
405 .weak UART5_IRQHandler
406 .thumb_set UART5_IRQHandler,Default_Handler
408 .weak DMA2_Channel1_IRQHandler
409 .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
411 .weak DMA2_Channel2_IRQHandler
412 .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
414 .weak DMA2_Channel3_IRQHandler
415 .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
417 .weak DMA2_Channel4_IRQHandler
418 .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
420 .weak DMA2_Channel5_IRQHandler
421 .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
423 .weak COMP_ACQ_IRQHandler
424 .thumb_set COMP_ACQ_IRQHandler,Default_Handler
426 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/