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1 /**
2 ******************************************************************************
3 * @file stm32l1xx_hal_flash.h
4 * @author MCD Application Team
5 * @version V1.0.0
6 * @date 5-September-2014
7 * @brief Header file of Flash HAL module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32L1xx_HAL_FLASH_EX_H
40 #define __STM32L1xx_HAL_FLASH_EX_H
41
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32l1xx_hal_def.h"
48
49 /** @addtogroup STM32L1xx_HAL_Driver
50 * @{
51 */
52
53 /** @addtogroup FLASHEx
54 * @{
55 */
56
57 /* Exported types ------------------------------------------------------------*/
58
59 /** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types
60 * @{
61 */
62
63 /**
64 * @brief FLASH Erase structure definition
65 */
66 typedef struct
67 {
68 uint32_t TypeErase; /*!< TypeErase: Page Erase only.
69 This parameter can be a value of @ref FLASHEx_Type_Erase */
70
71 uint32_t PageAddress; /*!< PageAddress: Initial FLASH address to be erased
72 This parameter must be a value belonging to FLASH Programm address (depending on the devices) */
73
74 uint32_t NbPages; /*!< NbPages: Number of pages to be erased.
75 This parameter must be a value between 1 and (max number of pages - value of Initial page)*/
76
77 } FLASH_EraseInitTypeDef;
78
79 /**
80 * @brief FLASH Option Bytes PROGRAM structure definition
81 */
82 typedef struct
83 {
84 uint32_t OptionType; /*!< OptionType: Option byte to be configured.
85 This parameter can be a value of @ref FLASHEx_Option_Type */
86
87 uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation.
88 This parameter can be a value of @ref FLASHEx_WRP_State */
89
90 uint32_t WRPSector0To31; /*!< WRPSector0To31: specifies the sector(s) which are write protected between Sector 0 to 31
91 This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection1 */
92
93 #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
94 defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
95 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
96 uint32_t WRPSector32To63; /*!< WRPSector32To63: specifies the sector(s) which are write protected between Sector 32 to 63
97 This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection2 */
98 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
99
100 #if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD) || \
101 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
102 uint32_t WRPSector64To95; /*!< WRPSector64to95: specifies the sector(s) which are write protected between Sector 64 to 95
103 This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection3 */
104 #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
105
106 #if defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
107 uint32_t WRPSector96To127; /*!< WRPSector96To127: specifies the sector(s) which are write protected between Sector 96 to 127
108 This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection4 */
109 #endif /* STM32L151xE || STM32L152xE || STM32L162xE */
110
111 uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level..
112 This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */
113
114 uint8_t BORLevel; /*!< BORLevel: Set the BOR Level.
115 This parameter can be a value of @ref FLASHEx_Option_Bytes_BOR_Level */
116
117 uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
118 This parameter can be a combination of @ref FLASHEx_Option_Bytes_IWatchdog, @ref FLASHEx_Option_Bytes_nRST_STOP and @ref FLASHEx_Option_Bytes_nRST_STDBY*/
119 } FLASH_OBProgramInitTypeDef;
120
121 /**
122 * @brief FLASH Advanced Option Bytes Program structure definition
123 */
124 typedef struct
125 {
126 uint32_t OptionType; /*!< OptionType: Option byte to be configured for extension .
127 This parameter can be a value of @ref FLASHEx_OptionAdv_Type */
128
129 #if defined (STM32L151xBA) || defined (STM32L152xBA) || \
130 defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC)
131 uint32_t PCROPState; /*!< PCROPState: PCROP activation or deactivation.
132 This parameter can be a value of @ref FLASHEx_PCROP_State */
133
134 uint32_t PCROPSector0To31; /*!< PCROPSector0To31: specifies the sector(s) set for PCROP
135 This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection1 */
136
137 #if defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC)
138 uint32_t PCROPSector32To63; /*!< PCROPSector32To63: specifies the sector(s) set for PCROP
139 This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection2 */
140 #endif /* STM32L151xC || STM32L152xC || STM32L162xC */
141 #endif /* STM32L151xBA || STM32L152xBA || STM32L151xC || STM32L152xC || STM32L162xC */
142
143 #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
144 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
145 uint16_t BootConfig; /*!< BootConfig: specifies Option bytes for boot config
146 This parameter can be a value of @ref FLASHEx_Option_Bytes_BOOT */
147 #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE*/
148 } FLASH_AdvOBProgramInitTypeDef;
149
150 /**
151 * @}
152 */
153
154 /* Exported constants --------------------------------------------------------*/
155
156
157 /** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants
158 * @{
159 */
160
161 /** @defgroup FLASHEx_Type_Erase FLASHEx_Type_Erase
162 * @{
163 */
164 #define TYPEERASE_PAGES ((uint32_t)0x00) /*!<Page erase only*/
165
166 #define IS_TYPEERASE(__VALUE__) (((__VALUE__) == TYPEERASE_PAGES))
167 /**
168 * @}
169 */
170
171 /** @defgroup FLASHEx_Option_Type FLASHEx Option Type
172 * @{
173 */
174 #define OPTIONBYTE_WRP ((uint32_t)0x01) /*!<WRP option byte configuration*/
175 #define OPTIONBYTE_RDP ((uint32_t)0x02) /*!<RDP option byte configuration*/
176 #define OPTIONBYTE_USER ((uint32_t)0x04) /*!<USER option byte configuration*/
177 #define OPTIONBYTE_BOR ((uint32_t)0x08) /*!<BOR option byte configuration*/
178
179 #define IS_OPTIONBYTE(__VALUE__) (((__VALUE__) < (OPTIONBYTE_WRP|OPTIONBYTE_RDP|OPTIONBYTE_USER|OPTIONBYTE_BOR)))
180 /**
181 * @}
182 */
183
184 /** @defgroup FLASHEx_WRP_State FLASHEx WRP State
185 * @{
186 */
187 #define WRPSTATE_DISABLE ((uint32_t)0x00) /*!<Disable the write protection of the desired bank 1 sectors*/
188 #define WRPSTATE_ENABLE ((uint32_t)0x01) /*!<Enable the write protection of the desired bank 1 sectors*/
189
190 #define IS_WRPSTATE(__VALUE__) (((__VALUE__) == WRPSTATE_DISABLE) || \
191 ((__VALUE__) == WRPSTATE_ENABLE))
192 /**
193 * @}
194 */
195
196 /** @defgroup FLASHEx_Option_Bytes_Write_Mask FLASHEx Option Bytes Write Mask
197 * @{
198 */
199 #define WRP_MASK_LOW ((uint32_t)0x0000FFFF)
200 #define WRP_MASK_HIGH ((uint32_t)0xFFFF0000)
201
202 /**
203 * @}
204 */
205
206 /** @defgroup FLASHEx_Option_Bytes_Write_Protection1 FLASHEx Option Bytes Write Protection1
207 * @{
208 */
209
210 /* Common pages for Cat1, Cat2, Cat3, Cat4 & Cat5 devices */
211 #define OB_WRP1_PAGES0TO15 ((uint32_t)0x00000001) /* Write protection of Sector0 */
212 #define OB_WRP1_PAGES16TO31 ((uint32_t)0x00000002) /* Write protection of Sector1 */
213 #define OB_WRP1_PAGES32TO47 ((uint32_t)0x00000004) /* Write protection of Sector2 */
214 #define OB_WRP1_PAGES48TO63 ((uint32_t)0x00000008) /* Write protection of Sector3 */
215 #define OB_WRP1_PAGES64TO79 ((uint32_t)0x00000010) /* Write protection of Sector4 */
216 #define OB_WRP1_PAGES80TO95 ((uint32_t)0x00000020) /* Write protection of Sector5 */
217 #define OB_WRP1_PAGES96TO111 ((uint32_t)0x00000040) /* Write protection of Sector6 */
218 #define OB_WRP1_PAGES112TO127 ((uint32_t)0x00000080) /* Write protection of Sector7 */
219 #define OB_WRP1_PAGES128TO143 ((uint32_t)0x00000100) /* Write protection of Sector8 */
220 #define OB_WRP1_PAGES144TO159 ((uint32_t)0x00000200) /* Write protection of Sector9 */
221 #define OB_WRP1_PAGES160TO175 ((uint32_t)0x00000400) /* Write protection of Sector10 */
222 #define OB_WRP1_PAGES176TO191 ((uint32_t)0x00000800) /* Write protection of Sector11 */
223 #define OB_WRP1_PAGES192TO207 ((uint32_t)0x00001000) /* Write protection of Sector12 */
224 #define OB_WRP1_PAGES208TO223 ((uint32_t)0x00002000) /* Write protection of Sector13 */
225 #define OB_WRP1_PAGES224TO239 ((uint32_t)0x00004000) /* Write protection of Sector14 */
226 #define OB_WRP1_PAGES240TO255 ((uint32_t)0x00008000) /* Write protection of Sector15 */
227 #define OB_WRP1_PAGES256TO271 ((uint32_t)0x00010000) /* Write protection of Sector16 */
228 #define OB_WRP1_PAGES272TO287 ((uint32_t)0x00020000) /* Write protection of Sector17 */
229 #define OB_WRP1_PAGES288TO303 ((uint32_t)0x00040000) /* Write protection of Sector18 */
230 #define OB_WRP1_PAGES304TO319 ((uint32_t)0x00080000) /* Write protection of Sector19 */
231 #define OB_WRP1_PAGES320TO335 ((uint32_t)0x00100000) /* Write protection of Sector20 */
232 #define OB_WRP1_PAGES336TO351 ((uint32_t)0x00200000) /* Write protection of Sector21 */
233 #define OB_WRP1_PAGES352TO367 ((uint32_t)0x00400000) /* Write protection of Sector22 */
234 #define OB_WRP1_PAGES368TO383 ((uint32_t)0x00800000) /* Write protection of Sector23 */
235 #define OB_WRP1_PAGES384TO399 ((uint32_t)0x01000000) /* Write protection of Sector24 */
236 #define OB_WRP1_PAGES400TO415 ((uint32_t)0x02000000) /* Write protection of Sector25 */
237 #define OB_WRP1_PAGES416TO431 ((uint32_t)0x04000000) /* Write protection of Sector26 */
238 #define OB_WRP1_PAGES432TO447 ((uint32_t)0x08000000) /* Write protection of Sector27 */
239 #define OB_WRP1_PAGES448TO463 ((uint32_t)0x10000000) /* Write protection of Sector28 */
240 #define OB_WRP1_PAGES464TO479 ((uint32_t)0x20000000) /* Write protection of Sector29 */
241 #define OB_WRP1_PAGES480TO495 ((uint32_t)0x40000000) /* Write protection of Sector30 */
242 #define OB_WRP1_PAGES496TO511 ((uint32_t)0x80000000) /* Write protection of Sector31 */
243
244 #define OB_WRP1_ALLPAGES ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Sectors */
245
246 /**
247 * @}
248 */
249
250 #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
251 defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
252 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
253
254 /** @defgroup FLASHEx_Option_Bytes_Write_Protection2 FLASHEx Option Bytes Write Protection2
255 * @{
256 */
257
258 /* Pages for Cat3, Cat4 & Cat5 devices*/
259 #define OB_WRP2_PAGES512TO527 ((uint32_t)0x00000001) /* Write protection of Sector32 */
260 #define OB_WRP2_PAGES528TO543 ((uint32_t)0x00000002) /* Write protection of Sector33 */
261 #define OB_WRP2_PAGES544TO559 ((uint32_t)0x00000004) /* Write protection of Sector34 */
262 #define OB_WRP2_PAGES560TO575 ((uint32_t)0x00000008) /* Write protection of Sector35 */
263 #define OB_WRP2_PAGES576TO591 ((uint32_t)0x00000010) /* Write protection of Sector36 */
264 #define OB_WRP2_PAGES592TO607 ((uint32_t)0x00000020) /* Write protection of Sector37 */
265 #define OB_WRP2_PAGES608TO623 ((uint32_t)0x00000040) /* Write protection of Sector38 */
266 #define OB_WRP2_PAGES624TO639 ((uint32_t)0x00000080) /* Write protection of Sector39 */
267 #define OB_WRP2_PAGES640TO655 ((uint32_t)0x00000100) /* Write protection of Sector40 */
268 #define OB_WRP2_PAGES656TO671 ((uint32_t)0x00000200) /* Write protection of Sector41 */
269 #define OB_WRP2_PAGES672TO687 ((uint32_t)0x00000400) /* Write protection of Sector42 */
270 #define OB_WRP2_PAGES688TO703 ((uint32_t)0x00000800) /* Write protection of Sector43 */
271 #define OB_WRP2_PAGES704TO719 ((uint32_t)0x00001000) /* Write protection of Sector44 */
272 #define OB_WRP2_PAGES720TO735 ((uint32_t)0x00002000) /* Write protection of Sector45 */
273 #define OB_WRP2_PAGES736TO751 ((uint32_t)0x00004000) /* Write protection of Sector46 */
274 #define OB_WRP2_PAGES752TO767 ((uint32_t)0x00008000) /* Write protection of Sector47 */
275 #define OB_WRP2_PAGES768TO783 ((uint32_t)0x00010000) /* Write protection of Sector48 */
276 #define OB_WRP2_PAGES784TO799 ((uint32_t)0x00020000) /* Write protection of Sector49 */
277 #define OB_WRP2_PAGES800TO815 ((uint32_t)0x00040000) /* Write protection of Sector50 */
278 #define OB_WRP2_PAGES816TO831 ((uint32_t)0x00080000) /* Write protection of Sector51 */
279 #define OB_WRP2_PAGES832TO847 ((uint32_t)0x00100000) /* Write protection of Sector52 */
280 #define OB_WRP2_PAGES848TO863 ((uint32_t)0x00200000) /* Write protection of Sector53 */
281 #define OB_WRP2_PAGES864TO879 ((uint32_t)0x00400000) /* Write protection of Sector54 */
282 #define OB_WRP2_PAGES880TO895 ((uint32_t)0x00800000) /* Write protection of Sector55 */
283 #define OB_WRP2_PAGES896TO911 ((uint32_t)0x01000000) /* Write protection of Sector56 */
284 #define OB_WRP2_PAGES912TO927 ((uint32_t)0x02000000) /* Write protection of Sector57 */
285 #define OB_WRP2_PAGES928TO943 ((uint32_t)0x04000000) /* Write protection of Sector58 */
286 #define OB_WRP2_PAGES944TO959 ((uint32_t)0x08000000) /* Write protection of Sector59 */
287 #define OB_WRP2_PAGES960TO975 ((uint32_t)0x10000000) /* Write protection of Sector60 */
288 #define OB_WRP2_PAGES976TO991 ((uint32_t)0x20000000) /* Write protection of Sector61 */
289 #define OB_WRP2_PAGES992TO1007 ((uint32_t)0x40000000) /* Write protection of Sector62 */
290 #define OB_WRP2_PAGES1008TO1023 ((uint32_t)0x80000000) /* Write protection of Sector63 */
291
292 #define OB_WRP2_ALLPAGES ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Sectors */
293
294 /**
295 * @}
296 */
297
298 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
299
300 #if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD) || \
301 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
302
303 /** @defgroup FLASHEx_Option_Bytes_Write_Protection3 FLASHEx Option Bytes Write Protection3
304 * @{
305 */
306
307 /* Pages for devices with FLASH >= 256KB*/
308 #define OB_WRP3_PAGES1024TO1039 ((uint32_t)0x00000001) /* Write protection of Sector64 */
309 #define OB_WRP3_PAGES1040TO1055 ((uint32_t)0x00000002) /* Write protection of Sector65 */
310 #define OB_WRP3_PAGES1056TO1071 ((uint32_t)0x00000004) /* Write protection of Sector66 */
311 #define OB_WRP3_PAGES1072TO1087 ((uint32_t)0x00000008) /* Write protection of Sector67 */
312 #define OB_WRP3_PAGES1088TO1103 ((uint32_t)0x00000010) /* Write protection of Sector68 */
313 #define OB_WRP3_PAGES1104TO1119 ((uint32_t)0x00000020) /* Write protection of Sector69 */
314 #define OB_WRP3_PAGES1120TO1135 ((uint32_t)0x00000040) /* Write protection of Sector70 */
315 #define OB_WRP3_PAGES1136TO1151 ((uint32_t)0x00000080) /* Write protection of Sector71 */
316 #define OB_WRP3_PAGES1152TO1167 ((uint32_t)0x00000100) /* Write protection of Sector72 */
317 #define OB_WRP3_PAGES1168TO1183 ((uint32_t)0x00000200) /* Write protection of Sector73 */
318 #define OB_WRP3_PAGES1184TO1199 ((uint32_t)0x00000400) /* Write protection of Sector74 */
319 #define OB_WRP3_PAGES1200TO1215 ((uint32_t)0x00000800) /* Write protection of Sector75 */
320 #define OB_WRP3_PAGES1216TO1231 ((uint32_t)0x00001000) /* Write protection of Sector76 */
321 #define OB_WRP3_PAGES1232TO1247 ((uint32_t)0x00002000) /* Write protection of Sector77 */
322 #define OB_WRP3_PAGES1248TO1263 ((uint32_t)0x00004000) /* Write protection of Sector78 */
323 #define OB_WRP3_PAGES1264TO1279 ((uint32_t)0x00008000) /* Write protection of Sector79 */
324 #define OB_WRP3_PAGES1280TO1295 ((uint32_t)0x00010000) /* Write protection of Sector80 */
325 #define OB_WRP3_PAGES1296TO1311 ((uint32_t)0x00020000) /* Write protection of Sector81 */
326 #define OB_WRP3_PAGES1312TO1327 ((uint32_t)0x00040000) /* Write protection of Sector82 */
327 #define OB_WRP3_PAGES1328TO1343 ((uint32_t)0x00080000) /* Write protection of Sector83 */
328 #define OB_WRP3_PAGES1344TO1359 ((uint32_t)0x00100000) /* Write protection of Sector84 */
329 #define OB_WRP3_PAGES1360TO1375 ((uint32_t)0x00200000) /* Write protection of Sector85 */
330 #define OB_WRP3_PAGES1376TO1391 ((uint32_t)0x00400000) /* Write protection of Sector86 */
331 #define OB_WRP3_PAGES1392TO1407 ((uint32_t)0x00800000) /* Write protection of Sector87 */
332 #define OB_WRP3_PAGES1408TO1423 ((uint32_t)0x01000000) /* Write protection of Sector88 */
333 #define OB_WRP3_PAGES1424TO1439 ((uint32_t)0x02000000) /* Write protection of Sector89 */
334 #define OB_WRP3_PAGES1440TO1455 ((uint32_t)0x04000000) /* Write protection of Sector90 */
335 #define OB_WRP3_PAGES1456TO1471 ((uint32_t)0x08000000) /* Write protection of Sector91 */
336 #define OB_WRP3_PAGES1472TO1487 ((uint32_t)0x10000000) /* Write protection of Sector92 */
337 #define OB_WRP3_PAGES1488TO1503 ((uint32_t)0x20000000) /* Write protection of Sector93 */
338 #define OB_WRP3_PAGES1504TO1519 ((uint32_t)0x40000000) /* Write protection of Sector94 */
339 #define OB_WRP3_PAGES1520TO1535 ((uint32_t)0x80000000) /* Write protection of Sector95 */
340
341 #define OB_WRP3_ALLPAGES ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Sectors */
342
343 /**
344 * @}
345 */
346
347 #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE*/
348
349 #if defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
350
351 /** @defgroup FLASHEx_Option_Bytes_Write_Protection4 FLASHEx Option Bytes Write Protection4
352 * @{
353 */
354
355 /* Pages for Cat5 devices*/
356 #define OB_WRP4_PAGES1536TO1551 ((uint32_t)0x00000001)/* Write protection of Sector96*/
357 #define OB_WRP4_PAGES1552TO1567 ((uint32_t)0x00000002)/* Write protection of Sector97*/
358 #define OB_WRP4_PAGES1568TO1583 ((uint32_t)0x00000004)/* Write protection of Sector98*/
359 #define OB_WRP4_PAGES1584TO1599 ((uint32_t)0x00000008)/* Write protection of Sector99*/
360 #define OB_WRP4_PAGES1600TO1615 ((uint32_t)0x00000010) /* Write protection of Sector100*/
361 #define OB_WRP4_PAGES1616TO1631 ((uint32_t)0x00000020) /* Write protection of Sector101*/
362 #define OB_WRP4_PAGES1632TO1647 ((uint32_t)0x00000040) /* Write protection of Sector102*/
363 #define OB_WRP4_PAGES1648TO1663 ((uint32_t)0x00000080) /* Write protection of Sector103*/
364 #define OB_WRP4_PAGES1664TO1679 ((uint32_t)0x00000100) /* Write protection of Sector104*/
365 #define OB_WRP4_PAGES1680TO1695 ((uint32_t)0x00000200) /* Write protection of Sector105*/
366 #define OB_WRP4_PAGES1696TO1711 ((uint32_t)0x00000400) /* Write protection of Sector106*/
367 #define OB_WRP4_PAGES1712TO1727 ((uint32_t)0x00000800) /* Write protection of Sector107*/
368 #define OB_WRP4_PAGES1728TO1743 ((uint32_t)0x00001000) /* Write protection of Sector108*/
369 #define OB_WRP4_PAGES1744TO1759 ((uint32_t)0x00002000) /* Write protection of Sector109*/
370 #define OB_WRP4_PAGES1760TO1775 ((uint32_t)0x00004000) /* Write protection of Sector110*/
371 #define OB_WRP4_PAGES1776TO1791 ((uint32_t)0x00008000) /* Write protection of Sector111*/
372 #define OB_WRP4_PAGES1792TO1807 ((uint32_t)0x00010000) /* Write protection of Sector112*/
373 #define OB_WRP4_PAGES1808TO1823 ((uint32_t)0x00020000) /* Write protection of Sector113*/
374 #define OB_WRP4_PAGES1824TO1839 ((uint32_t)0x00040000) /* Write protection of Sector114*/
375 #define OB_WRP4_PAGES1840TO1855 ((uint32_t)0x00080000) /* Write protection of Sector115*/
376 #define OB_WRP4_PAGES1856TO1871 ((uint32_t)0x00100000) /* Write protection of Sector116*/
377 #define OB_WRP4_PAGES1872TO1887 ((uint32_t)0x00200000) /* Write protection of Sector117*/
378 #define OB_WRP4_PAGES1888TO1903 ((uint32_t)0x00400000) /* Write protection of Sector118*/
379 #define OB_WRP4_PAGES1904TO1919 ((uint32_t)0x00800000) /* Write protection of Sector119*/
380 #define OB_WRP4_PAGES1920TO1935 ((uint32_t)0x01000000) /* Write protection of Sector120*/
381 #define OB_WRP4_PAGES1936TO1951 ((uint32_t)0x02000000) /* Write protection of Sector121*/
382 #define OB_WRP4_PAGES1952TO1967 ((uint32_t)0x04000000) /* Write protection of Sector122*/
383 #define OB_WRP4_PAGES1968TO1983 ((uint32_t)0x08000000) /* Write protection of Sector123*/
384 #define OB_WRP4_PAGES1984TO1999 ((uint32_t)0x10000000) /* Write protection of Sector124*/
385 #define OB_WRP4_PAGES2000TO2015 ((uint32_t)0x20000000) /* Write protection of Sector125*/
386 #define OB_WRP4_PAGES2016TO2031 ((uint32_t)0x40000000) /* Write protection of Sector126*/
387 #define OB_WRP4_PAGES2032TO2047 ((uint32_t)0x80000000) /* Write protection of Sector127*/
388
389 #define OB_WRP4_ALLPAGES ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Sectors */
390
391 /**
392 * @}
393 */
394
395 #endif /* STM32L151xE || STM32L152xE || STM32L162xE */
396
397 /** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASHEx Option Bytes Read Protection
398 * @{
399 */
400 #define OB_RDP_LEVEL0 ((uint8_t)0xAA)
401 #define OB_RDP_LEVEL1 ((uint8_t)0xBB)
402 /*#define OB_RDP_LEVEL2 ((uint8_t)0xCC)*/ /* Warning: When enabling read protection level 2
403 it's no more possible to go back to level 1 or 0 */
404
405 #define IS_OB_RDP(__LEVEL__) (((__LEVEL__) == OB_RDP_LEVEL0)||\
406 ((__LEVEL__) == OB_RDP_LEVEL1))/*||\
407 ((__LEVEL__) == OB_RDP_LEVEL2))*/
408 /**
409 * @}
410 */
411
412 /** @defgroup FLASHEx_Option_Bytes_BOR_Level FLASHEx Option Bytes BOR Level
413 * @{
414 */
415
416 #define OB_BOR_OFF ((uint8_t)0x00) /*!< BOR is disabled at power down, the reset is asserted when the VDD
417 power supply reaches the PDR(Power Down Reset) threshold (1.5V) */
418 #define OB_BOR_LEVEL1 ((uint8_t)0x08) /*!< BOR Reset threshold levels for 1.7V - 1.8V VDD power supply */
419 #define OB_BOR_LEVEL2 ((uint8_t)0x09) /*!< BOR Reset threshold levels for 1.9V - 2.0V VDD power supply */
420 #define OB_BOR_LEVEL3 ((uint8_t)0x0A) /*!< BOR Reset threshold levels for 2.3V - 2.4V VDD power supply */
421 #define OB_BOR_LEVEL4 ((uint8_t)0x0B) /*!< BOR Reset threshold levels for 2.55V - 2.65V VDD power supply */
422 #define OB_BOR_LEVEL5 ((uint8_t)0x0C) /*!< BOR Reset threshold levels for 2.8V - 2.9V VDD power supply */
423
424 #define IS_OB_BOR_LEVEL(__LEVEL__) ( ((__LEVEL__) == OB_BOR_OFF) || \
425 ((__LEVEL__) == OB_BOR_LEVEL1) || \
426 ((__LEVEL__) == OB_BOR_LEVEL2) || \
427 ((__LEVEL__) == OB_BOR_LEVEL3) || \
428 ((__LEVEL__) == OB_BOR_LEVEL4) || \
429 ((__LEVEL__) == OB_BOR_LEVEL5))
430
431 /**
432 * @}
433 */
434
435 /** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASHEx Option Bytes IWatchdog
436 * @{
437 */
438
439 #define OB_IWDG_SW ((uint8_t)0x10) /*!< Software WDG selected */
440 #define OB_IWDG_HW ((uint8_t)0x00) /*!< Hardware WDG selected */
441
442 #define IS_OB_IWDG_SOURCE(__SOURCE__) (((__SOURCE__) == OB_IWDG_SW) || ((__SOURCE__) == OB_IWDG_HW))
443
444 /**
445 * @}
446 */
447
448 /** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASHEx Option Bytes nRST_STOP
449 * @{
450 */
451
452 #define OB_STOP_NORST ((uint8_t)0x20) /*!< No reset generated when entering in STOP */
453 #define OB_STOP_RST ((uint8_t)0x00) /*!< Reset generated when entering in STOP */
454 #define IS_OB_STOP_SOURCE(__SOURCE__) (((__SOURCE__) == OB_STOP_NORST) || ((__SOURCE__) == OB_STOP_RST))
455
456 /**
457 * @}
458 */
459
460 /** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASHEx Option Bytes nRST_STDBY
461 * @{
462 */
463
464 #define OB_STDBY_NORST ((uint8_t)0x40) /*!< No reset generated when entering in STANDBY */
465 #define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */
466 #define IS_OB_STDBY_SOURCE(__SOURCE__) (((__SOURCE__) == OB_STDBY_NORST) || ((__SOURCE__) == OB_STDBY_RST))
467
468 /**
469 * @}
470 */
471
472 #if defined (STM32L151xBA) || defined (STM32L152xBA) || \
473 defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC)
474
475 /** @defgroup FLASHEx_OptionAdv_Type FLASHEx Option Advanced Type
476 * @{
477 */
478
479 #define OBEX_PCROP ((uint32_t)0x01) /*!<PCROP option byte configuration*/
480
481 #define IS_OBEX(__VALUE__) ((__VALUE__) == OBEX_PCROP)
482
483 /**
484 * @}
485 */
486
487 #endif /* STM32L151xBA || STM32L152xBA || STM32L151xC || STM32L152xC || STM32L162xC */
488
489 #if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD) || \
490 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
491
492 /** @defgroup FLASHEx_OptionAdv_Type FLASHEx Option Advanced Type
493 * @{
494 */
495
496 #define OBEX_BOOTCONFIG ((uint32_t)0x02) /*!<BOOTConfig option byte configuration*/
497
498 #define IS_OBEX(__VALUE__) ((__VALUE__) == OBEX_BOOTCONFIG)
499
500 /**
501 * @}
502 */
503
504 #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
505
506 #if defined (STM32L151xBA) || defined (STM32L152xBA) || \
507 defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC)
508
509 /** @defgroup FLASHEx_PCROP_State FLASHEx PCROP State
510 * @{
511 */
512 #define PCROPSTATE_DISABLE ((uint32_t)0x00) /*!<Disable PCROP for selected sectors */
513 #define PCROPSTATE_ENABLE ((uint32_t)0x01) /*!<Enable PCROP for selected sectors */
514
515 #define IS_PCROPSTATE(__VALUE__) (((__VALUE__) == PCROPSTATE_DISABLE) || \
516 ((__VALUE__) == PCROPSTATE_ENABLE))
517 /**
518 * @}
519 */
520
521 /** @defgroup FLASHEx_Selection_Protection_Mode FLASHEx Selection Protection Mode
522 * @{
523 */
524 #define OB_PCROP_DESELECTED ((uint16_t)0x0000) /*!< Disabled PCROP, nWPRi bits used for Write Protection on sector i */
525 #define OB_PCROP_SELECTED ((uint16_t)FLASH_OBR_SPRMOD) /*!< Enable PCROP, nWPRi bits used for PCRoP Protection on sector i */
526
527 /**
528 * @}
529 */
530
531 /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection1 FLASHEx Option Bytes PC ReadWrite Protection 1
532 * @{
533 */
534
535 /* Common pages for Cat1, Cat2, Cat3, Cat4 & Cat5 devices */
536 #define OB_PCROP1_PAGES0TO15 ((uint32_t)0x00000001) /* PC Read/Write protection of Sector0 */
537 #define OB_PCROP1_PAGES16TO31 ((uint32_t)0x00000002) /* PC Read/Write protection of Sector1 */
538 #define OB_PCROP1_PAGES32TO47 ((uint32_t)0x00000004) /* PC Read/Write protection of Sector2 */
539 #define OB_PCROP1_PAGES48TO63 ((uint32_t)0x00000008) /* PC Read/Write protection of Sector3 */
540 #define OB_PCROP1_PAGES64TO79 ((uint32_t)0x00000010) /* PC Read/Write protection of Sector4 */
541 #define OB_PCROP1_PAGES80TO95 ((uint32_t)0x00000020) /* PC Read/Write protection of Sector5 */
542 #define OB_PCROP1_PAGES96TO111 ((uint32_t)0x00000040) /* PC Read/Write protection of Sector6 */
543 #define OB_PCROP1_PAGES112TO127 ((uint32_t)0x00000080) /* PC Read/Write protection of Sector7 */
544 #define OB_PCROP1_PAGES128TO143 ((uint32_t)0x00000100) /* PC Read/Write protection of Sector8 */
545 #define OB_PCROP1_PAGES144TO159 ((uint32_t)0x00000200) /* PC Read/Write protection of Sector9 */
546 #define OB_PCROP1_PAGES160TO175 ((uint32_t)0x00000400) /* PC Read/Write protection of Sector10 */
547 #define OB_PCROP1_PAGES176TO191 ((uint32_t)0x00000800) /* PC Read/Write protection of Sector11 */
548 #define OB_PCROP1_PAGES192TO207 ((uint32_t)0x00001000) /* PC Read/Write protection of Sector12 */
549 #define OB_PCROP1_PAGES208TO223 ((uint32_t)0x00002000) /* PC Read/Write protection of Sector13 */
550 #define OB_PCROP1_PAGES224TO239 ((uint32_t)0x00004000) /* PC Read/Write protection of Sector14 */
551 #define OB_PCROP1_PAGES240TO255 ((uint32_t)0x00008000) /* PC Read/Write protection of Sector15 */
552 #define OB_PCROP1_PAGES256TO271 ((uint32_t)0x00010000) /* PC Read/Write protection of Sector16 */
553 #define OB_PCROP1_PAGES272TO287 ((uint32_t)0x00020000) /* PC Read/Write protection of Sector17 */
554 #define OB_PCROP1_PAGES288TO303 ((uint32_t)0x00040000) /* PC Read/Write protection of Sector18 */
555 #define OB_PCROP1_PAGES304TO319 ((uint32_t)0x00080000) /* PC Read/Write protection of Sector19 */
556 #define OB_PCROP1_PAGES320TO335 ((uint32_t)0x00100000) /* PC Read/Write protection of Sector20 */
557 #define OB_PCROP1_PAGES336TO351 ((uint32_t)0x00200000) /* PC Read/Write protection of Sector21 */
558 #define OB_PCROP1_PAGES352TO367 ((uint32_t)0x00400000) /* PC Read/Write protection of Sector22 */
559 #define OB_PCROP1_PAGES368TO383 ((uint32_t)0x00800000) /* PC Read/Write protection of Sector23 */
560 #define OB_PCROP1_PAGES384TO399 ((uint32_t)0x01000000) /* PC Read/Write protection of Sector24 */
561 #define OB_PCROP1_PAGES400TO415 ((uint32_t)0x02000000) /* PC Read/Write protection of Sector25 */
562 #define OB_PCROP1_PAGES416TO431 ((uint32_t)0x04000000) /* PC Read/Write protection of Sector26 */
563 #define OB_PCROP1_PAGES432TO447 ((uint32_t)0x08000000) /* PC Read/Write protection of Sector27 */
564 #define OB_PCROP1_PAGES448TO463 ((uint32_t)0x10000000) /* PC Read/Write protection of Sector28 */
565 #define OB_PCROP1_PAGES464TO479 ((uint32_t)0x20000000) /* PC Read/Write protection of Sector29 */
566 #define OB_PCROP1_PAGES480TO495 ((uint32_t)0x40000000) /* PC Read/Write protection of Sector30 */
567 #define OB_PCROP1_PAGES496TO511 ((uint32_t)0x80000000) /* PC Read/Write protection of Sector31 */
568
569 #define OB_PCROP1_ALLPAGES ((uint32_t)0xFFFFFFFF) /*!< PC Read/Write protection of all Sectors */
570
571 /**
572 * @}
573 */
574
575 #endif /* STM32L151xBA || STM32L152xBA || STM32L151xC || STM32L152xC || STM32L162xC */
576
577 #if defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC)
578
579 /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection2 FLASHEx Option Bytes PC ReadWrite Protection 2
580 * @{
581 */
582
583 /* Pages for Cat3, Cat4 & Cat5 devices*/
584 #define OB_PCROP2_PAGES512TO527 ((uint32_t)0x00000001) /* PC Read/Write protection of Sector32 */
585 #define OB_PCROP2_PAGES528TO543 ((uint32_t)0x00000002) /* PC Read/Write protection of Sector33 */
586 #define OB_PCROP2_PAGES544TO559 ((uint32_t)0x00000004) /* PC Read/Write protection of Sector34 */
587 #define OB_PCROP2_PAGES560TO575 ((uint32_t)0x00000008) /* PC Read/Write protection of Sector35 */
588 #define OB_PCROP2_PAGES576TO591 ((uint32_t)0x00000010) /* PC Read/Write protection of Sector36 */
589 #define OB_PCROP2_PAGES592TO607 ((uint32_t)0x00000020) /* PC Read/Write protection of Sector37 */
590 #define OB_PCROP2_PAGES608TO623 ((uint32_t)0x00000040) /* PC Read/Write protection of Sector38 */
591 #define OB_PCROP2_PAGES624TO639 ((uint32_t)0x00000080) /* PC Read/Write protection of Sector39 */
592 #define OB_PCROP2_PAGES640TO655 ((uint32_t)0x00000100) /* PC Read/Write protection of Sector40 */
593 #define OB_PCROP2_PAGES656TO671 ((uint32_t)0x00000200) /* PC Read/Write protection of Sector41 */
594 #define OB_PCROP2_PAGES672TO687 ((uint32_t)0x00000400) /* PC Read/Write protection of Sector42 */
595 #define OB_PCROP2_PAGES688TO703 ((uint32_t)0x00000800) /* PC Read/Write protection of Sector43 */
596 #define OB_PCROP2_PAGES704TO719 ((uint32_t)0x00001000) /* PC Read/Write protection of Sector44 */
597 #define OB_PCROP2_PAGES720TO735 ((uint32_t)0x00002000) /* PC Read/Write protection of Sector45 */
598 #define OB_PCROP2_PAGES736TO751 ((uint32_t)0x00004000) /* PC Read/Write protection of Sector46 */
599 #define OB_PCROP2_PAGES752TO767 ((uint32_t)0x00008000) /* PC Read/Write protection of Sector47 */
600 #define OB_PCROP2_PAGES768TO783 ((uint32_t)0x00010000) /* PC Read/Write protection of Sector48 */
601 #define OB_PCROP2_PAGES784TO799 ((uint32_t)0x00020000) /* PC Read/Write protection of Sector49 */
602 #define OB_PCROP2_PAGES800TO815 ((uint32_t)0x00040000) /* PC Read/Write protection of Sector50 */
603 #define OB_PCROP2_PAGES816TO831 ((uint32_t)0x00080000) /* PC Read/Write protection of Sector51 */
604 #define OB_PCROP2_PAGES832TO847 ((uint32_t)0x00100000) /* PC Read/Write protection of Sector52 */
605 #define OB_PCROP2_PAGES848TO863 ((uint32_t)0x00200000) /* PC Read/Write protection of Sector53 */
606 #define OB_PCROP2_PAGES864TO879 ((uint32_t)0x00400000) /* PC Read/Write protection of Sector54 */
607 #define OB_PCROP2_PAGES880TO895 ((uint32_t)0x00800000) /* PC Read/Write protection of Sector55 */
608 #define OB_PCROP2_PAGES896TO911 ((uint32_t)0x01000000) /* PC Read/Write protection of Sector56 */
609 #define OB_PCROP2_PAGES912TO927 ((uint32_t)0x02000000) /* PC Read/Write protection of Sector57 */
610 #define OB_PCROP2_PAGES928TO943 ((uint32_t)0x04000000) /* PC Read/Write protection of Sector58 */
611 #define OB_PCROP2_PAGES944TO959 ((uint32_t)0x08000000) /* PC Read/Write protection of Sector59 */
612 #define OB_PCROP2_PAGES960TO975 ((uint32_t)0x10000000) /* PC Read/Write protection of Sector60 */
613 #define OB_PCROP2_PAGES976TO991 ((uint32_t)0x20000000) /* PC Read/Write protection of Sector61 */
614 #define OB_PCROP2_PAGES992TO1007 ((uint32_t)0x40000000) /* PC Read/Write protection of Sector62 */
615 #define OB_PCROP2_PAGES1008TO1023 ((uint32_t)0x80000000) /* PC Read/Write protection of Sector63 */
616
617 #define OB_PCROP2_ALLPAGES ((uint32_t)0xFFFFFFFF) /*!< PC Read/Write protection of all Sectors */
618
619 /**
620 * @}
621 */
622
623 #endif /* STM32L151xC || STM32L152xC || STM32L162xC */
624
625 /** @defgroup FLASHEx_Type_Erase_Data FLASHEx Type Erase Data
626 * @{
627 */
628 #define TYPEERASEDATA_BYTE ((uint32_t)0x00) /*!<Erase byte (8-bit) at a specified address.*/
629 #define TYPEERASEDATA_HALFWORD ((uint32_t)0x01) /*!<Erase a half-word (16-bit) at a specified address.*/
630 #define TYPEERASEDATA_WORD ((uint32_t)0x02) /*!<Erase a word (32-bit) at a specified address.*/
631
632 #define IS_TYPEERASEDATA(__VALUE__) (((__VALUE__) == TYPEERASEDATA_BYTE) || \
633 ((__VALUE__) == TYPEERASEDATA_HALFWORD) || \
634 ((__VALUE__) == TYPEERASEDATA_WORD))
635 /**
636 * @}
637 */
638
639 /** @defgroup FLASHEx_Type_Program_Data FLASHEx Type Program Data
640 * @{
641 */
642 #define TYPEPROGRAMDATA_BYTE ((uint32_t)0x00) /*!<Program byte (8-bit) at a specified address.*/
643 #define TYPEPROGRAMDATA_HALFWORD ((uint32_t)0x01) /*!<Program a half-word (16-bit) at a specified address.*/
644 #define TYPEPROGRAMDATA_WORD ((uint32_t)0x02) /*!<Program a word (32-bit) at a specified address.*/
645 #define TYPEPROGRAMDATA_FASTBYTE ((uint32_t)0x04) /*!<Fast Program byte (8-bit) at a specified address.*/
646 #define TYPEPROGRAMDATA_FASTHALFWORD ((uint32_t)0x08) /*!<Fast Program a half-word (16-bit) at a specified address.*/
647 #define TYPEPROGRAMDATA_FASTWORD ((uint32_t)0x10) /*!<Fast Program a word (32-bit) at a specified address.*/
648
649 #define IS_TYPEPROGRAMDATA(__VALUE__) (((__VALUE__) == TYPEPROGRAMDATA_BYTE) || \
650 ((__VALUE__) == TYPEPROGRAMDATA_HALFWORD) || \
651 ((__VALUE__) == TYPEPROGRAMDATA_WORD) || \
652 ((__VALUE__) == TYPEPROGRAMDATA_FASTBYTE) || \
653 ((__VALUE__) == TYPEPROGRAMDATA_FASTHALFWORD) || \
654 ((__VALUE__) == TYPEPROGRAMDATA_FASTWORD))
655 /**
656 * @}
657 */
658
659
660 /** @defgroup FLASHEx_Address FLASHEx Address
661 * @{
662 */
663 #if defined(STM32L100xB) || defined (STM32L151xB) || defined (STM32L152xB) || \
664 defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA)
665
666 /******* Devices with FLASH 128K *******/
667 #define FLASH_NBPAGES_MAX 512 /* 512 pages from page 0 to page 511 */
668
669 #elif defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
670 defined (STM32L151xCA) || defined (STM32L152xCA) || defined (STM32L162xCA)
671
672 /******* Devices with FLASH 256K *******/
673 #define FLASH_NBPAGES_MAX 1025 /* 1025 pages from page 0 to page 1024 */
674
675 #elif defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
676
677 /******* Devices with FLASH 384K *******/
678 #define FLASH_NBPAGES_MAX 1536 /* 1536 pages from page 0 to page 1535 */
679
680 #elif defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
681
682 /******* Devices with FLASH 512K *******/
683 #define FLASH_NBPAGES_MAX 2048 /* 2048 pages from page 0 to page 2047 */
684
685 #endif /* STM32L100xB || STM32L151xB || STM32L152xB || STM32L100xBA || STM32L151xBA || STM32L152xBA */
686
687 #define IS_FLASH_DATA_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_EEPROM_BASE) && ((__ADDRESS__) <= FLASH_EEPROM_END))
688
689 #if defined(STM32L100xB) || defined (STM32L151xB) || defined (STM32L152xB) || \
690 defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || \
691 defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
692 defined (STM32L151xCA) || defined (STM32L152xCA) || defined (STM32L162xCA)
693
694 #define IS_FLASH_PROGRAM_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_END))
695
696 #else /*STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
697
698 #define IS_FLASH_PROGRAM_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_BANK2_END))
699 #define IS_FLASH_PROGRAM_BANK1_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_BANK1_END))
700 #define IS_FLASH_PROGRAM_BANK2_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BANK2_BASE) && ((__ADDRESS__) <= FLASH_BANK2_END))
701
702 #endif /* STM32L100xB || STM32L151xB || STM32L152xB || STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L152xCA || STM32L162xCA */
703
704 #define IS_NBPAGES(_PAGES_) (((_PAGES_) >= 1) && ((_PAGES_) <= FLASH_NBPAGES_MAX))
705
706 /**
707 * @}
708 */
709
710 /** @defgroup FLASHEx_Flags FLASHEx Flags
711 * @{
712 */
713
714 /* Cat2 & Cat3*/
715 #if defined (STM32L151xBA) || defined (STM32L152xBA) || \
716 defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC)
717
718 #define FLASH_FLAG_RDERR FLASH_SR_RDERR /*!< Read protected error flag */
719
720 #endif /* STM32L151xBA || STM32L152xBA || STM32L151xC || STM32L152xC || STM32L162xC */
721
722 /* Cat3, Cat4 & Cat5*/
723 #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
724 defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
725 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
726
727 #define FLASH_FLAG_OPTVERRUSR FLASH_SR_OPTVERRUSR /*!< FLASH Option User Validity error flag */
728
729 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
730
731 /* Cat1*/
732 #if defined(STM32L100xB) || defined (STM32L151xB) || defined (STM32L152xB) || defined (STM32L100xBA)
733
734 #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \
735 FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR)
736
737 #endif /* STM32L100xB || STM32L151xB || STM32L152xB || STM32L100xBA */
738
739 /* RDERR only for STM32L151xBA & STM32L152xBA (Cat2)*/
740 #if defined (STM32L151xBA) || defined (STM32L152xBA)
741
742 #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \
743 FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \
744 FLASH_FLAG_RDERR)
745
746 #endif /* STM32L151xBA || STM32L152xBA */
747
748 /* FLASH_FLAG_OPTVERRUSR & RDERR only for STM32L151xC, STM32L152xC & STM32L152xBA (Cat3) */
749 #if defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC)
750
751 #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \
752 FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \
753 FLASH_FLAG_OPTVERRUSR | FLASH_FLAG_RDERR)
754
755 #endif /* STM32L151xC || STM32L152xC || STM32L162xC */
756
757 /* FLASH_FLAG_OPTVERRUSR only for STM32L100xC (Cat3) */
758 #if defined (STM32L100xC)
759
760 #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \
761 FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \
762 FLASH_FLAG_OPTVERRUSR)
763
764 #endif /* STM32L100xC */
765
766 /* Cat4 & Cat5 */
767 #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
768 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
769
770 #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \
771 FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \
772 FLASH_FLAG_OPTVERRUSR)
773
774 #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
775
776 /**
777 * @}
778 */
779
780 #if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD) || \
781 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
782
783 /** @defgroup FLASHEx_Option_Bytes_BOOT FLASHEx Option Bytes BOOT
784 * @{
785 */
786
787 #define OB_BOOT_BANK2 ((uint8_t)0x00) /*!< At startup, if boot pins are set in boot from user Flash position
788 and this parameter is selected the device will boot from Bank 2
789 or Bank 1, depending on the activation of the bank */
790 #define OB_BOOT_BANK1 ((uint8_t)(FLASH_OBR_nRST_BFB2 >> 16)) /*!< At startup, if boot pins are set in boot from user Flash position
791 and this parameter is selected the device will boot from Bank1(Default) */
792 #define IS_OB_BOOT_BANK(__BANK__) (((__BANK__) == OB_BOOT_BANK2) || ((__BANK__) == OB_BOOT_BANK1))
793
794 /**
795 * @}
796 */
797 #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
798
799 /**
800 * @}
801 */
802
803 /* Exported macro ------------------------------------------------------------*/
804
805 /** @defgroup FLASHEx_Exported_Macros FLASHEx Exported Macros
806 * @{
807 */
808
809 /**
810 * @brief Set the FLASH Latency.
811 * @param __LATENCY__: FLASH Latency
812 * This parameter can be one of the following values:
813 * @arg FLASH_LATENCY_0: FLASH Zero Latency cycle
814 * @arg FLASH_LATENCY_1: FLASH One Latency cycle
815 * @retval none
816 */
817 #define __HAL_FLASH_SET_LATENCY(__LATENCY__) do { \
818 if ((__LATENCY__) == FLASH_LATENCY_1) {__HAL_FLASH_ACC64_ENABLE();} \
819 MODIFY_REG((FLASH->ACR), FLASH_ACR_LATENCY, (__LATENCY__)); \
820 } while(0)
821
822 /**
823 * @brief Get the FLASH Latency.
824 * @retval FLASH Latency
825 * This parameter can be one of the following values:
826 * @arg FLASH_LATENCY_0: FLASH Zero Latency cycle
827 * @arg FLASH_LATENCY_1: FLASH One Latency cycle
828 */
829 #define __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY))
830
831 /**
832 * @brief Enable the FLASH 64-bit access.
833 * @note Read access 64 bit is used.
834 * @note This bit cannot be written at the same time as the LATENCY and
835 * PRFTEN bits.
836 * @retval none
837 */
838 #define __HAL_FLASH_ACC64_ENABLE() (SET_BIT((FLASH->ACR), FLASH_ACR_ACC64))
839
840 /**
841 * @brief Disable the FLASH 64-bit access.
842 * @note Read access 32 bit is used
843 * @note To reset this bit, the LATENCY should be zero wait state and the
844 * prefetch off.
845 * @retval none
846 */
847 #define __HAL_FLASH_ACC64_DISABLE() (CLEAR_BIT((FLASH->ACR), FLASH_ACR_ACC64))
848
849 /**
850 * @brief Enable the FLASH prefetch buffer.
851 * @retval none
852 */
853 #define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() do { __HAL_FLASH_ACC64_ENABLE(); \
854 SET_BIT((FLASH->ACR), FLASH_ACR_PRFTEN); \
855 } while(0)
856
857 /**
858 * @brief Disable the FLASH prefetch buffer.
859 * @retval none
860 */
861 #define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() CLEAR_BIT((FLASH->ACR), FLASH_ACR_PRFTEN)
862
863 /**
864 * @brief Enable the FLASH power down during Sleep mode
865 * @retval none
866 */
867 #define __HAL_FLASH_SLEEP_POWERDOWN_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD)
868
869 /**
870 * @brief Disable the FLASH power down during Sleep mode
871 * @retval none
872 */
873 #define __HAL_FLASH_SLEEP_POWERDOWN_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD)
874
875 /**
876 * @brief Macro to enable or disable the Flash Run power down mode.
877 * @note Writing this bit to 0 this bit, automatically the keys are
878 * loss and a new unlock sequence is necessary to re-write it to 1.
879 */
880
881 #define __HAL_FLASH_POWER_DOWN_ENABLE() do { FLASH->PDKEYR = FLASH_PDKEY1; \
882 FLASH->PDKEYR = FLASH_PDKEY2; \
883 SET_BIT((FLASH->ACR), FLASH_ACR_RUN_PD); \
884 } while (0)
885
886 #define __HAL_FLASH_POWER_DOWN_DISABLE() do { FLASH->PDKEYR = FLASH_PDKEY1; \
887 FLASH->PDKEYR = FLASH_PDKEY2; \
888 CLEAR_BIT((FLASH->ACR), FLASH_ACR_RUN_PD); \
889 } while (0)
890
891 /**
892 * @}
893 */
894
895 /* Exported functions --------------------------------------------------------*/
896
897 /** @addtogroup FLASHEx_Exported_Functions
898 * @{
899 */
900
901 /** @addtogroup FLASHEx_Exported_Functions_Group1
902 * @{
903 */
904
905 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError);
906 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
907
908 /**
909 * @}
910 */
911
912 /** @addtogroup FLASHEx_Exported_Functions_Group2
913 * @{
914 */
915
916 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
917 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
918
919 #if defined (STM32L151xBA) || defined (STM32L152xBA) || \
920 defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
921 defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD) || \
922 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
923
924 HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
925 void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
926
927 #endif /* STM32L151xBA || STM32L152xBA || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
928
929 #if defined (STM32L151xBA) || defined (STM32L152xBA) || \
930 defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC)
931
932 HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void);
933 HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void);
934
935 #endif /* STM32L151xBA || STM32L152xBA || STM32L151xC || STM32L152xC || STM32L162xC */
936
937 /**
938 * @}
939 */
940
941 /** @addtogroup FLASHEx_Exported_Functions_Group3
942 * @{
943 */
944
945 HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Unlock(void);
946 HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Lock(void);
947
948 HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Erase(uint32_t TypeErase, uint32_t Address);
949 HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Program(uint32_t TypeProgram, uint32_t Address, uint32_t Data);
950 void HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram(void);
951 void HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram(void);
952
953 /**
954 * @}
955 */
956
957 /**
958 * @}
959 */
960
961 /**
962 * @}
963 */
964
965 /**
966 * @}
967 */
968
969 #ifdef __cplusplus
970 }
971 #endif
972
973 #endif /* __STM32L1xx_HAL_FLASH_EX_H */
974
975 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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