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1 /**
2 ******************************************************************************
3 * @file stm32l1xx_hal_gpio.c
4 * @author MCD Application Team
5 * @version V1.0.0
6 * @date 5-September-2014
7 * @brief GPIO HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the General Purpose Input/Output (GPIO) peripheral:
10 * + Initialization and de-initialization functions
11 * + IO operation functions
12 *
13 @verbatim
14 ==============================================================================
15 ##### GPIO Peripheral features #####
16 ==============================================================================
17 [..]
18 Each port bit of the general-purpose I/O (GPIO) ports can be individually
19 configured by software in several modes:
20 (+) Input mode
21 (+) Analog mode
22 (+) Output mode
23 (+) Alternate function mode
24 (+) External interrupt/event lines
25
26 [..]
27 During and just after reset, the alternate functions and external interrupt
28 lines are not active and the I/O ports are configured in input floating mode.
29
30 [..]
31 All GPIO pins have weak internal pull-up and pull-down resistors, which can be
32 activated or not.
33
34 [..]
35 In Output or Alternate mode, each IO can be configured on open-drain or push-pull
36 type and the IO speed can be selected depending on the VDD value.
37
38 [..]
39 The microcontroller IO pins are connected to onboard peripherals/modules through a
40 multiplexer that allows only one peripheral\92s alternate function (AF) connected
41 to an IO pin at a time. In this way, there can be no conflict between peripherals
42 sharing the same IO pin.
43
44 [..]
45 All ports have external interrupt/event capability. To use external interrupt
46 lines, the port must be configured in input mode. All available GPIO pins are
47 connected to the 16 external interrupt/event lines from EXTI0 to EXTI15.
48
49 [..]
50 The external interrupt/event controller consists of up to 23 edge detectors
51 (16 lines are connected to GPIO) for generating event/interrupt requests (each
52 input line can be independently configured to select the type (interrupt or event)
53 and the corresponding trigger event (rising or falling or both). Each line can
54 also be masked independently.
55
56 ##### How to use this driver #####
57 ==============================================================================
58 [..]
59 (#) Enable the GPIO AHB clock using the following function : __GPIOx_CLK_ENABLE().
60
61 (#) Configure the GPIO pin(s) using HAL_GPIO_Init().
62 (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure
63 (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef
64 structure.
65 (++) In case of Output or alternate function mode selection: the speed is
66 configured through "Speed" member from GPIO_InitTypeDef structure
67 (++) If alternate mode is selected, the alternate function connected to the IO
68 is configured through "Alternate" member from GPIO_InitTypeDef structure
69 (++) Analog mode is required when a pin is to be used as ADC channel
70 or DAC output.
71 (++) In case of external interrupt/event selection the "Mode" member from
72 GPIO_InitTypeDef structure select the type (interrupt or event) and
73 the corresponding trigger event (rising or falling or both).
74
75 (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority
76 mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using
77 HAL_NVIC_EnableIRQ().
78
79 (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin().
80
81 (#) To set/reset the level of a pin configured in output mode use
82 HAL_GPIO_WritePin()/HAL_GPIO_TogglePin().
83
84 (#) To lock pin configuration until next reset use HAL_GPIO_LockPin().
85
86 (#) During and just after reset, the alternate functions are not
87 active and the GPIO pins are configured in input floating mode (except JTAG
88 pins).
89
90 (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose
91 (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has
92 priority over the GPIO function.
93
94 (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as
95 general purpose PH0 and PH1, respectively, when the HSE oscillator is off.
96 The HSE has priority over the GPIO function.
97
98 @endverbatim
99 ******************************************************************************
100 * @attention
101 *
102 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
103 *
104 * Redistribution and use in source and binary forms, with or without modification,
105 * are permitted provided that the following conditions are met:
106 * 1. Redistributions of source code must retain the above copyright notice,
107 * this list of conditions and the following disclaimer.
108 * 2. Redistributions in binary form must reproduce the above copyright notice,
109 * this list of conditions and the following disclaimer in the documentation
110 * and/or other materials provided with the distribution.
111 * 3. Neither the name of STMicroelectronics nor the names of its contributors
112 * may be used to endorse or promote products derived from this software
113 * without specific prior written permission.
114 *
115 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
116 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
117 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
118 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
119 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
120 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
121 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
122 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
123 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
124 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
125 *
126 ******************************************************************************
127 */
128
129 /* Includes ------------------------------------------------------------------*/
130 #include "stm32l1xx_hal.h"
131
132 /** @addtogroup STM32L1xx_HAL_Driver
133 * @{
134 */
135
136 /** @defgroup GPIO GPIO
137 * @brief GPIO HAL module driver
138 * @{
139 */
140
141 #ifdef HAL_GPIO_MODULE_ENABLED
142
143 /* Private typedef -----------------------------------------------------------*/
144 /* Private define ------------------------------------------------------------*/
145 /** @defgroup GPIO_Private_Constants GPIO Private Constants
146 * @{
147 */
148
149 #define GPIO_MODE ((uint32_t)0x00000003)
150 #define EXTI_MODE ((uint32_t)0x10000000)
151 #define GPIO_MODE_IT ((uint32_t)0x00010000)
152 #define GPIO_MODE_EVT ((uint32_t)0x00020000)
153 #define RISING_EDGE ((uint32_t)0x00100000)
154 #define FALLING_EDGE ((uint32_t)0x00200000)
155 #define GPIO_OUTPUT_TYPE ((uint32_t)0x00000010)
156 #define GPIO_NUMBER ((uint32_t)16)
157
158 /**
159 * @}
160 */
161
162 /* Private macro -------------------------------------------------------------*/
163 /* Private variables ---------------------------------------------------------*/
164 /* Private function prototypes -----------------------------------------------*/
165 /* Private functions ---------------------------------------------------------*/
166
167 /** @defgroup GPIO_Exported_Functions GPIO Exported Functions
168 * @{
169 */
170
171 /** @defgroup GPIO_Exported_Functions_Group1 Initialization/de-initialization functions
172 * @brief Initialization and Configuration functions
173 *
174 @verbatim
175 ===============================================================================
176 ##### Initialization and de-initialization functions #####
177 ===============================================================================
178
179 @endverbatim
180 * @{
181 */
182
183 /**
184 * @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init.
185 * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
186 * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
187 * the configuration information for the specified GPIO peripheral.
188 * @retval None
189 */
190 void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
191 {
192 uint32_t position;
193 uint32_t ioposition = 0x00;
194 uint32_t iocurrent = 0x00;
195 uint32_t temp = 0x00;
196
197 /* Check the parameters */
198 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
199 assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
200 assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
201 assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
202
203 /* Configure the port pins */
204 for (position = 0; position < GPIO_NUMBER; position++)
205 {
206 /* Get the IO position */
207 ioposition = ((uint32_t)0x01) << position;
208 /* Get the current IO position */
209 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
210
211 if (iocurrent == ioposition)
212 {
213 /*--------------------- GPIO Mode Configuration ------------------------*/
214 /* In case of Alternate function mode selection */
215 if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
216 {
217 /* Check the Alternate function parameter */
218 assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
219 /* Configure Alternate function mapped with the current IO */
220 /* Identify AFRL or AFRH register based on IO position*/
221 temp = GPIOx->AFR[position >> 3];
222 CLEAR_BIT(temp, (uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ;
223 SET_BIT(temp, (uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07) * 4));
224 GPIOx->AFR[position >> 3] = temp;
225 }
226
227 /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
228 temp = GPIOx->MODER;
229 CLEAR_BIT(temp, GPIO_MODER_MODER0 << (position * 2));
230 SET_BIT(temp, (GPIO_Init->Mode & GPIO_MODE) << (position * 2));
231 GPIOx->MODER = temp;
232
233 /* In case of Output or Alternate function mode selection */
234 if ((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
235 (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
236 {
237 /* Check the Speed parameter */
238 assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
239 /* Configure the IO Speed */
240 temp = GPIOx->OSPEEDR;
241 CLEAR_BIT(temp, GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
242 SET_BIT(temp, GPIO_Init->Speed << (position * 2));
243 GPIOx->OSPEEDR = temp;
244
245 /* Configure the IO Output Type */
246 temp = GPIOx->OTYPER;
247 CLEAR_BIT(temp, GPIO_OTYPER_OT_0 << position) ;
248 SET_BIT(temp, ((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4) << position);
249 GPIOx->OTYPER = temp;
250 }
251
252 /* Activate the Pull-up or Pull down resistor for the current IO */
253 temp = GPIOx->PUPDR;
254 CLEAR_BIT(temp, GPIO_PUPDR_PUPDR0 << (position * 2));
255 SET_BIT(temp, (GPIO_Init->Pull) << (position * 2));
256 GPIOx->PUPDR = temp;
257
258 /*--------------------- EXTI Mode Configuration ------------------------*/
259 /* Configure the External Interrupt or event for the current IO */
260 if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
261 {
262 /* Enable SYSCFG Clock */
263 __SYSCFG_CLK_ENABLE();
264
265 temp = SYSCFG->EXTICR[position >> 2];
266 CLEAR_BIT(temp, ((uint32_t)0x0F) << (4 * (position & 0x03)));
267 SET_BIT(temp, (GET_GPIO_INDEX(GPIOx)) << (4 * (position & 0x03)));
268 SYSCFG->EXTICR[position >> 2] = temp;
269
270 /* Clear EXTI line configuration */
271 temp = EXTI->IMR;
272 CLEAR_BIT(temp, (uint32_t)iocurrent);
273 if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
274 {
275 SET_BIT(temp, iocurrent);
276 }
277 EXTI->IMR = temp;
278
279 temp = EXTI->EMR;
280 CLEAR_BIT(temp, (uint32_t)iocurrent);
281 if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
282 {
283 SET_BIT(temp, iocurrent);
284 }
285 EXTI->EMR = temp;
286
287 /* Clear Rising Falling edge configuration */
288 temp = EXTI->RTSR;
289 CLEAR_BIT(temp, (uint32_t)iocurrent);
290 if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
291 {
292 SET_BIT(temp, iocurrent);
293 }
294 EXTI->RTSR = temp;
295
296 temp = EXTI->FTSR;
297 CLEAR_BIT(temp, (uint32_t)iocurrent);
298 if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
299 {
300 SET_BIT(temp, iocurrent);
301 }
302 EXTI->FTSR = temp;
303 }
304 }
305 }
306 }
307
308 /**
309 * @brief De-initializes the GPIOx peripheral registers to their default reset values.
310 * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
311 * @param GPIO_Pin: specifies the port bit to be written.
312 * This parameter can be one of GPIO_PIN_x where x can be (0..15).
313 * @retval None
314 */
315 void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
316 {
317 uint32_t position;
318 uint32_t ioposition = 0x00;
319 uint32_t iocurrent = 0x00;
320 uint32_t tmp = 0x00;
321
322 /* Check the parameters */
323 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
324
325 /* Configure the port pins */
326 for (position = 0; position < GPIO_NUMBER; position++)
327 {
328 /* Get the IO position */
329 ioposition = ((uint32_t)0x01) << position;
330 /* Get the current IO position */
331 iocurrent = (GPIO_Pin) & ioposition;
332
333 if (iocurrent == ioposition)
334 {
335 /*------------------------- GPIO Mode Configuration --------------------*/
336 /* Configure IO Direction in Input Floting Mode */
337 CLEAR_BIT(GPIOx->MODER, GPIO_MODER_MODER0 << (position * 2));
338
339 /* Configure the default Alternate Function in current IO */
340 CLEAR_BIT(GPIOx->AFR[position >> 3], (uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ;
341
342 /* Configure the default value for IO Speed */
343 CLEAR_BIT(GPIOx->OSPEEDR, GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
344
345 /* Configure the default value IO Output Type */
346 CLEAR_BIT(GPIOx->OTYPER, GPIO_OTYPER_OT_0 << position) ;
347
348 /* Deactivate the Pull-up oand Pull-down resistor for the current IO */
349 CLEAR_BIT(GPIOx->PUPDR, GPIO_PUPDR_PUPDR0 << (position * 2));
350
351
352 /*------------------------- EXTI Mode Configuration --------------------*/
353 /* Configure the External Interrupt or event for the current IO */
354 tmp = ((uint32_t)0x0F) << (4 * (position & 0x03));
355 CLEAR_BIT(SYSCFG->EXTICR[position >> 2], tmp);
356
357 /* Clear EXTI line configuration */
358 CLEAR_BIT(EXTI->IMR, (uint32_t)iocurrent);
359 CLEAR_BIT(EXTI->EMR, (uint32_t)iocurrent);
360
361 /* Clear Rising Falling edge configuration */
362 CLEAR_BIT(EXTI->RTSR, (uint32_t)iocurrent);
363 CLEAR_BIT(EXTI->FTSR, (uint32_t)iocurrent);
364 }
365 }
366 }
367
368 /**
369 * @}
370 */
371
372 /** @defgroup GPIO_Exported_Functions_Group2 IO operation functions
373 * @brief GPIO Read and Write
374 *
375 @verbatim
376 ===============================================================================
377 ##### IO operation functions #####
378 ===============================================================================
379
380 @endverbatim
381 * @{
382 */
383
384 /**
385 * @brief Reads the specified input port pin.
386 * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
387 * @param GPIO_Pin: specifies the port bit to read.
388 * This parameter can be GPIO_PIN_x where x can be (0..15).
389 * @retval The input port pin value.
390 */
391 GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
392 {
393 GPIO_PinState bitstatus;
394
395 /* Check the parameters */
396 assert_param(IS_GPIO_PIN(GPIO_Pin));
397
398 if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
399 {
400 bitstatus = GPIO_PIN_SET;
401 }
402 else
403 {
404 bitstatus = GPIO_PIN_RESET;
405 }
406 return bitstatus;
407 }
408
409 /**
410 * @brief Sets or clears the selected data port bit.
411 *
412 * @note This function uses GPIOx_BSRR register to allow atomic read/modify
413 * accesses. In this way, there is no risk of an IRQ occurring between
414 * the read and the modify access.
415 *
416 * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
417 * @param GPIO_Pin: specifies the port bit to be written.
418 * This parameter can be one of GPIO_PIN_x where x can be (0..15).
419 * @param PinState: specifies the value to be written to the selected bit.
420 * This parameter can be one of the GPIO_PinState enum values:
421 * @arg GPIO_BIT_RESET: to clear the port pin
422 * @arg GPIO_BIT_SET: to set the port pin
423 * @retval None
424 */
425 void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
426 {
427 /* Check the parameters */
428 assert_param(IS_GPIO_PIN(GPIO_Pin));
429 assert_param(IS_GPIO_PIN_ACTION(PinState));
430
431 if(PinState != GPIO_PIN_RESET)
432 {
433 GPIOx->BSRR = GPIO_Pin;
434 }
435 else
436 {
437 GPIOx->BSRR = (uint32_t)GPIO_Pin << 16;
438 }
439 }
440
441 /**
442 * @brief Toggles the specified GPIO pin
443 * @param GPIOx: where x can be (A..Gdepending on device used) to select the GPIO peripheral for STM32L1XX family devices
444 * @param GPIO_Pin: Specifies the pins to be toggled.
445 * @retval None
446 */
447 void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
448 {
449 /* Check the parameters */
450 assert_param(IS_GPIO_PIN(GPIO_Pin));
451
452 GPIOx->ODR ^= GPIO_Pin;
453 }
454
455 /**
456 * @brief Locks GPIO Pins configuration registers.
457 * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR,
458 * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH.
459 * @note The configuration of the locked GPIO pins can no longer be modified
460 * until the next reset.
461 * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
462 * @param GPIO_Pin: specifies the port bit to be locked.
463 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
464 * @retval None
465 */
466 HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
467 {
468 __IO uint32_t tmp = GPIO_LCKR_LCKK;
469
470 /* Check the parameters */
471 assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx));
472 assert_param(IS_GPIO_PIN(GPIO_Pin));
473
474 /* Apply lock key write sequence */
475 SET_BIT(tmp, GPIO_Pin);
476 /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
477 GPIOx->LCKR = tmp;
478 /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */
479 GPIOx->LCKR = GPIO_Pin;
480 /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
481 GPIOx->LCKR = tmp;
482 /* Read LCKK bit*/
483 tmp = GPIOx->LCKR;
484
485 if((uint32_t)(GPIOx->LCKR & GPIO_LCKR_LCKK))
486 {
487 return HAL_OK;
488 }
489 else
490 {
491 return HAL_ERROR;
492 }
493 }
494
495 /**
496 * @brief This function handles EXTI interrupt request.
497 * @param GPIO_Pin: Specifies the pins connected EXTI line
498 * @retval None
499 */
500 void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
501 {
502 /* EXTI line interrupt detected */
503 if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET)
504 {
505 __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin);
506 HAL_GPIO_EXTI_Callback(GPIO_Pin);
507 }
508 }
509
510 /**
511 * @brief EXTI line detection callback
512 * @param GPIO_Pin: Specifies the pins connected EXTI line
513 * @retval None
514 */
515 __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
516 {
517 /* NOTE : This function Should not be modified, when the callback is needed,
518 the HAL_GPIO_EXTI_Callback could be implemented in the user file
519 */
520 }
521
522 /**
523 * @}
524 */
525
526
527 /**
528 * @}
529 */
530
531 #endif /* HAL_GPIO_MODULE_ENABLED */
532 /**
533 * @}
534 */
535
536 /**
537 * @}
538 */
539
540 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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