tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_i2s.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32l1xx_hal_i2s.h
   4   * @author  MCD Application Team
   5   * @version V1.0.0
   6   * @date    5-September-2014
   7   * @brief   Header file of I2S HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32L1xx_HAL_I2S_H
  40 #define __STM32L1xx_HAL_I2S_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 #if defined(STM32L100xC) || \
  47     defined(STM32L151xC) || defined(STM32L151xCA) || defined(STM32L151xD) || defined(STM32L151xE) || \
  48     defined(STM32L152xC) || defined(STM32L152xCA) || defined(STM32L152xD) || defined(STM32L152xE) || defined(STM32L151xE) || \
  49     defined(STM32L162xC) || defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L162xE)
  50
  51 /* Includes ------------------------------------------------------------------*/
  52 #include "stm32l1xx_hal_def.h"
  53
  54 /** @addtogroup STM32L1xx_HAL_Driver
  55   * @{
  56   */
  57
  58 /** @addtogroup I2S
  59   * @{
  60   */
  61
  62 /* Exported types ------------------------------------------------------------*/
  63 /** @defgroup I2S_Exported_Types I2S Exported Types
  64   * @{
  65   */
  66
  67 /**
  68   * @brief I2S Init structure definition
  69   */
  70 typedef struct
  71 {
  72   uint32_t Mode;         /*!< Specifies the I2S operating mode.
  73                               This parameter can be a value of @ref I2S_Mode */
  74
  75   uint32_t Standard;     /*!< Specifies the standard used for the I2S communication.
  76                               This parameter can be a value of @ref I2S_Standard */
  77
  78   uint32_t DataFormat;   /*!< Specifies the data format for the I2S communication.
  79                               This parameter can be a value of @ref I2S_Data_Format */
  80
  81   uint32_t MCLKOutput;   /*!< Specifies whether the I2S MCLK output is enabled or not.
  82                               This parameter can be a value of @ref I2S_MCLK_Output */
  83
  84   uint32_t AudioFreq;    /*!< Specifies the frequency selected for the I2S communication.
  85                               This parameter can be a value of @ref I2S_Audio_Frequency */
  86
  87   uint32_t CPOL;         /*!< Specifies the idle state of the I2S clock.
  88                               This parameter can be a value of @ref I2S_Clock_Polarity */
  89
  90 }I2S_InitTypeDef;
  91
  92 /**
  93   * @brief  HAL State structures definition
  94   */
  95 typedef enum
  96 {
  97   HAL_I2S_STATE_RESET      = 0x00,  /*!< I2S not yet initialized or disabled                */
  98   HAL_I2S_STATE_READY      = 0x01,  /*!< I2S initialized and ready for use                  */
  99   HAL_I2S_STATE_BUSY       = 0x02,  /*!< I2S internal process is ongoing                    */
 100   HAL_I2S_STATE_BUSY_TX    = 0x12,  /*!< Data Transmission process is ongoing               */
 101   HAL_I2S_STATE_BUSY_RX    = 0x22,  /*!< Data Reception process is ongoing                  */
 102   HAL_I2S_STATE_TIMEOUT    = 0x03,  /*!< I2S pause state: used in case of DMA               */
 103   HAL_I2S_STATE_ERROR      = 0x04   /*!< I2S error state                                    */
 104 }HAL_I2S_StateTypeDef;
 105
 106 /**
 107   * @brief  HAL I2S Error Code structure definition
 108   */
 109 typedef enum
 110 {
 111   HAL_I2S_ERROR_NONE      = 0x00,    /*!< No error                    */
 112   HAL_I2S_ERROR_UDR       = 0x01,    /*!< I2S Underrun error          */
 113   HAL_I2S_ERROR_OVR       = 0x02,    /*!< I2S Overrun error           */
 114   HAL_I2S_ERROR_FRE       = 0x04,    /*!< I2S Frame format error      */
 115   HAL_I2S_ERROR_DMA       = 0x08     /*!< DMA transfer error          */
 116 }HAL_I2S_ErrorTypeDef;
 117
 118 /**
 119   * @brief I2S handle Structure definition
 120   */
 121 typedef struct
 122 {
 123   SPI_TypeDef                *Instance;    /* I2S registers base address        */
 124
 125   I2S_InitTypeDef            Init;         /* I2S communication parameters      */
 126
 127   uint16_t                   *pTxBuffPtr;  /* Pointer to I2S Tx transfer buffer */
 128
 129   __IO uint16_t              TxXferSize;   /* I2S Tx transfer size              */
 130
 131   __IO uint16_t              TxXferCount;  /* I2S Tx transfer Counter           */
 132
 133   uint16_t                   *pRxBuffPtr;  /* Pointer to I2S Rx transfer buffer */
 134
 135   __IO uint16_t              RxXferSize;   /* I2S Rx transfer size              */
 136
 137   __IO uint16_t              RxXferCount;  /* I2S Rx transfer counter
 138                                               (This field is initialized at the
 139                                                same value as transfer size at the
 140                                                beginning of the transfer and
 141                                                decremented when a sample is received.
 142                                                NbSamplesReceived = RxBufferSize-RxBufferCount) */
 143
 144   DMA_HandleTypeDef          *hdmatx;      /* I2S Tx DMA handle parameters      */
 145
 146   DMA_HandleTypeDef          *hdmarx;      /* I2S Rx DMA handle parameters      */
 147
 148   __IO HAL_LockTypeDef       Lock;         /* I2S locking object                */
 149
 150   __IO HAL_I2S_StateTypeDef  State;        /* I2S communication state           */
 151
 152   __IO HAL_I2S_ErrorTypeDef  ErrorCode;    /* I2S Error code                    */
 153
 154 }I2S_HandleTypeDef;
 155 /**
 156   * @}
 157   */
 158
 159 /* Exported constants --------------------------------------------------------*/
 160 /** @defgroup I2S_Exported_Constants I2S Exported Constants
 161   * @{
 162   */
 163
 164 /** @defgroup I2S_Mode I2S Mode
 165   * @{
 166   */
 167 #define I2S_MODE_SLAVE_TX                ((uint32_t)0x00000000)
 168 #define I2S_MODE_SLAVE_RX                ((uint32_t)0x00000100)
 169 #define I2S_MODE_MASTER_TX               ((uint32_t)0x00000200)
 170 #define I2S_MODE_MASTER_RX               ((uint32_t)0x00000300)
 171
 172 #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX)  || \
 173                            ((MODE) == I2S_MODE_SLAVE_RX)  || \
 174                            ((MODE) == I2S_MODE_MASTER_TX) || \
 175                            ((MODE) == I2S_MODE_MASTER_RX))
 176 /**
 177   * @}
 178   */
 179
 180 /** @defgroup I2S_Standard I2S Standard
 181   * @{
 182   */
 183 #define I2S_STANDARD_PHILIPS             ((uint32_t)0x00000000)
 184 #define I2S_STANDARD_MSB                 ((uint32_t) SPI_I2SCFGR_I2SSTD_0)
 185 #define I2S_STANDARD_LSB                 ((uint32_t) SPI_I2SCFGR_I2SSTD_1)
 186 #define I2S_STANDARD_PCM_SHORT           ((uint32_t)(SPI_I2SCFGR_I2SSTD_0 |\
 187                                                      SPI_I2SCFGR_I2SSTD_1))
 188 #define I2S_STANDARD_PCM_LONG            ((uint32_t)(SPI_I2SCFGR_I2SSTD_0 |\
 189                                                      SPI_I2SCFGR_I2SSTD_1 |\
 190                                                      SPI_I2SCFGR_PCMSYNC))
 191
 192 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS)   || \
 193                                    ((STANDARD) == I2S_STANDARD_MSB)       || \
 194                                    ((STANDARD) == I2S_STANDARD_LSB)       || \
 195                                    ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
 196                                    ((STANDARD) == I2S_STANDARD_PCM_LONG))
 197 /** @defgroup I2S_Legacy I2S Legacy
 198   * @{
 199   */
 200 #define I2S_STANDARD_PHILLIPS      I2S_STANDARD_PHILIPS
 201 /**
 202   * @}
 203   */
 204
 205 /**
 206   * @}
 207   */
 208
 209 /** @defgroup I2S_Data_Format I2S Data Format
 210   * @{
 211   */
 212 #define I2S_DATAFORMAT_16B               ((uint32_t)0x00000000)
 213 #define I2S_DATAFORMAT_16B_EXTENDED      ((uint32_t) SPI_I2SCFGR_CHLEN)
 214 #define I2S_DATAFORMAT_24B               ((uint32_t)(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0))
 215 #define I2S_DATAFORMAT_32B               ((uint32_t)(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1))
 216
 217 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B)          || \
 218                                     ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
 219                                     ((FORMAT) == I2S_DATAFORMAT_24B)          || \
 220                                     ((FORMAT) == I2S_DATAFORMAT_32B))
 221 /**
 222   * @}
 223   */
 224
 225 /** @defgroup I2S_MCLK_Output I2S MCLK Output
 226   * @{
 227   */
 228 #define I2S_MCLKOUTPUT_ENABLE           ((uint32_t)SPI_I2SPR_MCKOE)
 229 #define I2S_MCLKOUTPUT_DISABLE          ((uint32_t)0x00000000)
 230
 231 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \
 232                                     ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE))
 233 /**
 234   * @}
 235   */
 236
 237 /** @defgroup I2S_Audio_Frequency I2S Audio Frequency
 238   * @{
 239   */
 240 #define I2S_AUDIOFREQ_192K               ((uint32_t)192000)
 241 #define I2S_AUDIOFREQ_96K                ((uint32_t)96000)
 242 #define I2S_AUDIOFREQ_48K                ((uint32_t)48000)
 243 #define I2S_AUDIOFREQ_44K                ((uint32_t)44100)
 244 #define I2S_AUDIOFREQ_32K                ((uint32_t)32000)
 245 #define I2S_AUDIOFREQ_22K                ((uint32_t)22050)
 246 #define I2S_AUDIOFREQ_16K                ((uint32_t)16000)
 247 #define I2S_AUDIOFREQ_11K                ((uint32_t)11025)
 248 #define I2S_AUDIOFREQ_8K                 ((uint32_t)8000)
 249 #define I2S_AUDIOFREQ_DEFAULT            ((uint32_t)2)
 250
 251 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K)    && \
 252                                   ((FREQ) <= I2S_AUDIOFREQ_192K)) || \
 253                                   ((FREQ) == I2S_AUDIOFREQ_DEFAULT))
 254 /**
 255   * @}
 256   */
 257
 258 /** @defgroup I2S_Clock_Polarity I2S Clock Polarity
 259   * @{
 260   */
 261 #define I2S_CPOL_LOW                    ((uint32_t)0x00000000)
 262 #define I2S_CPOL_HIGH                   ((uint32_t)SPI_I2SCFGR_CKPOL)
 263
 264 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \
 265                            ((CPOL) == I2S_CPOL_HIGH))
 266 /**
 267   * @}
 268   */
 269
 270 /** @defgroup I2S_Interrupt_configuration_definition I2S Interrupt configuration definition
 271   * @{
 272   */
 273 #define I2S_IT_TXE                      SPI_CR2_TXEIE
 274 #define I2S_IT_RXNE                     SPI_CR2_RXNEIE
 275 #define I2S_IT_ERR                      SPI_CR2_ERRIE
 276 /**
 277   * @}
 278   */
 279
 280 /** @defgroup I2S_Flag_definition I2S Flag definition
 281   * @{
 282   */
 283 #define I2S_FLAG_TXE                    SPI_SR_TXE
 284 #define I2S_FLAG_RXNE                   SPI_SR_RXNE
 285
 286 #define I2S_FLAG_UDR                    SPI_SR_UDR
 287 #define I2S_FLAG_OVR                    SPI_SR_OVR
 288 #define I2S_FLAG_FRE                    SPI_SR_FRE
 289
 290 #define I2S_FLAG_CHSIDE                 SPI_SR_CHSIDE
 291 #define I2S_FLAG_BSY                    SPI_SR_BSY
 292 /**
 293   * @}
 294   */
 295
 296 /**
 297   * @}
 298   */
 299
 300 /* Exported macro ------------------------------------------------------------*/
 301 /** @defgroup I2S_Exported_macros I2S Exported Macros
 302   * @{
 303   */
 304
 305 /** @brief  Reset I2S handle state
 306   * @param  __HANDLE__: specifies the I2S Handle.
 307   * @retval None
 308   */
 309 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
 310
 311 /** @brief  Enable or disable the specified SPI peripheral (in I2S mode).
 312   * @param  __HANDLE__: specifies the I2S Handle.
 313   * @retval None
 314   */
 315 #define __HAL_I2S_ENABLE(__HANDLE__)    (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
 316 #define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
 317
 318 /** @brief  Enable or disable the specified I2S interrupts.
 319   * @param  __HANDLE__: specifies the I2S Handle.
 320   * @param  __INTERRUPT__: specifies the interrupt source to enable or disable.
 321   *         This parameter can be one of the following values:
 322   *            @arg I2S_IT_TXE: Tx buffer empty interrupt enable
 323   *            @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
 324   *            @arg I2S_IT_ERR: Error interrupt enable
 325   * @retval None
 326   */
 327 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__)    (SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
 328 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
 329
 330 /** @brief  Checks if the specified I2S interrupt source is enabled or disabled.
 331   * @param  __HANDLE__: specifies the I2S Handle.
 332   *         This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
 333   * @param  __INTERRUPT__: specifies the I2S interrupt source to check.
 334   *          This parameter can be one of the following values:
 335   *            @arg I2S_IT_TXE: Tx buffer empty interrupt enable
 336   *            @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
 337   *            @arg I2S_IT_ERR: Error interrupt enable
 338   * @retval The new state of __IT__ (TRUE or FALSE).
 339   */
 340 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
 341
 342 /** @brief  Checks whether the specified I2S flag is set or not.
 343   * @param  __HANDLE__: specifies the I2S Handle.
 344   * @param  __FLAG__: specifies the flag to check.
 345   *         This parameter can be one of the following values:
 346   *            @arg I2S_FLAG_RXNE: Receive buffer not empty flag
 347   *            @arg I2S_FLAG_TXE: Transmit buffer empty flag
 348   *            @arg I2S_FLAG_UDR: Underrun flag
 349   *            @arg I2S_FLAG_OVR: Overrun flag
 350   *            @arg I2S_FLAG_FRE: Frame error flag
 351   *            @arg I2S_FLAG_CHSIDE: Channel Side flag
 352   *            @arg I2S_FLAG_BSY: Busy flag
 353   * @retval The new state of __FLAG__ (TRUE or FALSE).
 354   */
 355 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
 356
 357 /** @brief Clears the I2S OVR pending flag.
 358   * @param  __HANDLE__: specifies the I2S Handle.
 359   * @retval None
 360   */
 361 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{__IO uint32_t tmpreg = (__HANDLE__)->Instance->DR;\
 362                                                              tmpreg = (__HANDLE__)->Instance->SR;\
 363                                               }while(0)
 364 /** @brief Clears the I2S UDR pending flag.
 365   * @param  __HANDLE__: specifies the I2S Handle.
 366   * @retval None
 367   */
 368 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__)((__HANDLE__)->Instance->SR)
 369 /**
 370   * @}
 371   */
 372
 373 /* Exported functions --------------------------------------------------------*/
 374 /** @addtogroup I2S_Exported_Functions
 375   * @{
 376   */
 377
 378 /** @addtogroup I2S_Exported_Functions_Group1
 379   * @{
 380   */
 381 /* Initialization/de-initialization functions  ********************************/
 382 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
 383 HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s);
 384 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
 385 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
 386 /**
 387   * @}
 388   */
 389
 390 /** @addtogroup I2S_Exported_Functions_Group2
 391   * @{
 392   */
 393 /* I/O operation functions  ***************************************************/
 394  /* Blocking mode: Polling */
 395 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
 396 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
 397
 398  /* Non-Blocking mode: Interrupt */
 399 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
 400 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
 401 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
 402
 403 /* Non-Blocking mode: DMA */
 404 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
 405 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
 406
 407 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
 408 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
 409 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
 410
 411 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
 412 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
 413 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
 414 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
 415 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
 416 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
 417 /**
 418   * @}
 419   */
 420
 421 /** @addtogroup I2S_Exported_Functions_Group3
 422   * @{
 423   */
 424 /* Peripheral Control and State functions  ************************************/
 425 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
 426 HAL_I2S_ErrorTypeDef HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
 427 /**
 428   * @}
 429   */
 430
 431 /**
 432   * @}
 433   */
 434
 435
 436 /**
 437   * @}
 438   */
 439
 440 /**
 441   * @}
 442   */
 443 #endif /* STM32L100xC ||
 444           STM32L151xC || STM32L151xCA || STM32L151xD || STM32L151xE ||\\
 445           STM32L152xC || STM32L152xCA || STM32L152xD || STM32L152xE || STM32L151xE ||\\
 446           STM32L162xC || STM32L162xCA || STM32L162xD || STM32L162xE */
 447
 448 #ifdef __cplusplus
 449 }
 450 #endif
 451
 452 #endif /* __STM32L1xx_HAL_I2S_H */
 453
 454 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/