tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_iwdg.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32l1xx_hal_iwdg.h
   4   * @author  MCD Application Team
   5   * @version V1.0.0
   6   * @date    5-September-2014
   7   * @brief   Header file of IWDG HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32L1xx_HAL_IWDG_H
  40 #define __STM32L1xx_HAL_IWDG_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 /* Includes ------------------------------------------------------------------*/
  47 #include "stm32l1xx_hal_def.h"
  48
  49 /** @addtogroup STM32L1xx_HAL_Driver
  50   * @{
  51   */
  52
  53 /** @addtogroup IWDG
  54   * @{
  55   */
  56
  57 /* Exported types ------------------------------------------------------------*/
  58
  59 /** @defgroup IWDG_Exported_Types IWDG Exported Types
  60   * @{
  61   */
  62
  63 /**
  64   * @brief  IWDG HAL State Structure definition
  65   */
  66 typedef enum
  67 {
  68   HAL_IWDG_STATE_RESET     = 0x00,  /*!< IWDG not yet initialized or disabled */
  69   HAL_IWDG_STATE_READY     = 0x01,  /*!< IWDG initialized and ready for use   */
  70   HAL_IWDG_STATE_BUSY      = 0x02,  /*!< IWDG internal process is ongoing     */
  71   HAL_IWDG_STATE_TIMEOUT   = 0x03,  /*!< IWDG timeout state                   */
  72   HAL_IWDG_STATE_ERROR     = 0x04   /*!< IWDG error state                     */
  73
  74 }HAL_IWDG_StateTypeDef;
  75
  76 /**
  77   * @brief  IWDG Init structure definition
  78   */
  79 typedef struct
  80 {
  81   uint32_t Prescaler;  /*!< Select the prescaler of the IWDG.
  82                             This parameter can be a value of @ref IWDG_Prescaler */
  83
  84   uint32_t Reload;     /*!< Specifies the IWDG down-counter reload value.
  85                             This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
  86
  87 }IWDG_InitTypeDef;
  88
  89 /**
  90   * @brief  IWDG Handle Structure definition
  91   */
  92 typedef struct
  93 {
  94   IWDG_TypeDef                 *Instance;  /*!< Register base address    */
  95
  96   IWDG_InitTypeDef             Init;       /*!< IWDG required parameters */
  97
  98   HAL_LockTypeDef              Lock;      /*!< IWDG Locking object      */
  99
 100   __IO HAL_IWDG_StateTypeDef   State;      /*!< IWDG communication state */
 101
 102 }IWDG_HandleTypeDef;
 103
 104 /**
 105   * @}
 106   */
 107
 108 /* Exported constants --------------------------------------------------------*/
 109
 110 /** @defgroup IWDG_Exported_Constants IWDG Exported Constants
 111   * @{
 112   */
 113
 114 /** @defgroup IWDG_Registers_BitMask IWDG_Registers_BitMask
 115   * @brief IWDG registers bit mask
 116   * @{
 117   */
 118 /* --- KR Register ---*/
 119 /* KR register bit mask */
 120 #define KR_KEY_RELOAD           ((uint32_t)0xAAAA)  /*!< IWDG Reload Counter Enable   */
 121 #define KR_KEY_ENABLE           ((uint32_t)0xCCCC)  /*!< IWDG Peripheral Enable       */
 122 #define KR_KEY_EWA              ((uint32_t)0x5555)  /*!< IWDG KR Write Access Enable  */
 123 #define KR_KEY_DWA              ((uint32_t)0x0000)  /*!< IWDG KR Write Access Disable */
 124
 125 #define IS_IWDG_KR(__KR__) (((__KR__) == KR_KEY_RELOAD) || \
 126                             ((__KR__) == KR_KEY_ENABLE))|| \
 127                             ((__KR__) == KR_KEY_EWA))   || \
 128                             ((__KR__) == KR_KEY_DWA))
 129 /**
 130   * @}
 131   */
 132
 133 /** @defgroup IWDG_Flag_definition IWDG_Flag_definition
 134   * @{
 135   */
 136 #define IWDG_FLAG_PVU   ((uint32_t)IWDG_SR_PVU)  /*!< Watchdog counter prescaler value update Flag */
 137 #define IWDG_FLAG_RVU   ((uint32_t)IWDG_SR_RVU)  /*!< Watchdog counter reload value update Flag    */
 138
 139 /**
 140   * @}
 141   */
 142
 143 /** @defgroup IWDG_Prescaler IWDG_Prescaler
 144   * @{
 145   */
 146 #define IWDG_PRESCALER_4     ((uint8_t)0x00)                            /*!< IWDG prescaler set to 4   */
 147 #define IWDG_PRESCALER_8     ((uint8_t)(IWDG_PR_PR_0))                  /*!< IWDG prescaler set to 8   */
 148 #define IWDG_PRESCALER_16    ((uint8_t)(IWDG_PR_PR_1))                  /*!< IWDG prescaler set to 16  */
 149 #define IWDG_PRESCALER_32    ((uint8_t)(IWDG_PR_PR_1 | IWDG_PR_PR_0))   /*!< IWDG prescaler set to 32  */
 150 #define IWDG_PRESCALER_64    ((uint8_t)(IWDG_PR_PR_2))                  /*!< IWDG prescaler set to 64  */
 151 #define IWDG_PRESCALER_128   ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_0))   /*!< IWDG prescaler set to 128 */
 152 #define IWDG_PRESCALER_256   ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_1))   /*!< IWDG prescaler set to 256 */
 153
 154 #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4)  || \
 155                                           ((__PRESCALER__) == IWDG_PRESCALER_8)  || \
 156                                           ((__PRESCALER__) == IWDG_PRESCALER_16) || \
 157                                           ((__PRESCALER__) == IWDG_PRESCALER_32) || \
 158                                           ((__PRESCALER__) == IWDG_PRESCALER_64) || \
 159                                           ((__PRESCALER__) == IWDG_PRESCALER_128)|| \
 160                                           ((__PRESCALER__) == IWDG_PRESCALER_256))
 161
 162 /**
 163   * @}
 164   */
 165
 166 /** @defgroup IWDG_Reload_Value IWDG_Reload_Value
 167   * @{
 168   */
 169 #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= 0xFFF)
 170
 171 /**
 172   * @}
 173   */
 174
 175 /**
 176   * @}
 177   */
 178
 179 /* Exported macros -----------------------------------------------------------*/
 180
 181 /** @defgroup IWDG_Exported_Macros IWDG Exported Macros
 182   * @{
 183   */
 184
 185 /** @brief Reset IWDG handle state
 186   * @param  __HANDLE__: IWDG handle.
 187   * @retval None
 188   */
 189 #define __HAL_IWDG_RESET_HANDLE_STATE(__HANDLE__)   ((__HANDLE__)->State = HAL_IWDG_STATE_RESET)
 190
 191 /**
 192   * @brief  Enables the IWDG peripheral.
 193   * @param  __HANDLE__: IWDG handle
 194   * @retval None
 195   */
 196 #define __HAL_IWDG_START(__HANDLE__)                WRITE_REG((__HANDLE__)->Instance->KR, KR_KEY_ENABLE)
 197
 198 /**
 199   * @brief  Reloads IWDG counter with value defined in the reload register
 200   *         (write access to IWDG_PR and IWDG_RLR registers disabled).
 201   * @param  __HANDLE__: IWDG handle
 202   * @retval None
 203   */
 204 #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__)       WRITE_REG((__HANDLE__)->Instance->KR, KR_KEY_RELOAD)
 205
 206 /**
 207   * @brief  Enables write access to IWDG_PR and IWDG_RLR registers.
 208   * @param  __HANDLE__: IWDG handle
 209   * @retval None
 210   */
 211 #define __HAL_IWDG_ENABLE_WRITE_ACCESS(__HANDLE__)  WRITE_REG((__HANDLE__)->Instance->KR, KR_KEY_EWA)
 212
 213 /**
 214   * @brief  Disables write access to IWDG_PR and IWDG_RLR registers.
 215   * @param  __HANDLE__: IWDG handle
 216   * @retval None
 217   */
 218 #define __HAL_IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, KR_KEY_DWA)
 219
 220 /**
 221   * @brief  Gets the selected IWDG's flag status.
 222   * @param  __HANDLE__: IWDG handle
 223   * @param  __FLAG__: specifies the flag to check.
 224   *         This parameter can be one of the following values:
 225   *            @arg IWDG_FLAG_PVU: Watchdog counter reload value update flag
 226   *            @arg IWDG_FLAG_RVU: Watchdog counter prescaler value flag
 227   * @retval The new state of __FLAG__ (TRUE or FALSE).
 228   */
 229 #define __HAL_IWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
 230
 231 /**
 232   * @}
 233   */
 234
 235 /* Exported functions --------------------------------------------------------*/
 236
 237 /** @addtogroup IWDG_Exported_Functions
 238   * @{
 239   */
 240
 241 /** @addtogroup IWDG_Exported_Functions_Group1
 242   * @{
 243   */
 244 /* Initialization/de-initialization functions  ********************************/
 245 HAL_StatusTypeDef     HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
 246 void                  HAL_IWDG_MspInit(IWDG_HandleTypeDef *hiwdg);
 247
 248 /**
 249   * @}
 250   */
 251
 252 /** @addtogroup IWDG_Exported_Functions_Group2
 253   * @{
 254   */
 255 /* I/O operation functions ****************************************************/
 256 HAL_StatusTypeDef     HAL_IWDG_Start(IWDG_HandleTypeDef *hiwdg);
 257 HAL_StatusTypeDef     HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
 258
 259 /**
 260   * @}
 261   */
 262
 263 /** @addtogroup IWDG_Exported_Functions_Group3
 264   * @{
 265   */
 266 /* Peripheral State functions  ************************************************/
 267 HAL_IWDG_StateTypeDef HAL_IWDG_GetState(IWDG_HandleTypeDef *hiwdg);
 268
 269 /**
 270   * @}
 271   */
 272
 273 /**
 274   * @}
 275   */
 276
 277 /**
 278   * @}
 279   */
 280
 281 /**
 282   * @}
 283   */
 284
 285 #ifdef __cplusplus
 286 }
 287 #endif
 288
 289 #endif /* __STM32L1xx_HAL_IWDG_H */
 290
 291 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/